sys/dev/pci/drm/i915/display/intel_dsb_regs.h

15

#define DSB_HEAD(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x0)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

16

#define DSB_TAIL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x4)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

17

#define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

25

#define DSB_MMIOCTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0xc)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

31

#define DSB_POLLFUNC(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x10)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

37

#define DSB_DEBUG(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x14)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

38

#define DSB_POLLMASK(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x1c)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

39

#define DSB_STATUS(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x24)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

53

#define DSB_INTERRUPT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x28)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

66

#define DSB_CURRENT_HEAD(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x2c)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

67

#define DSB_RM_TIMEOUT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x30)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

74

#define DSB_RMTIMEOUTREG_CAPTURE(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x34)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

75

#define DSB_PMCTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x38)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

79

#define DSB_PMCTRL_2(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x3c)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

84

#define DSB_PF_LN_LOWER(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x40)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

85

#define DSB_PF_LN_UPPER(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x44)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

86

#define DSB_BUFRPT_CNT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x48)

sys/dev/pci/drm/i915/display/intel_dsb_regs.h

87

#define DSB_CHICKEN(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0xf0)