Symbol: DRM_DEBUG
sys/dev/pci/drm/amd/amdgpu/amdgpu_afmt.c
84
DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c
1677
DRM_DEBUG("atom firmware requested %08x %dkb\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c
699
DRM_DEBUG("Changing default dispclk from %dMhz to 600Mhz\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c
703
DRM_DEBUG("Changing default dispclk from %dMhz to 625Mhz\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.c
114
DRM_DEBUG("atom firmware v2_1 requested %08x %dkb fw %dkb drv\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.c
145
DRM_DEBUG("atom requested fw start at %08x %dkb and drv start at %08x %dkb\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c
161
DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c
174
DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c
185
DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c
191
DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c
196
DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c
203
DRM_DEBUG("%s: Deep color disabled. Set amdgpu module param deep_color=1 to enable.\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c
208
DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ctx.c
447
DRM_DEBUG("invalid ip instance: %d\n", instance);
sys/dev/pci/drm/amd/amdgpu/amdgpu_ctx.c
452
DRM_DEBUG("invalid ring: %d %d\n", hw_ip, ring);
sys/dev/pci/drm/amd/amdgpu/amdgpu_ctx.c
465
DRM_DEBUG("error entity %p\n", ctx_entity);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
1075
DRM_DEBUG("num_ips:%d", num_ips);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
1095
DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
1188
DRM_DEBUG("number of dies: %d\n", num_dies);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
1371
DRM_DEBUG("number of dies: %d\n", num_dies);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
1385
DRM_DEBUG("number of hardware IPs on die%d: %d\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
1398
DRM_DEBUG("%s(%d) #%d v%d.%d.%d:\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
1485
DRM_DEBUG("\t0x%08x\n", ip->base_address[k]);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
1491
DRM_DEBUG("set register base offset for %s\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_gem.c
577
DRM_DEBUG("Failed to allocate GEM object (%llu, %d, %llu, %d)\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_gem.c
789
DRM_DEBUG("%d\n", args->handle);
sys/dev/pci/drm/amd/amdgpu/amdgpu_i2c.c
397
DRM_DEBUG("i2c 0x%02x read failed\n", addr);
sys/dev/pci/drm/amd/amdgpu/amdgpu_i2c.c
402
DRM_DEBUG("val = 0x%02x\n", *val);
sys/dev/pci/drm/amd/amdgpu/amdgpu_i2c.c
424
DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", addr, val);
sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c
584
DRM_DEBUG("BO size %lu > total memory in domain: %llu\n", size, man->size);
sys/dev/pci/drm/amd/amdgpu/amdgpu_sdma.c
246
DRM_DEBUG("psp_load == '%s'\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c
1787
DRM_DEBUG("train_data_size:%llx,p2c_train_data_offset:%llx,c2p_train_data_offset:%llx.\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c
1808
DRM_DEBUG("memory training does not support!\n");
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
114
DRM_DEBUG("GFX\n");
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
121
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
123
DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
124
DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
129
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
141
DRM_DEBUG("RLC\n");
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
148
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
150
DRM_DEBUG("save_and_restore_offset: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
152
DRM_DEBUG("clear_state_descriptor_offset: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
154
DRM_DEBUG("avail_scratch_ram_locations: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
156
DRM_DEBUG("master_pkt_description_offset: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
173
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
175
DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
176
DRM_DEBUG("jt_size: %u\n", le32_to_cpu(rlc_hdr->jt_size));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
177
DRM_DEBUG("save_and_restore_offset: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
179
DRM_DEBUG("clear_state_descriptor_offset: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
181
DRM_DEBUG("avail_scratch_ram_locations: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
183
DRM_DEBUG("reg_restore_list_size: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
185
DRM_DEBUG("reg_list_format_start: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
187
DRM_DEBUG("reg_list_format_separate_start: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
189
DRM_DEBUG("starting_offsets_start: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
191
DRM_DEBUG("reg_list_format_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
193
DRM_DEBUG("reg_list_format_array_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
195
DRM_DEBUG("reg_list_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
197
DRM_DEBUG("reg_list_array_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
199
DRM_DEBUG("reg_list_format_separate_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
201
DRM_DEBUG("reg_list_format_separate_array_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
203
DRM_DEBUG("reg_list_separate_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
205
DRM_DEBUG("reg_list_separate_array_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
210
DRM_DEBUG("reg_list_format_direct_reg_list_length: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
212
DRM_DEBUG("save_restore_list_cntl_ucode_ver: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
214
DRM_DEBUG("save_restore_list_cntl_feature_ver: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
216
DRM_DEBUG("save_restore_list_cntl_size_bytes %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
218
DRM_DEBUG("save_restore_list_cntl_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
220
DRM_DEBUG("save_restore_list_gpm_ucode_ver: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
222
DRM_DEBUG("save_restore_list_gpm_feature_ver: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
224
DRM_DEBUG("save_restore_list_gpm_size_bytes %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
226
DRM_DEBUG("save_restore_list_gpm_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
228
DRM_DEBUG("save_restore_list_srm_ucode_ver: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
230
DRM_DEBUG("save_restore_list_srm_feature_ver: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
232
DRM_DEBUG("save_restore_list_srm_size_bytes %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
234
DRM_DEBUG("save_restore_list_srm_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
239
DRM_DEBUG("rlc_iram_ucode_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
241
DRM_DEBUG("rlc_iram_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
243
DRM_DEBUG("rlc_dram_ucode_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
245
DRM_DEBUG("rlc_dram_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
250
DRM_DEBUG("rlcp_ucode_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
252
DRM_DEBUG("rlcp_ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
254
DRM_DEBUG("rlcp_ucode_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
256
DRM_DEBUG("rlcp_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
258
DRM_DEBUG("rlcv_ucode_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
260
DRM_DEBUG("rlcv_ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
262
DRM_DEBUG("rlcv_ucode_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
264
DRM_DEBUG("rlcv_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
269
DRM_DEBUG("global_tap_delays_ucode_size_bytes :%u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
271
DRM_DEBUG("global_tap_delays_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
273
DRM_DEBUG("se0_tap_delays_ucode_size_bytes :%u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
275
DRM_DEBUG("se0_tap_delays_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
277
DRM_DEBUG("se1_tap_delays_ucode_size_bytes :%u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
279
DRM_DEBUG("se1_tap_delays_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
281
DRM_DEBUG("se2_tap_delays_ucode_size_bytes :%u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
283
DRM_DEBUG("se2_tap_delays_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
285
DRM_DEBUG("se3_tap_delays_ucode_size_bytes :%u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
287
DRM_DEBUG("se3_tap_delays_ucode_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
304
DRM_DEBUG("SDMA\n");
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
311
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
313
DRM_DEBUG("ucode_change_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
315
DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
316
DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
320
DRM_DEBUG("digest_size: %u\n", le32_to_cpu(sdma_v1_1_hdr->digest_size));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
326
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
328
DRM_DEBUG("ctx_jt_offset: %u\n", le32_to_cpu(sdma_hdr->ctx_jt_offset));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
329
DRM_DEBUG("ctx_jt_size: %u\n", le32_to_cpu(sdma_hdr->ctx_jt_size));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
330
DRM_DEBUG("ctl_ucode_offset: %u\n", le32_to_cpu(sdma_hdr->ctl_ucode_offset));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
331
DRM_DEBUG("ctl_jt_offset: %u\n", le32_to_cpu(sdma_hdr->ctl_jt_offset));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
332
DRM_DEBUG("ctl_jt_size: %u\n", le32_to_cpu(sdma_hdr->ctl_jt_size));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
337
DRM_DEBUG("ucode_reversion: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
352
DRM_DEBUG("PSP\n");
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
359
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
361
DRM_DEBUG("sos_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
363
DRM_DEBUG("sos_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
368
DRM_DEBUG("toc_header_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
370
DRM_DEBUG("toc_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
372
DRM_DEBUG("toc_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
374
DRM_DEBUG("kdb_header_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
376
DRM_DEBUG("kdb_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
378
DRM_DEBUG("kdb_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
384
DRM_DEBUG("kdb_header_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
386
DRM_DEBUG("kdb_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
388
DRM_DEBUG("kdb_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
396
DRM_DEBUG("toc_header_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
398
DRM_DEBUG("toc_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
40
DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
400
DRM_DEBUG("toc_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
402
DRM_DEBUG("kdb_header_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
404
DRM_DEBUG("kdb_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
406
DRM_DEBUG("kdb_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
408
DRM_DEBUG("spl_header_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
41
DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
410
DRM_DEBUG("spl_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
412
DRM_DEBUG("spl_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
42
DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
422
DRM_DEBUG("psp_sos_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
424
DRM_DEBUG("psp_sos_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
428
DRM_DEBUG("psp_sys_drv_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
43
DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
430
DRM_DEBUG("psp_sys_drv_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
434
DRM_DEBUG("psp_kdb_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
436
DRM_DEBUG("psp_kdb_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
44
DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
440
DRM_DEBUG("psp_toc_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
442
DRM_DEBUG("psp_toc_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
446
DRM_DEBUG("psp_spl_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
448
DRM_DEBUG("psp_spl_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
45
DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
452
DRM_DEBUG("psp_rl_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
454
DRM_DEBUG("psp_rl_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
458
DRM_DEBUG("psp_soc_drv_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
46
DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
460
DRM_DEBUG("psp_soc_drv_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
464
DRM_DEBUG("psp_intf_drv_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
466
DRM_DEBUG("psp_intf_drv_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
47
DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
470
DRM_DEBUG("psp_dbg_drv_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
472
DRM_DEBUG("psp_dbg_drv_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
476
DRM_DEBUG("psp_ras_drv_version: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
478
DRM_DEBUG("psp_ras_drv_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
48
DRM_DEBUG("ucode_array_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
482
DRM_DEBUG("Unsupported PSP fw type: %d\n", desc->fw_type);
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
497
DRM_DEBUG("GPU_INFO\n");
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
50
DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
504
DRM_DEBUG("version_major: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
506
DRM_DEBUG("version_minor: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
58
DRM_DEBUG("MC\n");
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
65
DRM_DEBUG("io_debug_size_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
67
DRM_DEBUG("io_debug_array_offset_bytes: %u\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
82
DRM_DEBUG("SMC\n");
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
87
DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(v1_0_hdr->ucode_start_addr));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
92
DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_offset_bytes));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
93
DRM_DEBUG("ppt_size_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_size_bytes));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
97
DRM_DEBUG("pptable_count: %u\n", le32_to_cpu(v2_1_hdr->pptable_count));
sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c
98
DRM_DEBUG("pptable_entry_offset: %u\n", le32_to_cpu(v2_1_hdr->pptable_entry_offset));
sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c
393
DRM_DEBUG("RAS WARN: reserve vram for retired page %llx fail\n", bp);
sys/dev/pci/drm/amd/amdgpu/cik_sdma.c
111
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/cik_sdma.c
1139
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1609
DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n",
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1615
DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n",
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1621
DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n",
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1765
DRM_DEBUG("%sabling AFMT interface @ 0x%04X for encoder 0x%x\n",
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
2329
DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3013
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3042
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3072
DRM_DEBUG("invalid hpd %d\n", hpd);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3224
DRM_DEBUG("invalid hpd %d\n", hpd);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3239
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3254
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3276
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3281
DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3288
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3290
DRM_DEBUG("IH: D%d vline\n", crtc + 1);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3294
DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data[0]);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3309
DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data[0]);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
3320
DRM_DEBUG("IH: HPD%d\n", hpd + 1);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1808
DRM_DEBUG("%sabling AFMT interface @ 0x%04X for encoder 0x%x\n",
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
2302
DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
290
DRM_DEBUG("invalid hpd %d\n", hpd);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
2951
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
2975
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
3010
DRM_DEBUG("invalid hpd %d\n", hpd);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
3094
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
3099
DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
3105
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
3107
DRM_DEBUG("IH: D%d vline\n", crtc + 1);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
3110
DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data[0]);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
3201
DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data[0]);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
3212
DRM_DEBUG("IH: HPD%d\n", hpd + 1);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
1576
DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n",
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
1582
DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n",
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
1588
DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n",
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
1712
DRM_DEBUG("%sabling AFMT interface @ 0x%04X for encoder 0x%x\n",
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
2248
DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
274
DRM_DEBUG("invalid hpd %d\n", hpd);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
2923
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
2947
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
2974
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
2998
DRM_DEBUG("invalid crtc %d\n", crtc);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
3026
DRM_DEBUG("invalid hpd %d\n", type);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
3110
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
3115
DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
3121
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
3123
DRM_DEBUG("IH: D%d vline\n", crtc + 1);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
3126
DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data[0]);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
3217
DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data[0]);
sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c
3228
DRM_DEBUG("IH: HPD%d\n", hpd + 1);
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
4215
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
9067
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
9071
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
9120
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
9124
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
9196
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
9467
DRM_DEBUG("IH: CPC GENERIC2_INT, me:%d, pipe:%d, queue:%d\n",
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
1300
DRM_DEBUG("rlc autoload enabled fw: 0x%llx\n", *(uint64_t *)fw_autoload_mask);
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
6345
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
6349
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
6402
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
6406
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
6471
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
728
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
4706
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
4710
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
4757
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
4761
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
4826
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
595
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c
332
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c
4634
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c
4638
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c
4755
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c
917
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c
6393
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c
6397
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c
6557
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c
6788
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c
949
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c
1602
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c
3808
DRM_DEBUG("KIQ dequeue request failed.\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c
5973
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c
5977
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c
6201
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c
7123
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c
2088
DRM_DEBUG("%s dequeue request failed.\n", ring->name);
sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c
3092
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c
3096
DRM_DEBUG("invalid me %d\n", me);
sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c
3304
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c
3436
DRM_DEBUG("invalid pipe %d\n", pipe);
sys/dev/pci/drm/amd/amdgpu/gmc_v10_0.c
1037
DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c
985
DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c
972
DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c
108
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c
140
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c
222
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c
1720
DRM_DEBUG("Set mc_vram_size = 0 for APP APU\n");
sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c
2270
DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c
52
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c
48
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c
443
DRM_DEBUG("IH: JPEG decode TRAP\n");
sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c
754
DRM_DEBUG("IH: JPEG TRAP\n");
sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c
634
DRM_DEBUG("IH: JPEG TRAP\n");
sys/dev/pci/drm/amd/amdgpu/jpeg_v3_0.c
546
DRM_DEBUG("IH: JPEG TRAP\n");
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c
711
DRM_DEBUG("IH: JPEG TRAP\n");
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c
740
DRM_DEBUG("IH: JPEG TRAP\n");
sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c
632
DRM_DEBUG("IH: JPEG TRAP\n");
sys/dev/pci/drm/amd/amdgpu/mxgpu_vi.c
495
DRM_DEBUG("get ack intr and do nothing.\n");
sys/dev/pci/drm/amd/amdgpu/psp_v10_0.c
52
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
453
DRM_DEBUG("training %s %s, cost %d @ %d ms\n",
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
474
DRM_DEBUG("Memory training is not supported.\n");
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
482
DRM_DEBUG("SOS is alive, skip memory training.\n");
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
487
DRM_DEBUG("sys_cache[%08x,%08x,%08x,%08x] p2c_header[%08x,%08x,%08x,%08x]\n",
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
492
DRM_DEBUG("Short training depends on restore.\n");
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
498
DRM_DEBUG("sys_cache[0] is invalid, restore depends on save.\n");
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
505
DRM_DEBUG("sys_cache is invalid or out-of-date, need save training data to sys_cache.\n");
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
511
DRM_DEBUG("p2c_header[0] is invalid, save depends on long training.\n");
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
520
DRM_DEBUG("Memory training ops:%x.\n", ops);
sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c
94
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/psp_v12_0.c
50
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/psp_v3_1.c
63
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c
1038
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c
135
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c
1376
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c
275
DRM_DEBUG("\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
1853
DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i,
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
2080
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
660
DRM_DEBUG("rptr before shift == 0x%016llx\n", *rptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
679
DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
684
DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n",
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
702
DRM_DEBUG("Setting write pointer\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
706
DRM_DEBUG("Using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
715
DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
719
DRM_DEBUG("Not using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
1469
DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i,
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
1767
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
227
DRM_DEBUG("rptr before shift == 0x%016llx\n", rptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
246
DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
251
DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n",
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
269
DRM_DEBUG("Setting write pointer\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
273
DRM_DEBUG("Using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
282
DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
286
DRM_DEBUG("Not using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
1342
DRM_DEBUG("GRBM_SOFT_RESET=0x%08X\n", tmp);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
1408
DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i,
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
1700
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
1710
DRM_DEBUG("process smda queue id = %d\n", mes_queue_id);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
334
DRM_DEBUG("rptr before shift == 0x%016llx\n", *rptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
353
DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
358
DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
375
DRM_DEBUG("Setting write pointer\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
377
DRM_DEBUG("Using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
387
DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
391
DRM_DEBUG("Not using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
1606
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
1616
DRM_DEBUG("process smda queue id = %d\n", mes_queue_id);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
174
DRM_DEBUG("rptr before shift == 0x%016llx\n", *rptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
193
DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
198
DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
215
DRM_DEBUG("Setting write pointer\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
217
DRM_DEBUG("Using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
227
DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
241
DRM_DEBUG("Not using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
778
DRM_DEBUG("GRBM_SOFT_RESET=0x%08X\n", tmp);
sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c
1336
DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i,
sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c
1616
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c
175
DRM_DEBUG("rptr before shift == 0x%016llx\n", *rptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c
193
DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c
211
DRM_DEBUG("Using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c
221
DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c
225
DRM_DEBUG("Not using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
1322
DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i,
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
1549
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
175
DRM_DEBUG("rptr before shift == 0x%016llx\n", *rptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
193
DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
210
DRM_DEBUG("Setting write pointer\n");
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
213
DRM_DEBUG("Using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
223
DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
227
DRM_DEBUG("Not using doorbell -- "
sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c
526
DRM_DEBUG("IH: UVD TRAP\n");
sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c
712
DRM_DEBUG("IH: UVD TRAP\n");
sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c
628
DRM_DEBUG("IH: UVD TRAP\n");
sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c
1256
DRM_DEBUG("IH: UVD TRAP\n");
sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c
1494
DRM_DEBUG("IH: UVD TRAP\n");
sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c
607
DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c
566
DRM_DEBUG("IH: VCE\n");
sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c
744
DRM_DEBUG("IH: VCE\n");
sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c
550
DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c
792
DRM_DEBUG("IH: VCE\n");
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1308
DRM_DEBUG("dpg pause state changed %d:%d -> %d:%d",
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1363
DRM_DEBUG("dpg pause state changed %d:%d -> %d:%d",
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1814
DRM_DEBUG("IH: VCN TRAP\n");
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
1301
DRM_DEBUG("dpg pause state changed %d -> %d",
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
1804
DRM_DEBUG("IH: VCN TRAP\n");
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
1668
DRM_DEBUG("dpg pause state changed %d -> %d",
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
2066
DRM_DEBUG("IH: VCN TRAP\n");
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
1725
DRM_DEBUG("dpg pause state changed %d -> %d",
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
2326
DRM_DEBUG("IH: VCN TRAP\n");
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c
2208
DRM_DEBUG("IH: VCN TRAP\n");
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c
1661
DRM_DEBUG("IH: VCN TRAP\n");
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c
1382
DRM_DEBUG("IH: VCN TRAP\n");
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5130
DRM_DEBUG("DM: Failed to update backlight via AUX on eDP[%d]\n", bl_idx);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5139
DRM_DEBUG("DM: Failed to update backlight on eDP[%d]\n", bl_idx);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
606
DRM_DEBUG("Queued work for handling interrupt from "
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
256
DRM_DEBUG("DM_PPLIB: values for %s clock\n",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
260
DRM_DEBUG("DM_PPLIB:\t %d in kHz\n", pp_clks->data[i].clocks_in_khz);
sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c
3176
DRM_DEBUG("IH: thermal low to high\n");
sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c
3181
DRM_DEBUG("IH: thermal high to low\n");
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
7661
DRM_DEBUG("IH: thermal low to high\n");
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
7666
DRM_DEBUG("IH: thermal high to low\n");
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
7711
DRM_DEBUG("\n");
sys/dev/pci/drm/display/drm_dp_aux_dev.c
299
DRM_DEBUG("drm_dp_aux_dev: aux [%s] unregistering\n", aux->name);
sys/dev/pci/drm/display/drm_dp_aux_dev.c
321
DRM_DEBUG("drm_dp_aux_dev: aux [%s] registered as minor %d\n",
sys/dev/pci/drm/drm_agpsupport.c
135
DRM_DEBUG("agp_available = %d\n", agp_available);
sys/dev/pci/drm/drm_atomic_helper.c
589
DRM_DEBUG("enc%d possible_clones is 0\n", drm_enc->base.id);
sys/dev/pci/drm/drm_atomic_helper.c
595
DRM_DEBUG("crtc%d failed valid clone check for mask 0x%x\n",
sys/dev/pci/drm/drm_drv.c
1297
DRM_DEBUG("\n");
sys/dev/pci/drm/drm_drv.c
1376
DRM_DEBUG("Initialized\n");
sys/dev/pci/drm/drm_drv.c
1670
DRM_DEBUG("mtrr_del = %d", retcode);
sys/dev/pci/drm/drm_drv.c
1910
DRM_DEBUG("open_count = %d\n", atomic_read(&dev->open_count));
sys/dev/pci/drm/drm_drv.c
1985
DRM_DEBUG("open_count = %d\n", atomic_read(&dev->open_count));
sys/dev/pci/drm/drm_drv.c
245
DRM_DEBUG("\n");
sys/dev/pci/drm/drm_drv.c
273
DRM_DEBUG("new minor registered %d\n", minor->index);
sys/dev/pci/drm/drm_drv.c
498
DRM_DEBUG("\n");
sys/dev/pci/drm/drm_gem.c
1002
DRM_DEBUG("Failed to copy in GEM handles\n");
sys/dev/pci/drm/drm_gem.c
1055
DRM_DEBUG("Failed to look up GEM BO %d\n", handle);
sys/dev/pci/drm/drm_ioctl.c
1035
DRM_DEBUG("pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n",
sys/dev/pci/drm/drm_ioctl.c
1069
DRM_DEBUG("no function\n");
sys/dev/pci/drm/drm_mode_object.c
201
DRM_DEBUG("OBJ ID: %d (%d)\n", obj->id, kref_read(&obj->refcount));
sys/dev/pci/drm/drm_mode_object.c
218
DRM_DEBUG("OBJ ID: %d (%d)\n", obj->id, kref_read(&obj->refcount));
sys/dev/pci/drm/drm_plane.c
1433
DRM_DEBUG("Invalid absolute flip target %u, "
sys/dev/pci/drm/drm_plane.c
1442
DRM_DEBUG("Invalid relative flip target %u, "
sys/dev/pci/drm/drm_syncobj.c
355
DRM_DEBUG("You are adding an unorder point to timeline!\n");
sys/dev/pci/drm/i915/gem/i915_gem_context.c
1459
DRM_DEBUG("%s XXX skipping reset pos %p\n", __func__, pos);
sys/dev/pci/drm/i915/gt/intel_gt_sysfs_pm.c
658
DRM_DEBUG("Set slpc->media_ratio_mode to %d", mode);
sys/dev/pci/drm/i915/i915_cmd_parser.c
1255
DRM_DEBUG("CMD: Rejected command: 0x%08X\n", *cmd);
sys/dev/pci/drm/i915/i915_cmd_parser.c
1275
DRM_DEBUG("CMD: Rejected register 0x%08X in command: 0x%08X (%s)\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1286
DRM_DEBUG("CMD: Rejected LRM to masked register 0x%08X\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1292
DRM_DEBUG("CMD: Rejected LRR to masked register 0x%08X\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1300
DRM_DEBUG("CMD: Rejected LRI to masked register 0x%08X\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1328
DRM_DEBUG("CMD: Rejected command 0x%08X, too short to check bitmask (%s)\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1337
DRM_DEBUG("CMD: Rejected command 0x%08X for bitmask 0x%08X (exp=0x%08X act=0x%08X) (%s)\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1361
DRM_DEBUG("CMD: Rejecting BB_START for ggtt based submission\n");
sys/dev/pci/drm/i915/i915_cmd_parser.c
1366
DRM_DEBUG("CMD: Recursive BB_START with bad length(%u)\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1379
DRM_DEBUG("CMD: BB_START to 0x%llx jumps out of BB\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1400
DRM_DEBUG("CMD: BB_START to 0x%llx not a previously executed cmd\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1470
DRM_DEBUG("CMD: Failed to copy batch\n");
sys/dev/pci/drm/i915/i915_cmd_parser.c
1496
DRM_DEBUG("CMD: Unrecognized command: 0x%08X\n", *cmd);
sys/dev/pci/drm/i915/i915_cmd_parser.c
1507
DRM_DEBUG("CMD: Command length exceeds batch length: 0x%08X length=%u batchlen=%td\n",
sys/dev/pci/drm/i915/i915_cmd_parser.c
1533
DRM_DEBUG("CMD: Got to the end of the buffer w/o a BBE cmd!\n");
sys/dev/pci/drm/i915/i915_cmd_parser.c
751
DRM_DEBUG("CMD: Abnormal rcs cmd length! 0x%08X\n", cmd_header);
sys/dev/pci/drm/i915/i915_cmd_parser.c
774
DRM_DEBUG("CMD: Abnormal bsd cmd length! 0x%08X\n", cmd_header);
sys/dev/pci/drm/i915/i915_cmd_parser.c
787
DRM_DEBUG("CMD: Abnormal blt cmd length! 0x%08X\n", cmd_header);
sys/dev/pci/drm/i915/i915_cmd_parser.c
798
DRM_DEBUG("CMD: Abnormal blt cmd length! 0x%08X\n", cmd_header);
sys/dev/pci/drm/radeon/atom.c
1428
DRM_DEBUG("atom firmware requested %08x %dkb\n",
sys/dev/pci/drm/radeon/ci_dpm.c
5828
DRM_DEBUG("Invalid PCC GPIO: %u!\n", gpio.shift);
sys/dev/pci/drm/radeon/cik.c
1979
DRM_DEBUG("\n");
sys/dev/pci/drm/radeon/cik.c
4907
DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
sys/dev/pci/drm/radeon/cik.c
7062
DRM_DEBUG("cik_irq_set: sw int gfx\n");
sys/dev/pci/drm/radeon/cik.c
7067
DRM_DEBUG("si_irq_set: sw int cp1\n");
sys/dev/pci/drm/radeon/cik.c
7083
DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe);
sys/dev/pci/drm/radeon/cik.c
7101
DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe);
sys/dev/pci/drm/radeon/cik.c
7105
DRM_DEBUG("si_irq_set: sw int cp1 invalid me %d\n", ring->me);
sys/dev/pci/drm/radeon/cik.c
7110
DRM_DEBUG("si_irq_set: sw int cp2\n");
sys/dev/pci/drm/radeon/cik.c
7126
DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe);
sys/dev/pci/drm/radeon/cik.c
7144
DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe);
sys/dev/pci/drm/radeon/cik.c
7148
DRM_DEBUG("si_irq_set: sw int cp2 invalid me %d\n", ring->me);
sys/dev/pci/drm/radeon/cik.c
7153
DRM_DEBUG("cik_irq_set: sw int dma\n");
sys/dev/pci/drm/radeon/cik.c
7158
DRM_DEBUG("cik_irq_set: sw int dma1\n");
sys/dev/pci/drm/radeon/cik.c
7164
DRM_DEBUG("cik_irq_set: vblank 0\n");
sys/dev/pci/drm/radeon/cik.c
7169
DRM_DEBUG("cik_irq_set: vblank 1\n");
sys/dev/pci/drm/radeon/cik.c
7174
DRM_DEBUG("cik_irq_set: vblank 2\n");
sys/dev/pci/drm/radeon/cik.c
7179
DRM_DEBUG("cik_irq_set: vblank 3\n");
sys/dev/pci/drm/radeon/cik.c
7184
DRM_DEBUG("cik_irq_set: vblank 4\n");
sys/dev/pci/drm/radeon/cik.c
7189
DRM_DEBUG("cik_irq_set: vblank 5\n");
sys/dev/pci/drm/radeon/cik.c
7193
DRM_DEBUG("cik_irq_set: hpd 1\n");
sys/dev/pci/drm/radeon/cik.c
7197
DRM_DEBUG("cik_irq_set: hpd 2\n");
sys/dev/pci/drm/radeon/cik.c
7201
DRM_DEBUG("cik_irq_set: hpd 3\n");
sys/dev/pci/drm/radeon/cik.c
7205
DRM_DEBUG("cik_irq_set: hpd 4\n");
sys/dev/pci/drm/radeon/cik.c
7209
DRM_DEBUG("cik_irq_set: hpd 5\n");
sys/dev/pci/drm/radeon/cik.c
7213
DRM_DEBUG("cik_irq_set: hpd 6\n");
sys/dev/pci/drm/radeon/cik.c
7566
DRM_DEBUG("cik_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
sys/dev/pci/drm/radeon/cik.c
7587
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7597
DRM_DEBUG("IH: D1 vblank\n");
sys/dev/pci/drm/radeon/cik.c
7602
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7605
DRM_DEBUG("IH: D1 vline\n");
sys/dev/pci/drm/radeon/cik.c
7609
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/cik.c
7617
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7627
DRM_DEBUG("IH: D2 vblank\n");
sys/dev/pci/drm/radeon/cik.c
7632
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7635
DRM_DEBUG("IH: D2 vline\n");
sys/dev/pci/drm/radeon/cik.c
7639
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/cik.c
7647
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7657
DRM_DEBUG("IH: D3 vblank\n");
sys/dev/pci/drm/radeon/cik.c
7662
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7665
DRM_DEBUG("IH: D3 vline\n");
sys/dev/pci/drm/radeon/cik.c
7669
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/cik.c
7677
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7687
DRM_DEBUG("IH: D4 vblank\n");
sys/dev/pci/drm/radeon/cik.c
7692
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7695
DRM_DEBUG("IH: D4 vline\n");
sys/dev/pci/drm/radeon/cik.c
7699
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/cik.c
7707
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7717
DRM_DEBUG("IH: D5 vblank\n");
sys/dev/pci/drm/radeon/cik.c
7722
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7725
DRM_DEBUG("IH: D5 vline\n");
sys/dev/pci/drm/radeon/cik.c
7729
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/cik.c
7737
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7747
DRM_DEBUG("IH: D6 vblank\n");
sys/dev/pci/drm/radeon/cik.c
7752
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7755
DRM_DEBUG("IH: D6 vline\n");
sys/dev/pci/drm/radeon/cik.c
7759
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/cik.c
7769
DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1);
sys/dev/pci/drm/radeon/cik.c
7777
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7781
DRM_DEBUG("IH: HPD1\n");
sys/dev/pci/drm/radeon/cik.c
7786
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7790
DRM_DEBUG("IH: HPD2\n");
sys/dev/pci/drm/radeon/cik.c
7795
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7799
DRM_DEBUG("IH: HPD3\n");
sys/dev/pci/drm/radeon/cik.c
7804
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7808
DRM_DEBUG("IH: HPD4\n");
sys/dev/pci/drm/radeon/cik.c
7813
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7817
DRM_DEBUG("IH: HPD5\n");
sys/dev/pci/drm/radeon/cik.c
7822
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7826
DRM_DEBUG("IH: HPD6\n");
sys/dev/pci/drm/radeon/cik.c
7831
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7835
DRM_DEBUG("IH: HPD_RX 1\n");
sys/dev/pci/drm/radeon/cik.c
7840
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7844
DRM_DEBUG("IH: HPD_RX 2\n");
sys/dev/pci/drm/radeon/cik.c
7849
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7853
DRM_DEBUG("IH: HPD_RX 3\n");
sys/dev/pci/drm/radeon/cik.c
7858
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7862
DRM_DEBUG("IH: HPD_RX 4\n");
sys/dev/pci/drm/radeon/cik.c
7867
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7871
DRM_DEBUG("IH: HPD_RX 5\n");
sys/dev/pci/drm/radeon/cik.c
7876
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/cik.c
7880
DRM_DEBUG("IH: HPD_RX 6\n");
sys/dev/pci/drm/radeon/cik.c
7884
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/cik.c
7893
DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
sys/dev/pci/drm/radeon/cik.c
7913
DRM_DEBUG("IH: VCE int: 0x%08x\n", src_data);
sys/dev/pci/drm/radeon/cik.c
7931
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/radeon/cik.c
7995
DRM_DEBUG("IH: SDMA trap\n");
sys/dev/pci/drm/radeon/cik.c
8026
DRM_DEBUG("IH: thermal low to high\n");
sys/dev/pci/drm/radeon/cik.c
8031
DRM_DEBUG("IH: thermal high to low\n");
sys/dev/pci/drm/radeon/cik.c
8036
DRM_DEBUG("IH: GUI idle\n");
sys/dev/pci/drm/radeon/cik.c
8078
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/evergreen.c
1641
DRM_DEBUG("Setting: vddc: %d\n", voltage->voltage);
sys/dev/pci/drm/radeon/evergreen.c
1662
DRM_DEBUG("Setting: vddci: %d\n", voltage->vddci);
sys/dev/pci/drm/radeon/evergreen.c
3887
DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
sys/dev/pci/drm/radeon/evergreen.c
4523
DRM_DEBUG("evergreen_irq_set: sw int gfx\n");
sys/dev/pci/drm/radeon/evergreen.c
4527
DRM_DEBUG("evergreen_irq_set: sw int cp1\n");
sys/dev/pci/drm/radeon/evergreen.c
4531
DRM_DEBUG("evergreen_irq_set: sw int cp2\n");
sys/dev/pci/drm/radeon/evergreen.c
4536
DRM_DEBUG("evergreen_irq_set: sw int gfx\n");
sys/dev/pci/drm/radeon/evergreen.c
4543
DRM_DEBUG("r600_irq_set: sw int dma\n");
sys/dev/pci/drm/radeon/evergreen.c
4550
DRM_DEBUG("r600_irq_set: sw int dma1\n");
sys/dev/pci/drm/radeon/evergreen.c
4556
DRM_DEBUG("dpm thermal\n");
sys/dev/pci/drm/radeon/evergreen.c
4730
DRM_DEBUG("evergreen_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
sys/dev/pci/drm/radeon/evergreen.c
4771
DRM_DEBUG("Unhandled interrupt: %d %d\n",
sys/dev/pci/drm/radeon/evergreen.c
4777
DRM_DEBUG("IH: D%d %s - IH event w/o asserted irq bit?\n",
sys/dev/pci/drm/radeon/evergreen.c
4782
DRM_DEBUG("IH: D%d %s\n", crtc_idx + 1, event_name);
sys/dev/pci/drm/radeon/evergreen.c
4791
DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1);
sys/dev/pci/drm/radeon/evergreen.c
4809
DRM_DEBUG("Unhandled interrupt: %d %d\n",
sys/dev/pci/drm/radeon/evergreen.c
4815
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/evergreen.c
4818
DRM_DEBUG("IH: %s%d\n", event_name, hpd_idx + 1);
sys/dev/pci/drm/radeon/evergreen.c
4830
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/evergreen.c
4834
DRM_DEBUG("IH: HDMI%d\n", afmt_idx + 1);
sys/dev/pci/drm/radeon/evergreen.c
4841
DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
sys/dev/pci/drm/radeon/evergreen.c
4862
DRM_DEBUG("IH: CP int: 0x%08x\n", src_data);
sys/dev/pci/drm/radeon/evergreen.c
4866
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/radeon/evergreen.c
4883
DRM_DEBUG("IH: DMA trap\n");
sys/dev/pci/drm/radeon/evergreen.c
4887
DRM_DEBUG("IH: thermal low to high\n");
sys/dev/pci/drm/radeon/evergreen.c
4892
DRM_DEBUG("IH: thermal high to low\n");
sys/dev/pci/drm/radeon/evergreen.c
4897
DRM_DEBUG("IH: GUI idle\n");
sys/dev/pci/drm/radeon/evergreen.c
4901
DRM_DEBUG("IH: DMA1 trap\n");
sys/dev/pci/drm/radeon/evergreen.c
4906
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/evergreen_cs.c
3434
DRM_DEBUG("Invalid register 0x%x in CS\n", reg);
sys/dev/pci/drm/radeon/evergreen_hdmi.c
336
DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n",
sys/dev/pci/drm/radeon/evergreen_hdmi.c
342
DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n",
sys/dev/pci/drm/radeon/evergreen_hdmi.c
348
DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n",
sys/dev/pci/drm/radeon/evergreen_hdmi.c
438
DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n",
sys/dev/pci/drm/radeon/ni.c
1791
DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
sys/dev/pci/drm/radeon/ni.c
695
DRM_DEBUG("\n");
sys/dev/pci/drm/radeon/r100.c
189
DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");
sys/dev/pci/drm/radeon/r100.c
2108
DRM_DEBUG("pitch %d\n", t->pitch);
sys/dev/pci/drm/radeon/r100.c
2109
DRM_DEBUG("use_pitch %d\n", t->use_pitch);
sys/dev/pci/drm/radeon/r100.c
2110
DRM_DEBUG("width %d\n", t->width);
sys/dev/pci/drm/radeon/r100.c
2111
DRM_DEBUG("width_11 %d\n", t->width_11);
sys/dev/pci/drm/radeon/r100.c
2112
DRM_DEBUG("height %d\n", t->height);
sys/dev/pci/drm/radeon/r100.c
2113
DRM_DEBUG("height_11 %d\n", t->height_11);
sys/dev/pci/drm/radeon/r100.c
2114
DRM_DEBUG("num levels %d\n", t->num_levels);
sys/dev/pci/drm/radeon/r100.c
2115
DRM_DEBUG("depth %d\n", t->txdepth);
sys/dev/pci/drm/radeon/r100.c
2116
DRM_DEBUG("bpp %d\n", t->cpp);
sys/dev/pci/drm/radeon/r100.c
2117
DRM_DEBUG("coordinate type %d\n", t->tex_coord_type);
sys/dev/pci/drm/radeon/r100.c
2118
DRM_DEBUG("width round to power of 2 %d\n", t->roundup_w);
sys/dev/pci/drm/radeon/r100.c
2119
DRM_DEBUG("height round to power of 2 %d\n", t->roundup_h);
sys/dev/pci/drm/radeon/r100.c
2120
DRM_DEBUG("compress format %d\n", t->compress_format);
sys/dev/pci/drm/radeon/r100.c
819
DRM_DEBUG("HPD1\n");
sys/dev/pci/drm/radeon/r100.c
823
DRM_DEBUG("HPD2\n");
sys/dev/pci/drm/radeon/r600.c
1677
DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
sys/dev/pci/drm/radeon/r600.c
2441
DRM_DEBUG("\n");
sys/dev/pci/drm/radeon/r600.c
3815
DRM_DEBUG("dpm thermal\n");
sys/dev/pci/drm/radeon/r600.c
3820
DRM_DEBUG("r600_irq_set: sw int\n");
sys/dev/pci/drm/radeon/r600.c
3826
DRM_DEBUG("r600_irq_set: sw int dma\n");
sys/dev/pci/drm/radeon/r600.c
3832
DRM_DEBUG("r600_irq_set: vblank 0\n");
sys/dev/pci/drm/radeon/r600.c
3837
DRM_DEBUG("r600_irq_set: vblank 1\n");
sys/dev/pci/drm/radeon/r600.c
3841
DRM_DEBUG("r600_irq_set: hpd 1\n");
sys/dev/pci/drm/radeon/r600.c
3845
DRM_DEBUG("r600_irq_set: hpd 2\n");
sys/dev/pci/drm/radeon/r600.c
3849
DRM_DEBUG("r600_irq_set: hpd 3\n");
sys/dev/pci/drm/radeon/r600.c
3853
DRM_DEBUG("r600_irq_set: hpd 4\n");
sys/dev/pci/drm/radeon/r600.c
3857
DRM_DEBUG("r600_irq_set: hpd 5\n");
sys/dev/pci/drm/radeon/r600.c
3861
DRM_DEBUG("r600_irq_set: hpd 6\n");
sys/dev/pci/drm/radeon/r600.c
3865
DRM_DEBUG("r600_irq_set: hdmi 0\n");
sys/dev/pci/drm/radeon/r600.c
3869
DRM_DEBUG("r600_irq_set: hdmi 0\n");
sys/dev/pci/drm/radeon/r600.c
4119
DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
sys/dev/pci/drm/radeon/r600.c
4138
DRM_DEBUG("IH: D1 vblank - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4148
DRM_DEBUG("IH: D1 vblank\n");
sys/dev/pci/drm/radeon/r600.c
4153
DRM_DEBUG("IH: D1 vline - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4156
DRM_DEBUG("IH: D1 vline\n");
sys/dev/pci/drm/radeon/r600.c
4160
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/r600.c
4168
DRM_DEBUG("IH: D2 vblank - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4178
DRM_DEBUG("IH: D2 vblank\n");
sys/dev/pci/drm/radeon/r600.c
4183
DRM_DEBUG("IH: D2 vline - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4186
DRM_DEBUG("IH: D2 vline\n");
sys/dev/pci/drm/radeon/r600.c
4190
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/r600.c
4195
DRM_DEBUG("IH: D1 flip\n");
sys/dev/pci/drm/radeon/r600.c
4200
DRM_DEBUG("IH: D2 flip\n");
sys/dev/pci/drm/radeon/r600.c
4208
DRM_DEBUG("IH: HPD1 - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4212
DRM_DEBUG("IH: HPD1\n");
sys/dev/pci/drm/radeon/r600.c
4216
DRM_DEBUG("IH: HPD2 - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4220
DRM_DEBUG("IH: HPD2\n");
sys/dev/pci/drm/radeon/r600.c
4224
DRM_DEBUG("IH: HPD3 - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4228
DRM_DEBUG("IH: HPD3\n");
sys/dev/pci/drm/radeon/r600.c
4232
DRM_DEBUG("IH: HPD4 - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4236
DRM_DEBUG("IH: HPD4\n");
sys/dev/pci/drm/radeon/r600.c
4240
DRM_DEBUG("IH: HPD5 - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4244
DRM_DEBUG("IH: HPD5\n");
sys/dev/pci/drm/radeon/r600.c
4248
DRM_DEBUG("IH: HPD6 - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4252
DRM_DEBUG("IH: HPD6\n");
sys/dev/pci/drm/radeon/r600.c
4256
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/r600.c
4264
DRM_DEBUG("IH: HDMI0 - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4268
DRM_DEBUG("IH: HDMI0\n");
sys/dev/pci/drm/radeon/r600.c
4273
DRM_DEBUG("IH: HDMI1 - IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/r600.c
4277
DRM_DEBUG("IH: HDMI1\n");
sys/dev/pci/drm/radeon/r600.c
4286
DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
sys/dev/pci/drm/radeon/r600.c
4292
DRM_DEBUG("IH: CP int: 0x%08x\n", src_data);
sys/dev/pci/drm/radeon/r600.c
4296
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/radeon/r600.c
4300
DRM_DEBUG("IH: DMA trap\n");
sys/dev/pci/drm/radeon/r600.c
4304
DRM_DEBUG("IH: thermal low to high\n");
sys/dev/pci/drm/radeon/r600.c
4309
DRM_DEBUG("IH: thermal high to low\n");
sys/dev/pci/drm/radeon/r600.c
4314
DRM_DEBUG("IH: GUI idle\n");
sys/dev/pci/drm/radeon/r600.c
4317
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
sys/dev/pci/drm/radeon/r600_hdmi.c
407
DRM_DEBUG("%s with %d channels, %d Hz sampling rate, %d bits per sample,\n",
sys/dev/pci/drm/radeon/r600_hdmi.c
410
DRM_DEBUG("0x%02X IEC60958 status bits and 0x%02X category code\n",
sys/dev/pci/drm/radeon/r600_hdmi.c
511
DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n",
sys/dev/pci/drm/radeon/radeon_audio.c
340
DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
sys/dev/pci/drm/radeon/radeon_audio.c
527
DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
sys/dev/pci/drm/radeon/radeon_bios.c
858
DRM_DEBUG("%sBIOS detected\n", rdev->is_atom_bios ? "ATOM" : "COM");
sys/dev/pci/drm/radeon/radeon_connectors.c
156
DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
sys/dev/pci/drm/radeon/radeon_connectors.c
168
DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
sys/dev/pci/drm/radeon/radeon_connectors.c
181
DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
sys/dev/pci/drm/radeon/radeon_connectors.c
192
DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
sys/dev/pci/drm/radeon/radeon_connectors.c
198
DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
sys/dev/pci/drm/radeon/radeon_connectors.c
203
DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
sys/dev/pci/drm/radeon/radeon_connectors.c
210
DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",
sys/dev/pci/drm/radeon/radeon_connectors.c
215
DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
sys/dev/pci/drm/radeon/radeon_cursor.c
169
DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);
sys/dev/pci/drm/radeon/radeon_drv.c
1105
DRM_DEBUG("%s card detected\n",
sys/dev/pci/drm/radeon/radeon_drv.c
1246
DRM_DEBUG("Error during ACPI methods call\n");
sys/dev/pci/drm/radeon/radeon_gem.c
185
DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
sys/dev/pci/drm/radeon/radeon_gem.c
657
DRM_DEBUG("%d \n", args->handle);
sys/dev/pci/drm/radeon/radeon_gem.c
675
DRM_DEBUG("\n");
sys/dev/pci/drm/radeon/radeon_i2c.c
1179
DRM_DEBUG("val = 0x%02x\n", *val);
sys/dev/pci/drm/radeon/radeon_i2c.c
1181
DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n",
sys/dev/pci/drm/radeon/radeon_i2c.c
1203
DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n",
sys/dev/pci/drm/radeon/radeon_i2c.c
580
DRM_DEBUG("i2c write error 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/radeon_i2c.c
612
DRM_DEBUG("i2c read error 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/radeon_i2c.c
640
DRM_DEBUG("i2c write error 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/radeon_i2c.c
788
DRM_DEBUG("i2c write error 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/radeon_i2c.c
830
DRM_DEBUG("i2c read error 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/radeon_i2c.c
873
DRM_DEBUG("i2c write error 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/radeon_irq_kms.c
618
DRM_DEBUG("%s%d interrupts enabled\n", name, n);
sys/dev/pci/drm/radeon/radeon_irq_kms.c
621
DRM_DEBUG("%s%d interrupts disabled\n", name, n);
sys/dev/pci/drm/radeon/radeon_legacy_encoders.c
149
DRM_DEBUG("\n");
sys/dev/pci/drm/radeon/radeon_object.c
592
DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
sys/dev/pci/drm/radeon/radeon_ucode.c
100
DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));
sys/dev/pci/drm/radeon/radeon_ucode.c
111
DRM_DEBUG("RLC\n");
sys/dev/pci/drm/radeon/radeon_ucode.c
118
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
120
DRM_DEBUG("save_and_restore_offset: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
122
DRM_DEBUG("clear_state_descriptor_offset: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
124
DRM_DEBUG("avail_scratch_ram_locations: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
126
DRM_DEBUG("master_pkt_description_offset: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
138
DRM_DEBUG("SDMA\n");
sys/dev/pci/drm/radeon/radeon_ucode.c
145
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
147
DRM_DEBUG("ucode_change_version: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
149
DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));
sys/dev/pci/drm/radeon/radeon_ucode.c
150
DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));
sys/dev/pci/drm/radeon/radeon_ucode.c
33
DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
sys/dev/pci/drm/radeon/radeon_ucode.c
34
DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
sys/dev/pci/drm/radeon/radeon_ucode.c
35
DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
sys/dev/pci/drm/radeon/radeon_ucode.c
36
DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
sys/dev/pci/drm/radeon/radeon_ucode.c
37
DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
sys/dev/pci/drm/radeon/radeon_ucode.c
38
DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
sys/dev/pci/drm/radeon/radeon_ucode.c
39
DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
sys/dev/pci/drm/radeon/radeon_ucode.c
40
DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
sys/dev/pci/drm/radeon/radeon_ucode.c
41
DRM_DEBUG("ucode_array_offset_bytes: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
43
DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));
sys/dev/pci/drm/radeon/radeon_ucode.c
51
DRM_DEBUG("MC\n");
sys/dev/pci/drm/radeon/radeon_ucode.c
58
DRM_DEBUG("io_debug_size_bytes: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
60
DRM_DEBUG("io_debug_array_offset_bytes: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
72
DRM_DEBUG("SMC\n");
sys/dev/pci/drm/radeon/radeon_ucode.c
79
DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
sys/dev/pci/drm/radeon/radeon_ucode.c
90
DRM_DEBUG("GFX\n");
sys/dev/pci/drm/radeon/radeon_ucode.c
97
DRM_DEBUG("ucode_feature_version: %u\n",
sys/dev/pci/drm/radeon/radeon_ucode.c
99
DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));
sys/dev/pci/drm/radeon/rs600.c
148
DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");
sys/dev/pci/drm/radeon/rs600.c
318
DRM_DEBUG("Setting: p: %d\n", ps->pcie_lanes);
sys/dev/pci/drm/radeon/rs600.c
818
DRM_DEBUG("HPD1\n");
sys/dev/pci/drm/radeon/rs600.c
822
DRM_DEBUG("HPD2\n");
sys/dev/pci/drm/radeon/rs600.c
826
DRM_DEBUG("HDMI0\n");
sys/dev/pci/drm/radeon/rv730_dpm.c
464
DRM_DEBUG("Could not force DPM to low\n");
sys/dev/pci/drm/radeon/rv770.c
836
DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");
sys/dev/pci/drm/radeon/rv770.c
886
DRM_DEBUG("Setting: v: %d\n", voltage->voltage);
sys/dev/pci/drm/radeon/rv770_dpm.c
1422
DRM_DEBUG("rv770_set_sw_state failed\n");
sys/dev/pci/drm/radeon/rv770_dpm.c
197
DRM_DEBUG("Could not force DPM to low.\n");
sys/dev/pci/drm/radeon/si.c
1662
DRM_DEBUG("\n");
sys/dev/pci/drm/radeon/si.c
3828
DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
sys/dev/pci/drm/radeon/si.c
6062
DRM_DEBUG("si_irq_set: sw int gfx\n");
sys/dev/pci/drm/radeon/si.c
6066
DRM_DEBUG("si_irq_set: sw int cp1\n");
sys/dev/pci/drm/radeon/si.c
6070
DRM_DEBUG("si_irq_set: sw int cp2\n");
sys/dev/pci/drm/radeon/si.c
6074
DRM_DEBUG("si_irq_set: sw int dma\n");
sys/dev/pci/drm/radeon/si.c
6079
DRM_DEBUG("si_irq_set: sw int dma1\n");
sys/dev/pci/drm/radeon/si.c
6093
DRM_DEBUG("dpm thermal\n");
sys/dev/pci/drm/radeon/si.c
6253
DRM_DEBUG("si_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
sys/dev/pci/drm/radeon/si.c
6295
DRM_DEBUG("Unhandled interrupt: %d %d\n",
sys/dev/pci/drm/radeon/si.c
6301
DRM_DEBUG("IH: D%d %s - IH event w/o asserted irq bit?\n",
sys/dev/pci/drm/radeon/si.c
6306
DRM_DEBUG("IH: D%d %s\n", crtc_idx + 1, event_name);
sys/dev/pci/drm/radeon/si.c
6315
DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1);
sys/dev/pci/drm/radeon/si.c
6333
DRM_DEBUG("Unhandled interrupt: %d %d\n",
sys/dev/pci/drm/radeon/si.c
6339
DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
sys/dev/pci/drm/radeon/si.c
6342
DRM_DEBUG("IH: %s%d\n", event_name, hpd_idx + 1);
sys/dev/pci/drm/radeon/si.c
6349
DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
sys/dev/pci/drm/radeon/si.c
6377
DRM_DEBUG("IH: CP EOP\n");
sys/dev/pci/drm/radeon/si.c
6391
DRM_DEBUG("IH: DMA trap\n");
sys/dev/pci/drm/radeon/si.c
6395
DRM_DEBUG("IH: thermal low to high\n");
sys/dev/pci/drm/radeon/si.c
6400
DRM_DEBUG("IH: thermal high to low\n");
sys/dev/pci/drm/radeon/si.c
6405
DRM_DEBUG("IH: GUI idle\n");
sys/dev/pci/drm/radeon/si.c
6408
DRM_DEBUG("IH: DMA1 trap\n");
sys/dev/pci/drm/radeon/si.c
6412
DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);