Symbol: DP_TP_CTL_TRAIN_PAT4_SEL_MASK
sys/dev/pci/drm/i915/display/intel_display_regs.h
2298
#define DP_TP_CTL_TRAIN_PAT4_SEL_TP4A REG_FIELD_PREP(DP_TP_CTL_TRAIN_PAT4_SEL_MASK, 0)
sys/dev/pci/drm/i915/display/intel_display_regs.h
2299
#define DP_TP_CTL_TRAIN_PAT4_SEL_TP4B REG_FIELD_PREP(DP_TP_CTL_TRAIN_PAT4_SEL_MASK, 1)
sys/dev/pci/drm/i915/display/intel_display_regs.h
2300
#define DP_TP_CTL_TRAIN_PAT4_SEL_TP4C REG_FIELD_PREP(DP_TP_CTL_TRAIN_PAT4_SEL_MASK, 2)
sys/dev/pci/drm/i915/display/intel_dp_test.c
237
DP_TP_CTL_TRAIN_PAT4_SEL_MASK | DP_TP_CTL_LINK_TRAIN_MASK,
sys/dev/pci/drm/i915/display/intel_dp_test.c
298
DP_TP_CTL_TRAIN_PAT4_SEL_MASK | DP_TP_CTL_LINK_TRAIN_MASK,