DP_RECEIVER_CAP_SIZE
if (DP_RECEIVER_CAP_SIZE != drm_dp_dpcd_read(&sc->sc_dpaux,
DP_DPCD_REV, sc->sc_dpcd, DP_RECEIVER_CAP_SIZE)) {
uint8_t sc_dpcd[DP_RECEIVER_CAP_SIZE];
u8 dpcd[DP_RECEIVER_CAP_SIZE];
#define DP_DPCD_SIZE DP_RECEIVER_CAP_SIZE
u8 dpcd[DP_RECEIVER_CAP_SIZE];
memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE);
bool drm_dp_downstream_is_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_is_tmds(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
static u8 drm_dp_downstream_port_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
u8 dpcd[DP_RECEIVER_CAP_SIZE])
u8 dpcd_ext[DP_RECEIVER_CAP_SIZE];
drm_dbg_kms(aux->drm_dev, "%s: Base DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
u8 dpcd[DP_RECEIVER_CAP_SIZE])
ret = drm_dp_dpcd_read_data(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE);
drm_dbg_kms(aux->drm_dev, "%s: DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_dotclock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_min_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_420_passthrough(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_444_to_420_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
drm_dp_subconnector_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE], int address,
static int __read_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
if (offset < DP_RECEIVER_CAP_SIZE) {
bool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])
bool drm_dp_vsc_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])
int drm_dp_read_clock_recovery_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_get_pcon_max_frl_bw(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE])
const u8 dpcd[DP_RECEIVER_CAP_SIZE])
const u8 dpcd[DP_RECEIVER_CAP_SIZE])
seq_printf(m, "dpcd: %*ph\n", DP_RECEIVER_CAP_SIZE, buf);
u8 dpcd_ext[DP_RECEIVER_CAP_SIZE];
u8 dpcd[DP_RECEIVER_CAP_SIZE];
u8 dpcd[DP_RECEIVER_CAP_SIZE];
static int intel_dp_init_lttpr_phys(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE])
static int intel_dp_init_lttpr(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE])
int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 dpcd[DP_RECEIVER_CAP_SIZE])
u8 dpcd[DP_RECEIVER_CAP_SIZE];
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE])
int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 dpcd[DP_RECEIVER_CAP_SIZE]);
u8 dpcd_caps[DP_RECEIVER_CAP_SIZE];
u8 dpcd[DP_RECEIVER_CAP_SIZE];
u8 dpcd[DP_RECEIVER_CAP_SIZE];
bool drm_dp_vsc_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
bool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_fast_training_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_tps3_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_max_downspread(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_tps4_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_training_pattern_mask(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_channel_coding_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_128b132b_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_sink_can_do_video_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
int drm_dp_read_clock_recovery_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
u8 dpcd[DP_RECEIVER_CAP_SIZE]);
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_is_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_is_tmds(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_dotclock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_min_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_420_passthrough(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_444_to_420_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
drm_dp_subconnector_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_get_pcon_max_frl_bw(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
u8 dpcd[DP_RECEIVER_CAP_SIZE];
enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
#define DP_DPCD_SIZE DP_RECEIVER_CAP_SIZE
u8 dpcd[DP_RECEIVER_CAP_SIZE];
memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE);
u8 dpcd[DP_RECEIVER_CAP_SIZE];