sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c

298

REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c

302

REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c

310

REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c

318

REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c

327

REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h

132

SE_SF(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h

218

SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h

400

uint8_t DP_PIXEL_ENCODING;

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h

532

uint32_t DP_PIXEL_ENCODING;

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1524

DP_PIXEL_ENCODING, &hw_encoding,

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

341

DP_PIXEL_ENCODING, dp_pixel_encoding,

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

205

SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

413

type DP_PIXEL_ENCODING;\

sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h

116

SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\

sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h

114

SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\

sys/dev/pci/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.h

35

SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\

sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h

115

SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\