DP_MAX_LANE_COUNT
if (drm_dp_dpcd_readb(&amdgpu_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp)
if (dpcd_data[DP_MAX_LANE_COUNT - DP_DPCD_REV] == 0)
DP_MAX_LANE_COUNT - DP_DPCD_REV];
if (dpcd_data[DP_MAX_LANE_COUNT - DP_DPCD_REV] == 0)
DP_MAX_LANE_COUNT - DP_DPCD_REV];
return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
(dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP);
dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED;
if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp)