sys/dev/pci/drm/i915/display/intel_display_power.c

1795

PHY_LDO_SEQ_DELAY(PHY_LDO_DELAY_600NS, DPIO_PHY0) |

sys/dev/pci/drm/i915/display/intel_display_power.c

1797

PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH0) |

sys/dev/pci/drm/i915/display/intel_display_power.c

1798

PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH1) |

sys/dev/pci/drm/i915/display/intel_display_power.c

1817

PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0);

sys/dev/pci/drm/i915/display/intel_display_power.c

1820

PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0);

sys/dev/pci/drm/i915/display/intel_display_power.c

1827

PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1);

sys/dev/pci/drm/i915/display/intel_display_power.c

1830

PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH1);

sys/dev/pci/drm/i915/display/intel_display_power.c

1832

display->power.chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(DPIO_PHY0);

sys/dev/pci/drm/i915/display/intel_display_power.c

1834

display->power.chv_phy_assert[DPIO_PHY0] = false;

sys/dev/pci/drm/i915/display/intel_display_power.c

1836

display->power.chv_phy_assert[DPIO_PHY0] = true;

sys/dev/pci/drm/i915/display/intel_display_power_map.c

481

.bxt.phy = DPIO_PHY0,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

584

.bxt.phy = DPIO_PHY0,

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1371

if (!display->power.chv_phy_assert[DPIO_PHY0])

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1372

phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0) |

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1373

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) |

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1374

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) |

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1375

PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) |

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1376

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) |

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1377

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1));

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1385

phy_status |= PHY_POWERGOOD(DPIO_PHY0);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1388

if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0)

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1389

phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1391

if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1)) == 0)

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1392

phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1396

PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) |

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1397

PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)))

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1398

phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1406

PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) &&

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1408

phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1411

PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH0)))

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1412

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1414

PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH0)))

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1415

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1418

PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1)))

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1419

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1421

PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH1)))

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1422

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1472

phy = DPIO_PHY0;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1533

phy = DPIO_PHY0;

sys/dev/pci/drm/i915/display/intel_display_regs.h

178

#define PHY_POWERGOOD(phy) (((phy) == DPIO_PHY0) ? (1 << 31) : (1 << 30))

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

1032

chv_phy_powergate_ch(display, DPIO_PHY0, DPIO_CH1, false);

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

170

[DPIO_PHY0] = {

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

192

[DPIO_PHY0] = {

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

273

*phy = DPIO_PHY0;

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

681

return DPIO_PHY0;

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

695

return DPIO_PHY0;

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

886

!chv_phy_powergate_ch(display, DPIO_PHY0, DPIO_CH1, true);

sys/dev/pci/drm/i915/display/intel_dpio_phy.h

120

return DPIO_PHY0;

sys/dev/pci/drm/i915/display/intel_dpio_phy.h

124

return DPIO_PHY0;

sys/dev/pci/drm/i915/display/intel_dpll_mgr.c

2046

enum dpio_phy phy = DPIO_PHY0;

sys/dev/pci/drm/i915/display/vlv_sideband.c

19

return phy == DPIO_PHY0 ? VLV_IOSF_SB_DPIO_2 : VLV_IOSF_SB_DPIO;

sys/dev/pci/drm/i915/gvt/display.c

247

vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &=

sys/dev/pci/drm/i915/gvt/display.c

251

vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &= ~BIT(30);

sys/dev/pci/drm/i915/gvt/display.c

311

vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |=

sys/dev/pci/drm/i915/gvt/display.c

313

vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) |=

sys/dev/pci/drm/i915/gvt/display.c

342

vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |=

sys/dev/pci/drm/i915/gvt/display.c

344

vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) |=

sys/dev/pci/drm/i915/gvt/handlers.c

1900

vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &=

sys/dev/pci/drm/i915/gvt/handlers.c

1902

vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |=

sys/dev/pci/drm/i915/gvt/handlers.c

2781

MMIO_DH(BXT_PHY_CTL_FAMILY(DPIO_PHY0), D_BXT,

sys/dev/pci/drm/i915/gvt/handlers.c

2792

MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT,

sys/dev/pci/drm/i915/gvt/handlers.c

2794

MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH0, 0), D_BXT,

sys/dev/pci/drm/i915/gvt/handlers.c

2796

MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1), D_BXT,

sys/dev/pci/drm/i915/gvt/handlers.c

2798

MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH1, 0), D_BXT,

sys/dev/pci/drm/i915/gvt/handlers.c

553

enum dpio_phy phy = DPIO_PHY0;

sys/dev/pci/drm/i915/gvt/handlers.c

565

phy = DPIO_PHY0;

sys/dev/pci/drm/i915/gvt/handlers.c

569

phy = DPIO_PHY0;

sys/dev/pci/drm/i915/gvt/mmio.c

267

vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &=

sys/dev/pci/drm/i915/gvt/mmio.c

271

vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &=

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1140

MMIO_D(BXT_PHY_CTL_FAMILY(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1148

MMIO_D(BXT_PORT_CL1CM_DW0(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1149

MMIO_D(BXT_PORT_CL1CM_DW9(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1150

MMIO_D(BXT_PORT_CL1CM_DW10(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1151

MMIO_D(BXT_PORT_CL1CM_DW28(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1152

MMIO_D(BXT_PORT_CL1CM_DW30(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1153

MMIO_D(BXT_PORT_CL2CM_DW6(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1154

MMIO_D(BXT_PORT_REF_DW3(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1155

MMIO_D(BXT_PORT_REF_DW6(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1156

MMIO_D(BXT_PORT_REF_DW8(DPIO_PHY0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1166

MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1167

MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1168

MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1169

MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1170

MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1171

MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1172

MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1173

MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY0, DPIO_CH0, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1174

MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1175

MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH0, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1176

MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1177

MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY0, DPIO_CH0, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1178

MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY0, DPIO_CH0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1179

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1180

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1181

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 2));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1182

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 3));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1183

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1184

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1185

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 2));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1186

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 3));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1187

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 6));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1188

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 8));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1189

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 9));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1190

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 10));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1191

MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1192

MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1193

MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1194

MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1195

MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1196

MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1197

MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1198

MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1199

MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1200

MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1201

MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1202

MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1203

MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1204

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1205

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1206

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 2));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1207

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 3));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1208

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1209

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1210

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 2));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1211

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 3));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1212

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 6));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1213

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 8));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1214

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 9));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1215

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 10));