sys/dev/pci/drm/i915/display/intel_display_power.c

1798

PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH1) |

sys/dev/pci/drm/i915/display/intel_display_power.c

1827

PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1);

sys/dev/pci/drm/i915/display/intel_display_power.c

1830

PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH1);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1375

PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) |

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1376

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) |

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1377

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1));

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1391

if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1)) == 0)

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1392

phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1397

PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)))

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1406

PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) &&

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1408

phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1418

PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1)))

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1419

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1421

PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH1)))

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1422

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1597

if (ch == DPIO_CH1 && val == 0)

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

1032

chv_phy_powergate_ch(display, DPIO_PHY0, DPIO_CH1, false);

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

177

[DPIO_CH1] = { .port = PORT_C },

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

264

port == phy_info->channel[DPIO_CH1].port) {

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

266

*ch = DPIO_CH1;

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

669

return DPIO_CH1;

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

711

return DPIO_CH1;

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

886

!chv_phy_powergate_ch(display, DPIO_PHY0, DPIO_CH1, true);

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

901

if (ch == DPIO_CH1)

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

909

if (ch == DPIO_CH1)

sys/dev/pci/drm/i915/gvt/handlers.c

2796

MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1), D_BXT,

sys/dev/pci/drm/i915/gvt/handlers.c

2798

MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH1, 0), D_BXT,

sys/dev/pci/drm/i915/gvt/handlers.c

570

ch = DPIO_CH1;

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1191

MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1192

MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1193

MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1194

MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1195

MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1196

MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1197

MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1198

MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1199

MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1200

MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1201

MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1202

MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1203

MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY0, DPIO_CH1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1204

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1205

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1206

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 2));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1207

MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 3));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1208

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1209

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1210

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 2));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1211

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 3));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1212

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 6));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1213

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 8));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1214

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 9));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1215

MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 10));