sys/dev/pci/drm/i915/display/intel_display.c

8285

intel_de_write(display, DPLL(display, pipe),

sys/dev/pci/drm/i915/display/intel_display.c

8287

intel_de_write(display, DPLL(display, pipe), dpll);

sys/dev/pci/drm/i915/display/intel_display.c

8290

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_display.c

8298

intel_de_write(display, DPLL(display, pipe), dpll);

sys/dev/pci/drm/i915/display/intel_display.c

8302

intel_de_write(display, DPLL(display, pipe), dpll);

sys/dev/pci/drm/i915/display/intel_display.c

8303

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_display.c

8336

intel_de_write(display, DPLL(display, pipe), DPLL_VGA_MODE_DIS);

sys/dev/pci/drm/i915/display/intel_display.c

8337

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_display_power.c

1809

u32 status = intel_de_read(display, DPLL(display, PIPE_A));

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1246

u32 val = intel_de_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1252

intel_de_write(display, DPLL(display, pipe), val);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1407

(intel_de_read(display, DPLL(display, PIPE_B)) & DPLL_VCO_ENABLE) == 0)

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

1183

dpll_reg = DPLL(display, 0);

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

1187

dpll_reg = DPLL(display, 0);

sys/dev/pci/drm/i915/display/intel_dpll.c

1844

intel_de_write(display, DPLL(display, pipe),

sys/dev/pci/drm/i915/display/intel_dpll.c

1846

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

sys/dev/pci/drm/i915/display/intel_dpll.c

1849

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_dpll.c

1861

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

sys/dev/pci/drm/i915/display/intel_dpll.c

1866

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

sys/dev/pci/drm/i915/display/intel_dpll.c

1867

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_dpll.c

1989

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

sys/dev/pci/drm/i915/display/intel_dpll.c

1990

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_dpll.c

1993

if (intel_de_wait_for_set(display, DPLL(display, pipe), DPLL_LOCK_VLV, 1))

sys/dev/pci/drm/i915/display/intel_dpll.c

2010

intel_de_write(display, DPLL(display, pipe),

sys/dev/pci/drm/i915/display/intel_dpll.c

2136

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

sys/dev/pci/drm/i915/display/intel_dpll.c

2139

if (intel_de_wait_for_set(display, DPLL(display, pipe), DPLL_LOCK_VLV, 1))

sys/dev/pci/drm/i915/display/intel_dpll.c

2156

intel_de_write(display, DPLL(display, pipe),

sys/dev/pci/drm/i915/display/intel_dpll.c

2182

(intel_de_read(display, DPLL(display, PIPE_B)) &

sys/dev/pci/drm/i915/display/intel_dpll.c

2241

intel_de_write(display, DPLL(display, pipe), val);

sys/dev/pci/drm/i915/display/intel_dpll.c

2242

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_dpll.c

2259

intel_de_write(display, DPLL(display, pipe), val);

sys/dev/pci/drm/i915/display/intel_dpll.c

2260

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_dpll.c

2285

intel_de_write(display, DPLL(display, pipe), DPLL_VGA_MODE_DIS);

sys/dev/pci/drm/i915/display/intel_dpll.c

2286

intel_de_posting_read(display, DPLL(display, pipe));

sys/dev/pci/drm/i915/display/intel_dpll.c

2312

cur_state = intel_de_read(display, DPLL(display, pipe)) & DPLL_VCO_ENABLE;

sys/dev/pci/drm/i915/display/intel_dpll.c

409

hw_state->dpll = intel_de_read(display, DPLL(display, crtc->pipe));

sys/dev/pci/drm/i915/display/intel_dvo.c

461

dpll[pipe] = intel_de_rmw(display, DPLL(display, pipe), 0,

sys/dev/pci/drm/i915/display/intel_dvo.c

468

intel_de_write(display, DPLL(display, pipe), dpll[pipe]);

sys/dev/pci/drm/i915/display/intel_pps.c

130

pll_enabled = intel_de_read(display, DPLL(display, pipe)) & DPLL_VCO_ENABLE;