DML2_MAX_DCN_PIPES
struct dml2_pipe_configuration_descriptor pipe_configurations[DML2_MAX_DCN_PIPES];
struct dml2_hubp_pipe_mcache_regs *per_plane_pipe_mcache_regs[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES];
struct dml2_hubp_pipe_mcache_regs mcache_regs_set[DML2_MAX_DCN_PIPES];
for (i = 0; i < DML2_MAX_DCN_PIPES; i++) {
for (i = 0; i < DML2_MAX_DCN_PIPES; i++) {
for (i = 0; i < DML2_MAX_DCN_PIPES; i++) {
for (i = 0; i < DML2_MAX_DCN_PIPES; i++) {
memset(params->per_plane_pipe_mcache_regs, 0, DML2_MAX_PLANES * DML2_MAX_DCN_PIPES * sizeof(struct dml2_hubp_pipe_mcache_regs *));
bool unoptimizable_streams[DML2_MAX_DCN_PIPES];
int per_pipe_viewport_x_start[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES];
int per_pipe_viewport_x_end[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES];
struct dml2_display_mcache_regs *current_mcache_regs[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES]; //One set per pipe/hubp
struct dml2_display_mcache_regs mcache_regs[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES]; //One set per pipe/hubp
int pipe_vp_startx[DML2_MAX_DCN_PIPES];
int pipe_vp_endx[DML2_MAX_DCN_PIPES];
int pipe_vp_startx[DML2_MAX_DCN_PIPES];
int pipe_vp_endx[DML2_MAX_DCN_PIPES];