sys/dev/pci/drm/i915/display/intel_snps_hdmi_pll.c

106

DIV64_U64_ROUND_CLOSEST(DIV_ROUND_DOWN_ULL(adjusted_vco_clk1, curve_2_scaled1),

sys/dev/pci/drm/i915/gt/selftest_rps.c

685

(int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count,

sys/dev/pci/drm/i915/gt/selftest_rps.c

710

(int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count,

sys/dev/pci/drm/i915/gt/selftest_rps.c

823

(int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count,

sys/dev/pci/drm/i915/gt/selftest_rps.c

848

(int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count,

sys/dev/pci/drm/i915/gvt/display.c

588

vblank_timer->period = DIV64_U64_ROUND_CLOSEST(NSEC_PER_SEC * MSEC_PER_SEC, vblank_timer->vrefresh_k);

sys/dev/pci/drm/i915/gvt/display.c

625

vblank_timer->period = DIV64_U64_ROUND_CLOSEST(NSEC_PER_SEC * MSEC_PER_SEC, vblank_timer->vrefresh_k);

sys/dev/pci/drm/i915/gvt/handlers.c

702

new_rate = DIV64_U64_ROUND_CLOSEST(mul_u64_u32_shr(pixel_clk, MSEC_PER_SEC, 0), mul_u32_u32(htotal + 1, vtotal + 1));