Symbol: DIG_FIFO_OUTPUT_PIXEL_PER_CYCLE
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
599
type DIG_FIFO_OUTPUT_PIXEL_PER_CYCLE;\
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
240
REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_PER_CYCLE, 0x1);
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
243
REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_PER_CYCLE, 0x2);
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
246
REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_PER_CYCLE, 0x3);
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
249
REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_PER_CYCLE, 0x0);
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h
185
SE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_PER_CYCLE, mask_sh),\