Symbol: DIG
games/battlestar/cypher.c
433
case DIG:
games/battlestar/words.c
175
{ "dig", DIG, VERB, NULL },
sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.h
52
SRI(DIG_BE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.h
53
SRI(DIG_BE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.h
86
SRI(DIG_BE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.h
87
SRI(DIG_BE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
102
SRI(AFMT_CNTL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
103
SRI(AFMT_VBI_PACKET_CONTROL1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
104
SRI(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
105
SRI(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
113
SRI(HDMI_DB_CONTROL, DIG, id)
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
44
SRI(AFMT_AVI_INFO0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
45
SRI(AFMT_AVI_INFO1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
46
SRI(AFMT_AVI_INFO2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
47
SRI(AFMT_AVI_INFO3, DIG, id)
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
50
SRI(AFMT_GENERIC_0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
51
SRI(AFMT_GENERIC_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
52
SRI(AFMT_GENERIC_2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
53
SRI(AFMT_GENERIC_3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
54
SRI(AFMT_GENERIC_4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
55
SRI(AFMT_GENERIC_5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
56
SRI(AFMT_GENERIC_6, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
57
SRI(AFMT_GENERIC_7, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
58
SRI(AFMT_GENERIC_HDR, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
59
SRI(AFMT_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
60
SRI(AFMT_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
61
SRI(AFMT_AUDIO_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
62
SRI(AFMT_AUDIO_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
63
SRI(AFMT_AUDIO_SRC_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
64
SRI(AFMT_60958_0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
65
SRI(AFMT_60958_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
66
SRI(AFMT_60958_2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
67
SRI(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
68
SRI(HDMI_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
69
SRI(HDMI_GC, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
70
SRI(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
71
SRI(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
72
SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
73
SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
74
SRI(HDMI_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
75
SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
76
SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
77
SRI(HDMI_ACR_32_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
78
SRI(HDMI_ACR_32_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
79
SRI(HDMI_ACR_44_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
80
SRI(HDMI_ACR_44_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
81
SRI(HDMI_ACR_48_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
82
SRI(HDMI_ACR_48_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
83
SRI(TMDS_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
98
SRI(AFMT_CNTL, DIG, id)
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h
43
SRI(DIG_BE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h
44
SRI(DIG_BE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h
45
SRI(DIG_CLOCK_PATTERN, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h
46
SRI(TMDS_CTL_BITS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
35
SRI(AFMT_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
36
SRI(AFMT_GENERIC_0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
37
SRI(AFMT_GENERIC_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
38
SRI(AFMT_GENERIC_2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
39
SRI(AFMT_GENERIC_3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
40
SRI(AFMT_GENERIC_4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
41
SRI(AFMT_GENERIC_5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
42
SRI(AFMT_GENERIC_6, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
43
SRI(AFMT_GENERIC_7, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
44
SRI(AFMT_GENERIC_HDR, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
45
SRI(AFMT_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
46
SRI(AFMT_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
47
SRI(AFMT_VBI_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
48
SRI(AFMT_AUDIO_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
49
SRI(AFMT_AUDIO_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
50
SRI(AFMT_AUDIO_SRC_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
51
SRI(AFMT_60958_0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
52
SRI(AFMT_60958_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
53
SRI(AFMT_60958_2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
54
SRI(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
55
SRI(DIG_FIFO_STATUS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
56
SRI(HDMI_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
57
SRI(HDMI_DB_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
58
SRI(HDMI_GC, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
59
SRI(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
60
SRI(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
61
SRI(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
62
SRI(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
63
SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
64
SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
65
SRI(HDMI_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
66
SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
67
SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
68
SRI(HDMI_ACR_32_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
69
SRI(HDMI_ACR_32_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
70
SRI(HDMI_ACR_44_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
71
SRI(HDMI_ACR_44_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
72
SRI(HDMI_ACR_48_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
73
SRI(HDMI_ACR_48_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
99
SRI(DIG_CLOCK_PATTERN, DIG, id)
sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.h
207
SRI(DIG_LANE_ENABLE, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.h
208
SRI(TMDS_CTL_BITS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.h
35
SRI(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.h
36
SRI(HDMI_GENERIC_PACKET_CONTROL5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.h
39
SRI(DME_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.h
41
SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.h
32
SRI(DIG_BE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.h
33
SRI(DIG_BE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.h
34
SRI(TMDS_CTL_BITS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.h
35
SRI(TMDS_DCBALANCER_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
104
SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
109
SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
110
SRI(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
111
SRI(DIG_FIFO_STATUS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
112
SRI(DIG_CLOCK_PATTERN, DIG, id)
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
49
SRI(AFMT_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
50
SRI(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
51
SRI(HDMI_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
52
SRI(HDMI_DB_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
53
SRI(HDMI_GC, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
54
SRI(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
55
SRI(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
56
SRI(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
57
SRI(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
58
SRI(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
59
SRI(HDMI_GENERIC_PACKET_CONTROL5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
60
SRI(HDMI_GENERIC_PACKET_CONTROL6, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
61
SRI(HDMI_GENERIC_PACKET_CONTROL7, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
62
SRI(HDMI_GENERIC_PACKET_CONTROL8, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
63
SRI(HDMI_GENERIC_PACKET_CONTROL9, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
64
SRI(HDMI_GENERIC_PACKET_CONTROL10, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
65
SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
66
SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
67
SRI(HDMI_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
68
SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
69
SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
70
SRI(HDMI_ACR_32_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
71
SRI(HDMI_ACR_32_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
72
SRI(HDMI_ACR_44_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
73
SRI(HDMI_ACR_44_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
74
SRI(HDMI_ACR_48_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
75
SRI(HDMI_ACR_48_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.h
33
SRI(DIG_BE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.h
34
SRI(DIG_BE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.h
35
SRI(TMDS_CTL_BITS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.h
36
SRI(TMDS_DCBALANCER_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.h
203
SRI(TMDS_CTL_BITS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.h
67
SRI(TMDS_CTL_BITS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
102
SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
107
SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
108
SRI(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
109
SRI(DIG_CLOCK_PATTERN, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
110
SRI(DIG_FIFO_CTRL0, DIG, id)
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
50
SRI(AFMT_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
51
SRI(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
52
SRI(HDMI_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
53
SRI(HDMI_DB_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
54
SRI(HDMI_GC, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
55
SRI(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
56
SRI(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
57
SRI(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
58
SRI(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
59
SRI(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
60
SRI(HDMI_GENERIC_PACKET_CONTROL5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
61
SRI(HDMI_GENERIC_PACKET_CONTROL6, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
62
SRI(HDMI_GENERIC_PACKET_CONTROL7, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
63
SRI(HDMI_GENERIC_PACKET_CONTROL8, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
64
SRI(HDMI_GENERIC_PACKET_CONTROL9, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
65
SRI(HDMI_GENERIC_PACKET_CONTROL10, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
66
SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
67
SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
68
SRI(HDMI_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
69
SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
70
SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
71
SRI(HDMI_ACR_32_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
72
SRI(HDMI_ACR_32_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
73
SRI(HDMI_ACR_44_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
74
SRI(HDMI_ACR_44_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
75
SRI(HDMI_ACR_48_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
76
SRI(HDMI_ACR_48_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
100
SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
105
SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
106
SRI(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
107
SRI(DIG_FE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
108
SRI(DIG_FE_CLK_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
109
SRI(DIG_CLOCK_PATTERN, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
110
SRI(DIG_FIFO_CTRL0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
111
SRI(STREAM_MAPPER_CONTROL, DIG, id)
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
48
SRI(AFMT_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
49
SRI(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
50
SRI(HDMI_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
51
SRI(HDMI_DB_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
52
SRI(HDMI_GC, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
53
SRI(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
54
SRI(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
55
SRI(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
56
SRI(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
57
SRI(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
58
SRI(HDMI_GENERIC_PACKET_CONTROL5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
59
SRI(HDMI_GENERIC_PACKET_CONTROL6, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
60
SRI(HDMI_GENERIC_PACKET_CONTROL7, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
61
SRI(HDMI_GENERIC_PACKET_CONTROL8, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
62
SRI(HDMI_GENERIC_PACKET_CONTROL9, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
63
SRI(HDMI_GENERIC_PACKET_CONTROL10, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
64
SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
65
SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
66
SRI(HDMI_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
67
SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
68
SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
69
SRI(HDMI_ACR_32_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
70
SRI(HDMI_ACR_32_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
71
SRI(HDMI_ACR_44_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
72
SRI(HDMI_ACR_44_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
73
SRI(HDMI_ACR_48_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
74
SRI(HDMI_ACR_48_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
265
SRI_ARR(AFMT_CNTL, DIG, id), SRI_ARR(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
266
SRI_ARR(HDMI_CONTROL, DIG, id), SRI_ARR(HDMI_DB_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
267
SRI_ARR(HDMI_GC, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
268
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
269
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
270
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
271
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
272
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
273
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
274
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL6, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
275
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL7, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
276
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL8, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
277
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL9, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
278
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL10, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
279
SRI_ARR(HDMI_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
280
SRI_ARR(HDMI_INFOFRAME_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
281
SRI_ARR(HDMI_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
282
SRI_ARR(HDMI_AUDIO_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
283
SRI_ARR(HDMI_ACR_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
284
SRI_ARR(HDMI_ACR_32_0, DIG, id), SRI_ARR(HDMI_ACR_32_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
285
SRI_ARR(HDMI_ACR_44_0, DIG, id), SRI_ARR(HDMI_ACR_44_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
286
SRI_ARR(HDMI_ACR_48_0, DIG, id), SRI_ARR(HDMI_ACR_48_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
302
SRI_ARR(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
306
SRI_ARR(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
307
SRI_ARR(DIG_FE_CNTL, DIG, id), SRI_ARR(DIG_CLOCK_PATTERN, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
308
SRI_ARR(DIG_FIFO_CTRL0, DIG, id)
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
324
SRI_ARR(DIG_BE_CNTL, DIG, id), SRI_ARR(DIG_BE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
325
SRI_ARR(TMDS_CTL_BITS, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
326
SRI_ARR(TMDS_DCBALANCER_CONTROL, DIG, id), SRI_ARR(DP_CONFIG, DP, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
100
SRI_ARR(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
101
SRI_ARR(HDMI_ACR_PACKET_CONTROL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
102
SRI_ARR(HDMI_ACR_32_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
103
SRI_ARR(HDMI_ACR_32_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
104
SRI_ARR(HDMI_ACR_44_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
105
SRI_ARR(HDMI_ACR_44_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
106
SRI_ARR(HDMI_ACR_48_0, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
107
SRI_ARR(HDMI_ACR_48_1, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
133
SRI_ARR(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
138
SRI_ARR(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
139
SRI_ARR(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
140
SRI_ARR(DIG_FE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
141
SRI_ARR(DIG_FE_CLK_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
142
SRI_ARR(DIG_CLOCK_PATTERN, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
143
SRI_ARR(DIG_FIFO_CTRL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
144
SRI_ARR(STREAM_MAPPER_CONTROL, DIG, id)
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
155
SRI_ARR(DIG_BE_CLK_CNTL, DIG, id),\
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
81
SRI_ARR(AFMT_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
82
SRI_ARR(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
83
SRI_ARR(HDMI_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
84
SRI_ARR(HDMI_DB_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
85
SRI_ARR(HDMI_GC, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
86
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
87
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
88
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
89
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
90
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
91
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
92
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL6, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
93
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL7, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
94
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL8, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
95
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL9, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
96
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL10, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
97
SRI_ARR(HDMI_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
98
SRI_ARR(HDMI_INFOFRAME_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
99
SRI_ARR(HDMI_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
177
SRI_ARR(AFMT_CNTL, DIG, id), SRI_ARR(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
178
SRI_ARR(HDMI_CONTROL, DIG, id), SRI_ARR(HDMI_DB_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
179
SRI_ARR(HDMI_GC, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
180
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
181
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
182
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
183
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
184
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
185
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL5, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
186
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL6, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
187
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL7, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
188
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL8, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
189
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL9, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
190
SRI_ARR(HDMI_GENERIC_PACKET_CONTROL10, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
191
SRI_ARR(HDMI_INFOFRAME_CONTROL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
192
SRI_ARR(HDMI_INFOFRAME_CONTROL1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
193
SRI_ARR(HDMI_VBI_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
194
SRI_ARR(HDMI_AUDIO_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
195
SRI_ARR(HDMI_ACR_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
196
SRI_ARR(HDMI_ACR_32_0, DIG, id), SRI_ARR(HDMI_ACR_32_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
197
SRI_ARR(HDMI_ACR_44_0, DIG, id), SRI_ARR(HDMI_ACR_44_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
198
SRI_ARR(HDMI_ACR_48_0, DIG, id), SRI_ARR(HDMI_ACR_48_1, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
214
SRI_ARR(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
218
SRI_ARR(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
219
SRI_ARR(DIG_FE_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
220
SRI_ARR(DIG_FE_EN_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
221
SRI_ARR(DIG_FE_CLK_CNTL, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
222
SRI_ARR(DIG_CLOCK_PATTERN, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
223
SRI_ARR(DIG_FIFO_CTRL0, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
224
SRI_ARR(STREAM_MAPPER_CONTROL, DIG, id)
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
230
SRI_ARR(DIG_BE_CLK_CNTL, DIG, id)