Symbol: wrmsr
sys/arch/amd64/amd64/amd64_mem.c
309
wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~0x800);
sys/arch/amd64/amd64/amd64_mem.c
320
wrmsr(msr, msrv);
sys/arch/amd64/amd64/amd64_mem.c
330
wrmsr(msr, msrv);
sys/arch/amd64/amd64/amd64_mem.c
340
wrmsr(msr, msrv);
sys/arch/amd64/amd64/amd64_mem.c
354
wrmsr(msr, msrv);
sys/arch/amd64/amd64/amd64_mem.c
362
wrmsr(msr + 1, msrv);
sys/arch/amd64/amd64/amd64_mem.c
366
wrmsr(MSR_MTRRdefType, mtrrdef | 0x800);
sys/arch/amd64/amd64/cpu.c
1229
wrmsr(MSR_STAR,
sys/arch/amd64/amd64/cpu.c
1232
wrmsr(MSR_LSTAR, cpu_meltdown ? (uint64_t)Xsyscall_meltdown :
sys/arch/amd64/amd64/cpu.c
1234
wrmsr(MSR_CSTAR, 0);
sys/arch/amd64/amd64/cpu.c
1235
wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D|PSL_AC);
sys/arch/amd64/amd64/cpu.c
1237
wrmsr(MSR_FSBASE, 0);
sys/arch/amd64/amd64/cpu.c
1238
wrmsr(MSR_GSBASE, (u_int64_t)ci);
sys/arch/amd64/amd64/cpu.c
1239
wrmsr(MSR_KERNELGSBASE, 0);
sys/arch/amd64/amd64/cpu.c
1254
wrmsr(MSR_MISC_ENABLE, msr);
sys/arch/amd64/amd64/cpu.c
1267
wrmsr(IA32_DEBUG_INTERFACE, msr);
sys/arch/amd64/amd64/cpu.c
1293
wrmsr(MSR_DE_CFG, nmsr);
sys/arch/amd64/amd64/cpu.c
1300
wrmsr(MSR_DE_CFG, nmsr);
sys/arch/amd64/amd64/cpu.c
1307
wrmsr(MSR_S_CET, (msr & ~MSR_CET_NO_TRACK_EN) | MSR_CET_ENDBR_EN);
sys/arch/amd64/amd64/cpu.c
1330
wrmsr(MSR_TSX_CTRL, msr);
sys/arch/amd64/amd64/cpu.c
1356
wrmsr(MSR_CR_PAT, reg);
sys/arch/amd64/amd64/cpu.c
228
wrmsr(MSR_SPEC_CTRL, SPEC_CTRL_IBRS);
sys/arch/amd64/amd64/cpu.c
845
wrmsr(MSR_XSS, xsave_mask & XFEATURE_XSS_MASK);
sys/arch/amd64/amd64/est.c
500
wrmsr(MSR_PERF_CTL, msr);
sys/arch/amd64/amd64/ghcb.c
344
wrmsr(MSR_SEV_GHCB, ghcb_paddr);
sys/arch/amd64/amd64/ghcb.c
421
wrmsr(MSR_SEV_GHCB, ghcb_paddr);
sys/arch/amd64/amd64/identcpu.c
209
wrmsr(0x110B, msreg);
sys/arch/amd64/amd64/identcpu.c
221
wrmsr(0x1107, msreg);
sys/arch/amd64/amd64/identcpu.c
234
wrmsr(0x1107, msreg);
sys/arch/amd64/amd64/identcpu.c
247
wrmsr(0x1107, msreg);
sys/arch/amd64/amd64/identcpu.c
260
wrmsr(0x1107, msreg);
sys/arch/amd64/amd64/identcpu.c
306
wrmsr(MSR_PERF_FIXED_CTR_CTRL, msr);
sys/arch/amd64/amd64/identcpu.c
309
wrmsr(MSR_PERF_GLOBAL_CTRL, msr);
sys/arch/amd64/amd64/identcpu.c
317
wrmsr(MSR_PERF_FIXED_CTR_CTRL, msr);
sys/arch/amd64/amd64/identcpu.c
321
wrmsr(MSR_PERF_GLOBAL_CTRL, msr);
sys/arch/amd64/amd64/identcpu.c
636
wrmsr(MSR_BIOS_SIGN, 0);
sys/arch/amd64/amd64/k1x-pstate.c
100
wrmsr(MSR_K1X_CONTROL, fid);
sys/arch/amd64/amd64/lapic.c
155
wrmsr(MSR_X2APIC_BASE + (reg >> 4), val);
sys/arch/amd64/amd64/lapic.c
201
wrmsr(MSR_APICBASE, msr);
sys/arch/amd64/amd64/lapic.c
302
wrmsr(MSR_INT_PEN_MSG, msr);
sys/arch/amd64/amd64/machdep.c
1365
wrmsr(MSR_SEV_GHCB, ghcb_paddr);
sys/arch/amd64/amd64/machdep.c
602
wrmsr(MSR_U_CET, msr | MSR_CET_ENDBR_EN | MSR_CET_NO_TRACK_EN);
sys/arch/amd64/amd64/pctr.c
157
wrmsr(msrval, 0);
sys/arch/amd64/amd64/pctr.c
158
wrmsr(msrsel, fn);
sys/arch/amd64/amd64/pctr.c
159
wrmsr(msrval, 0);
sys/arch/amd64/amd64/pctr.c
219
wrmsr(msrval + i, 0);
sys/arch/amd64/amd64/pctr.c
220
wrmsr(msrsel + i, pctr_fn[i]);
sys/arch/amd64/amd64/pctr.c
221
wrmsr(msrval + i, 0);
sys/arch/amd64/amd64/powernow-k8.c
92
wrmsr(MSR_AMDK7_FIDVID_CTL, \
sys/arch/amd64/amd64/trap.c
479
wrmsr(MSR_SEV_GHCB, ghcb_paddr);
sys/arch/amd64/amd64/tsc.c
524
wrmsr(MSR_TSC_ADJUST, 0);
sys/arch/amd64/amd64/ucode.c
211
wrmsr(MSR_PATCH_LOADER, start);
sys/arch/amd64/amd64/ucode.c
256
wrmsr(MSR_BIOS_UPDT_TRIG, data);
sys/arch/amd64/amd64/ucode.c
410
wrmsr(MSR_BIOS_SIGN, 0);
sys/arch/amd64/amd64/vmm_machdep.c
3912
wrmsr(MSR_PRED_CMD, PRED_CMD_IBPB);
sys/arch/amd64/amd64/vmm_machdep.c
6794
wrmsr(MSR_PRED_CMD, PRED_CMD_IBPB);
sys/arch/amd64/amd64/vmm_machdep.c
6803
wrmsr(MSR_AMD_VM_HSAVE_PA, vcpu->vc_svm_hsa_pa);
sys/arch/amd64/amd64/vmm_machdep.c
774
wrmsr(MSR_EFER, msr);
sys/arch/amd64/amd64/vmm_machdep.c
796
wrmsr(MSR_IA32_FEATURE_CONTROL, msr);
sys/arch/amd64/amd64/vmm_machdep.c
838
wrmsr(MSR_EFER, msr);
sys/arch/i386/i386/amdmsr.c
135
wrmsr(req->addr, req->val);
sys/arch/i386/i386/cpu.c
490
wrmsr(MSR_TSX_CTRL, msr);
sys/arch/i386/i386/cpu.c
517
wrmsr(MSR_CR_PAT, reg);
sys/arch/i386/i386/est.c
1256
wrmsr(MSR_PERF_CTL, msr);
sys/arch/i386/i386/i686_mem.c
308
wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRRdefType_ENABLE);
sys/arch/i386/i386/i686_mem.c
319
wrmsr(msr, msrv);
sys/arch/i386/i386/i686_mem.c
329
wrmsr(msr, msrv);
sys/arch/i386/i386/i686_mem.c
339
wrmsr(msr, msrv);
sys/arch/i386/i386/i686_mem.c
353
wrmsr(msr, msrv);
sys/arch/i386/i386/i686_mem.c
361
wrmsr(msr + 1, msrv);
sys/arch/i386/i386/i686_mem.c
365
wrmsr(MSR_MTRRdefType, mtrrdef | MTRRdefType_ENABLE);
sys/arch/i386/i386/k1x-pstate.c
99
wrmsr(MSR_K1X_CONTROL, fid);
sys/arch/i386/i386/k6_mem.c
169
wrmsr(UWCCR, reg);
sys/arch/i386/i386/k6_mem.c
195
wrmsr(UWCCR, reg);
sys/arch/i386/i386/lapic.c
166
wrmsr(MSR_INT_PEN_MSG, msr);
sys/arch/i386/i386/longrun.c
113
wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
sys/arch/i386/i386/longrun.c
117
wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);
sys/arch/i386/i386/machdep.c
1181
wrmsr(0x110B, msreg);
sys/arch/i386/i386/machdep.c
1193
wrmsr(0x1107, msreg);
sys/arch/i386/i386/machdep.c
1206
wrmsr(0x1107, msreg);
sys/arch/i386/i386/machdep.c
1219
wrmsr(0x1107, msreg);
sys/arch/i386/i386/machdep.c
1232
wrmsr(0x1107, msreg);
sys/arch/i386/i386/machdep.c
1514
wrmsr(MSR_SYSENTER_CS, 0);
sys/arch/i386/i386/machdep.c
1539
wrmsr(MSR_BBL_CR_CTL, msr119);
sys/arch/i386/i386/machdep.c
1880
wrmsr(MSR_BIOS_SIGN, 0);
sys/arch/i386/i386/machdep.c
2020
wrmsr(MSR_DE_CFG, nmsr);
sys/arch/i386/i386/machdep.c
2027
wrmsr(MSR_DE_CFG, nmsr);
sys/arch/i386/i386/machdep.c
2044
wrmsr(IA32_DEBUG_INTERFACE, msr);
sys/arch/i386/i386/p4tcc.c
128
wrmsr(MSR_THERM_CONTROL, msreg);
sys/arch/i386/i386/pctr.c
137
wrmsr(P5MSR_CTRSEL, msr11);
sys/arch/i386/i386/pctr.c
138
wrmsr(msr, 0);
sys/arch/i386/i386/pctr.c
166
wrmsr(msrval, 0);
sys/arch/i386/i386/pctr.c
167
wrmsr(msrsel, fn);
sys/arch/i386/i386/pctr.c
168
wrmsr(msrval, 0);
sys/arch/i386/i386/powernow-k7.c
188
wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC);
sys/arch/i386/i386/powernow-k7.c
190
wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_VIDC);
sys/arch/i386/i386/powernow-k7.c
192
wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_VIDC);
sys/arch/i386/i386/powernow-k7.c
194
wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC);
sys/arch/i386/i386/powernow-k7.c
87
wrmsr(MSR_AMDK7_FIDVID_CTL, \
sys/arch/i386/i386/powernow-k8.c
93
wrmsr(MSR_AMDK7_FIDVID_CTL, \
sys/arch/i386/i386/powernow.c
103
wrmsr(MSR_K6_EPMR, 0LL);
sys/arch/i386/i386/powernow.c
63
wrmsr(MSR_K6_EPMR, msrval);
sys/arch/i386/i386/powernow.c
67
wrmsr(MSR_K6_EPMR, 0LL);
sys/arch/i386/i386/powernow.c
95
wrmsr(MSR_K6_EPMR, msrval);
sys/arch/i386/i386/ucode.c
234
wrmsr(MSR_PATCH_LOADER, start);
sys/arch/i386/i386/ucode.c
279
wrmsr(MSR_BIOS_UPDT_TRIG, data);
sys/arch/i386/i386/ucode.c
433
wrmsr(MSR_BIOS_SIGN, 0);
sys/arch/i386/include/cpufunc.h
64
static __inline void wrmsr(u_int, u_int64_t);
sys/arch/i386/isa/clock.c
381
wrmsr(MSR_PERF_FIXED_CTR_CTRL, msr);
sys/arch/i386/isa/clock.c
384
wrmsr(MSR_PERF_GLOBAL_CTRL, msr);
sys/arch/i386/isa/clock.c
392
wrmsr(MSR_PERF_FIXED_CTR_CTRL, msr);
sys/arch/i386/isa/clock.c
396
wrmsr(MSR_PERF_GLOBAL_CTRL, msr);
sys/arch/i386/pci/glxsb.c
264
wrmsr(SB_GLD_MSR_CTRL, msr);
sys/arch/i386/pci/glxsb.c
300
wrmsr(SB_GLD_MSR_CTRL, sc->save_gld_msr);
sys/arch/i386/pci/pciide_machdep.c
180
wrmsr(drive ? GCSC_ATAC_CH0D1_DMA :
sys/arch/i386/pci/pciide_machdep.c
189
wrmsr(drive ? GCSC_ATAC_CH0D1_DMA :
sys/arch/i386/pci/pciide_machdep.c
194
wrmsr(drive ? GCSC_ATAC_CH0D1_DMA :
sys/arch/i386/pci/pciide_machdep.c
198
wrmsr(drive ? GCSC_ATAC_CH0D1_PIO : GCSC_ATAC_CH0D0_PIO,
sys/arch/loongson/dev/glx.c
100
wrmsr(DIVIL_BALL_OPTS, msr | 0x01);
sys/arch/loongson/dev/glx.c
111
wrmsr(PIC_YSEL_LOW, msr);
sys/arch/loongson/dev/glx.c
118
wrmsr(PIC_YSEL_HIGH, msr);
sys/arch/loongson/dev/glx.c
373
wrmsr(pcib_bar_msr[index], msr);
sys/arch/loongson/dev/glx.c
381
wrmsr(GLPCI_GLD_MSR_ERROR, msr);
sys/arch/loongson/dev/glx.c
403
wrmsr(pcib_bar_msr[index],
sys/arch/loongson/dev/glx.c
406
wrmsr(pcib_bar_msr[index], 0UL);
sys/arch/loongson/dev/glx.c
500
wrmsr(GLIU_PAE, msr);
sys/arch/loongson/dev/glx.c
515
wrmsr(IDE_IO_BAR, msr);
sys/arch/loongson/dev/glx.c
517
wrmsr(IDE_IO_BAR, 0);
sys/arch/loongson/dev/glx.c
526
wrmsr(IDE_CFG, (uint32_t)data);
sys/arch/loongson/dev/glx.c
529
wrmsr(IDE_DTC, (uint32_t)data);
sys/arch/loongson/dev/glx.c
532
wrmsr(IDE_ETC, (uint32_t)data);
sys/arch/loongson/dev/glx.c
611
wrmsr(GLIU_PAE, msr);
sys/arch/loongson/dev/glx.c
630
wrmsr(GLIU_IOD_BM1, msr);
sys/arch/loongson/dev/glx.c
632
wrmsr(GLIU_IOD_BM1, 0);
sys/arch/loongson/dev/glx.c
724
wrmsr(USB_MSR_OHCB, msr);
sys/arch/loongson/dev/glx.c
743
wrmsr(GLIU_P2D_BM3, msr);
sys/arch/loongson/dev/glx.c
752
wrmsr(USB_MSR_OHCB, msr);
sys/arch/loongson/dev/glx.c
850
wrmsr(USB_MSR_EHCB, msr);
sys/arch/loongson/dev/glx.c
869
wrmsr(GLIU_P2D_BM4, msr);
sys/arch/loongson/dev/glx.c
878
wrmsr(USB_MSR_EHCB, msr);
sys/arch/loongson/dev/glxclk.c
155
wrmsr(MFGPT_IRQ, wa);
sys/arch/loongson/dev/glxclk.c
163
wrmsr(PIC_ZSEL_LOW, wa);
sys/arch/loongson/loongson/yeeloong_machdep.c
490
wrmsr(GLCP_SYS_RST, rdmsr(GLCP_SYS_RST) | 1);
sys/dev/pci/glxpcib.c
453
wrmsr(glxpcib_msrlist[i], sc->sc_msrsave[i]);
sys/dev/pci/glxpcib.c
492
wrmsr(AMD5536_MFGPT_NR,
sys/dev/pci/glxpcib.c
495
wrmsr(AMD5536_MFGPT_NR,
sys/dev/pci/glxvar.h
22
void wrmsr(uint, uint64_t);
sys/dev/pv/hyperv.c
334
wrmsr(MSR_HV_GUEST_OS_ID, ver);
sys/dev/pv/hyperv.c
372
wrmsr(MSR_HV_HYPERCALL, msr);
sys/dev/pv/hyperv.c
477
wrmsr(MSR_HV_SIMP, simp);
sys/dev/pv/hyperv.c
490
wrmsr(MSR_HV_SIEFP, siefp);
sys/dev/pv/hyperv.c
498
wrmsr(MSR_HV_SINT0 + VMBUS_SINT_MESSAGE, sint);
sys/dev/pv/hyperv.c
503
wrmsr(MSR_HV_SCONTROL, sctrl);
sys/dev/pv/hyperv.c
751
wrmsr(MSR_HV_EOM, 0);
sys/dev/pv/pvclock.c
205
wrmsr(KVM_MSR_SYSTEM_TIME, pa | PVCLOCK_SYSTEM_TIME_ENABLE);
sys/dev/pv/pvclock.c
265
wrmsr(KVM_MSR_SYSTEM_TIME, pa & ~PVCLOCK_SYSTEM_TIME_ENABLE);
sys/dev/pv/pvclock.c
268
wrmsr(KVM_MSR_SYSTEM_TIME, pa | PVCLOCK_SYSTEM_TIME_ENABLE);
sys/dev/pv/pvclock.c
373
wrmsr(KVM_MSR_WALL_CLOCK, sc->sc_paddr + offsetof(struct pvpage, wc));
sys/dev/pv/xen.c
285
wrmsr(regs[1], pa);