sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

466

ranges->reader_wm_sets[num_valid_sets].wm_type = bw_params->wm_table.entries[i].wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

472

if (ranges->reader_wm_sets[num_valid_sets].wm_type == WM_TYPE_PSTATE_CHG) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

686

bw_params->wm_table.entries[i].wm_type = WM_TYPE_PSTATE_CHG;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

347

table->Watermarks.WatermarkRow[WM_DCEFCLK][i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

398

table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

627

bw_params->wm_table.entries[i].wm_type = WM_TYPE_PSTATE_CHG;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

348

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

356

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

364

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

372

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

385

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

393

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

401

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

409

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

434

table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

628

bw_params->wm_table.entries[i].wm_type = WM_TYPE_PSTATE_CHG;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

539

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

547

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

555

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

563

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

576

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

584

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

592

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

600

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

630

table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

881

bw_params->wm_table.entries[i].wm_type = WM_TYPE_PSTATE_CHG;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

308

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

316

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

324

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

332

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

345

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

353

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

361

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

369

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

394

table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

580

bw_params->wm_table.entries[i].wm_type = WM_TYPE_PSTATE_CHG;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

274

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

282

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

290

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

298

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

311

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

319

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

327

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

335

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

360

table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

560

bw_params->wm_table.entries[i].wm_type = WM_TYPE_PSTATE_CHG;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

986

table->Watermarks.WatermarkRow[i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1187

bw_params->wm_table.entries[i].wm_type = WM_TYPE_PSTATE_CHG;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

769

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

777

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

785

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

793

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

806

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

814

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

822

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

830

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

878

table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1319

table->Watermarks.WatermarkRow[i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

190

clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

203

clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE;

sys/dev/pci/drm/amd/display/dc/dm_pp_smu.h

84

uint8_t wm_type;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2295

if (table_entry->wm_type == WM_TYPE_RETRAINING)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2470

bw_params->wm_table.entries[WM_D].wm_type = WM_TYPE_RETRAINING;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

771

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

779

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

787

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

795

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

808

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

816

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

824

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

832

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

845

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

853

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

861

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

869

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

882

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

890

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

898

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

906

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

919

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

927

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

935

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

943

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

956

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

964

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

972

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

980

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

673

base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

695

base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE;

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

714

base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.wm_type = WATERMARKS_MALL;

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

222

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

230

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

238

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

246

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

259

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

267

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

275

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

283

.wm_type = WM_TYPE_PSTATE_CHG,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

444

if (table_entry->wm_type == WM_TYPE_RETRAINING)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

216

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

228

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

241

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

262

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.wm_type = WATERMARKS_MALL;

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr.h

150

unsigned int wm_type;

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr.h

161

uint8_t wm_type;

sys/dev/pci/drm/amd/pm/swsmu/smu12/renoir_ppt.c

1086

clock_ranges->reader_wm_sets[i].wm_type;

sys/dev/pci/drm/amd/pm/swsmu/smu12/renoir_ppt.c

1102

clock_ranges->writer_wm_sets[i].wm_type;