sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4508

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4509

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4510

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4511

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4512

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4513

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4514

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4515

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_INST_DW0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4516

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4517

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4518

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4519

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4520

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4521

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4522

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4523

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1002

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1003

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1004

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1005

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1006

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1007

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1008

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1009

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1010

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1011

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1012

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1013

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1014

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1015

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1016

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

848

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

849

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

850

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

851

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

852

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

853

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

854

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

855

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

856

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

857

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

858

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS2);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

859

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

860

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

861

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

862

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATE_PRIV);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

863

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXCP_FLAG_PRIV);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

864

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXCP_FLAG_USER);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

865

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_TRAP_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

866

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_ACTIVE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

867

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_VALID_AND_IDLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

868

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_DVGPR_ALLOC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

869

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_DVGPR_ALLOC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

870

dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_SCHED_MODE);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2972

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2973

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2974

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2975

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2976

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2977

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2978

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2979

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2980

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2981

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2982

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2983

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2984

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2985

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2986

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2987

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2988

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2989

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2990

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4041

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4042

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4043

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4044

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4045

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4046

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4047

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4048

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4049

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4050

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4051

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4052

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4053

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4054

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4055

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4056

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4057

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4058

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4059

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5184

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5185

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5186

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5187

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5188

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5189

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5190

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5191

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5192

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5193

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5194

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5195

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5196

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5197

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5198

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5199

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5200

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5201

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5202

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1958

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1959

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1960

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1961

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1962

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1963

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1964

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1965

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1966

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1967

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1968

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1969

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1970

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1971

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1972

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1844

wave_status = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1845

wave_pc_lo = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1846

wave_pc_hi = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1848

wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1850

wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1852

wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1854

wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1855

wave_ib_sts = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

747

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

748

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

749

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

750

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

751

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

752

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_HW_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

753

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

754

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

755

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

756

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

757

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

758

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

759

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_IB_DBG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

760

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_M0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

761

dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_MODE);