vreg
pool_init(&ppc_vecpl, sizeof(struct vreg), 16, IPL_NONE, 0, "ppcvec",
struct vreg *pcb_vr; /* Vector unit */
u_int32_t vreg[32][4];
SAVE_VEC_REG(0,&pcb_vr->vreg[0]);
SAVE_VEC_REG(1,&pcb_vr->vreg[1]);
SAVE_VEC_REG(2,&pcb_vr->vreg[2]);
SAVE_VEC_REG(3,&pcb_vr->vreg[3]);
SAVE_VEC_REG(4,&pcb_vr->vreg[4]);
SAVE_VEC_REG(5,&pcb_vr->vreg[5]);
SAVE_VEC_REG(6,&pcb_vr->vreg[6]);
SAVE_VEC_REG(7,&pcb_vr->vreg[7]);
SAVE_VEC_REG(8,&pcb_vr->vreg[8]);
SAVE_VEC_REG(9,&pcb_vr->vreg[9]);
SAVE_VEC_REG(10,&pcb_vr->vreg[10]);
SAVE_VEC_REG(11,&pcb_vr->vreg[11]);
SAVE_VEC_REG(12,&pcb_vr->vreg[12]);
SAVE_VEC_REG(13,&pcb_vr->vreg[13]);
SAVE_VEC_REG(14,&pcb_vr->vreg[14]);
SAVE_VEC_REG(15,&pcb_vr->vreg[15]);
SAVE_VEC_REG(16,&pcb_vr->vreg[16]);
SAVE_VEC_REG(17,&pcb_vr->vreg[17]);
SAVE_VEC_REG(18,&pcb_vr->vreg[18]);
SAVE_VEC_REG(19,&pcb_vr->vreg[19]);
SAVE_VEC_REG(20,&pcb_vr->vreg[20]);
SAVE_VEC_REG(21,&pcb_vr->vreg[21]);
SAVE_VEC_REG(22,&pcb_vr->vreg[22]);
SAVE_VEC_REG(23,&pcb_vr->vreg[23]);
SAVE_VEC_REG(24,&pcb_vr->vreg[24]);
SAVE_VEC_REG(25,&pcb_vr->vreg[25]);
SAVE_VEC_REG(26,&pcb_vr->vreg[26]);
SAVE_VEC_REG(27,&pcb_vr->vreg[27]);
SAVE_VEC_REG(28,&pcb_vr->vreg[28]);
SAVE_VEC_REG(29,&pcb_vr->vreg[29]);
SAVE_VEC_REG(30,&pcb_vr->vreg[30]);
SAVE_VEC_REG(31,&pcb_vr->vreg[31]);
struct vreg *pcb_vr;
LOAD_VEC_REG(0, &pcb_vr->vreg[0]);
LOAD_VEC_REG(1, &pcb_vr->vreg[1]);
LOAD_VEC_REG(2, &pcb_vr->vreg[2]);
LOAD_VEC_REG(3, &pcb_vr->vreg[3]);
LOAD_VEC_REG(4, &pcb_vr->vreg[4]);
LOAD_VEC_REG(5, &pcb_vr->vreg[5]);
LOAD_VEC_REG(6, &pcb_vr->vreg[6]);
LOAD_VEC_REG(7, &pcb_vr->vreg[7]);
LOAD_VEC_REG(8, &pcb_vr->vreg[8]);
LOAD_VEC_REG(9, &pcb_vr->vreg[9]);
LOAD_VEC_REG(10, &pcb_vr->vreg[10]);
LOAD_VEC_REG(11, &pcb_vr->vreg[11]);
LOAD_VEC_REG(12, &pcb_vr->vreg[12]);
LOAD_VEC_REG(13, &pcb_vr->vreg[13]);
LOAD_VEC_REG(14, &pcb_vr->vreg[14]);
LOAD_VEC_REG(15, &pcb_vr->vreg[15]);
LOAD_VEC_REG(16, &pcb_vr->vreg[16]);
LOAD_VEC_REG(17, &pcb_vr->vreg[17]);
LOAD_VEC_REG(18, &pcb_vr->vreg[18]);
LOAD_VEC_REG(19, &pcb_vr->vreg[19]);
LOAD_VEC_REG(20, &pcb_vr->vreg[20]);
LOAD_VEC_REG(21, &pcb_vr->vreg[21]);
LOAD_VEC_REG(22, &pcb_vr->vreg[22]);
LOAD_VEC_REG(23, &pcb_vr->vreg[23]);
LOAD_VEC_REG(24, &pcb_vr->vreg[24]);
LOAD_VEC_REG(25, &pcb_vr->vreg[25]);
LOAD_VEC_REG(26, &pcb_vr->vreg[26]);
LOAD_VEC_REG(27, &pcb_vr->vreg[27]);
LOAD_VEC_REG(28, &pcb_vr->vreg[28]);
LOAD_VEC_REG(29, &pcb_vr->vreg[29]);
LOAD_VEC_REG(30, &pcb_vr->vreg[30]);
LOAD_VEC_REG(31, &pcb_vr->vreg[31]);
struct vreg *pcb_vr = pcb->pcb_vr;
uint8_t vreg, vmask;
ar->ar_vreg = sc->sc_regdata[i].vreg;
rr->rr_vreg = sc->sc_regdata[i].vreg;
uint8_t vreg, vmask;
*vreg = vreg_old;
u32 *vreg, vreg_old;
vreg = &vgpu_vreg(s->vgpu, offset);
*vreg = cmd_val(s, index + 1);
vreg_old = *vreg;
cmdval_new = *vreg;
u32 diff = node->preg ^ node->vreg;
node->offset, node->preg, node->vreg,
u32 vreg;
u32 preg, vreg;
vreg = vgpu_vreg(param->vgpu, offset);
if (preg != vreg) {
node->vreg = vreg;
(*(u32 *)(vgpu->mmio.vreg + i915_mmio_reg_offset(reg)))
(*(u32 *)(vgpu->mmio.vreg + (offset)))
(*(u64 *)(vgpu->mmio.vreg + i915_mmio_reg_offset(reg)))
(*(u64 *)(vgpu->mmio.vreg + (offset)))
void *vreg;
memcpy(vgpu->mmio.vreg, mmio, info->mmio_size);
memcpy(vgpu->mmio.vreg, mmio, GVT_GEN8_MMIO_RESET_OFFSET);
vgpu->mmio.vreg = vzalloc(info->mmio_size);
if (!vgpu->mmio.vreg)
vfree(vgpu->mmio.vreg);
vgpu->mmio.vreg = NULL;