sys/arch/amd64/amd64/vmm_machdep.c
100
int svm_vmgexit_sync_host(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1002
vcpu_readregs_vmx(struct vcpu *vcpu, uint64_t regmask, int loadvmcs,
sys/arch/amd64/amd64/vmm_machdep.c
101
int svm_vmgexit_sync_guest(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1015
if (vcpu_reload_vmcs_vmx(vcpu))
sys/arch/amd64/amd64/vmm_machdep.c
102
int svm_handle_vmgexit(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1024
KASSERT(pa == vcpu->vc_control_pa);
sys/arch/amd64/amd64/vmm_machdep.c
1028
gprs[VCPU_REGS_RAX] = vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
1029
gprs[VCPU_REGS_RBX] = vcpu->vc_gueststate.vg_rbx;
sys/arch/amd64/amd64/vmm_machdep.c
103
int svm_handle_efercr(struct vcpu *, uint64_t);
sys/arch/amd64/amd64/vmm_machdep.c
1030
gprs[VCPU_REGS_RCX] = vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
1031
gprs[VCPU_REGS_RDX] = vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
1032
gprs[VCPU_REGS_RSI] = vcpu->vc_gueststate.vg_rsi;
sys/arch/amd64/amd64/vmm_machdep.c
1033
gprs[VCPU_REGS_RDI] = vcpu->vc_gueststate.vg_rdi;
sys/arch/amd64/amd64/vmm_machdep.c
1034
gprs[VCPU_REGS_R8] = vcpu->vc_gueststate.vg_r8;
sys/arch/amd64/amd64/vmm_machdep.c
1035
gprs[VCPU_REGS_R9] = vcpu->vc_gueststate.vg_r9;
sys/arch/amd64/amd64/vmm_machdep.c
1036
gprs[VCPU_REGS_R10] = vcpu->vc_gueststate.vg_r10;
sys/arch/amd64/amd64/vmm_machdep.c
1037
gprs[VCPU_REGS_R11] = vcpu->vc_gueststate.vg_r11;
sys/arch/amd64/amd64/vmm_machdep.c
1038
gprs[VCPU_REGS_R12] = vcpu->vc_gueststate.vg_r12;
sys/arch/amd64/amd64/vmm_machdep.c
1039
gprs[VCPU_REGS_R13] = vcpu->vc_gueststate.vg_r13;
sys/arch/amd64/amd64/vmm_machdep.c
104
int svm_get_iflag(struct vcpu *, uint64_t);
sys/arch/amd64/amd64/vmm_machdep.c
1040
gprs[VCPU_REGS_R14] = vcpu->vc_gueststate.vg_r14;
sys/arch/amd64/amd64/vmm_machdep.c
1041
gprs[VCPU_REGS_R15] = vcpu->vc_gueststate.vg_r15;
sys/arch/amd64/amd64/vmm_machdep.c
1042
gprs[VCPU_REGS_RBP] = vcpu->vc_gueststate.vg_rbp;
sys/arch/amd64/amd64/vmm_machdep.c
1043
gprs[VCPU_REGS_RIP] = vcpu->vc_gueststate.vg_rip;
sys/arch/amd64/amd64/vmm_machdep.c
105
int svm_handle_msr(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
106
int vmm_handle_xsetbv(struct vcpu *, uint64_t *);
sys/arch/amd64/amd64/vmm_machdep.c
107
int vmx_handle_xsetbv(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
108
int svm_handle_xsetbv(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1083
crs[VCPU_REGS_CR2] = vcpu->vc_gueststate.vg_cr2;
sys/arch/amd64/amd64/vmm_machdep.c
1084
crs[VCPU_REGS_XCR0] = vcpu->vc_gueststate.vg_xcr0;
sys/arch/amd64/amd64/vmm_machdep.c
109
int vmm_handle_cpuid(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
110
int vmx_handle_rdmsr(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1101
msr_store = (struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_save_va;
sys/arch/amd64/amd64/vmm_machdep.c
111
int vmx_handle_wrmsr(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1110
drs[VCPU_REGS_DR0] = vcpu->vc_gueststate.vg_dr0;
sys/arch/amd64/amd64/vmm_machdep.c
1111
drs[VCPU_REGS_DR1] = vcpu->vc_gueststate.vg_dr1;
sys/arch/amd64/amd64/vmm_machdep.c
1112
drs[VCPU_REGS_DR2] = vcpu->vc_gueststate.vg_dr2;
sys/arch/amd64/amd64/vmm_machdep.c
1113
drs[VCPU_REGS_DR3] = vcpu->vc_gueststate.vg_dr3;
sys/arch/amd64/amd64/vmm_machdep.c
1114
drs[VCPU_REGS_DR6] = vcpu->vc_gueststate.vg_dr6;
sys/arch/amd64/amd64/vmm_machdep.c
112
int vmx_handle_cr0_write(struct vcpu *, uint64_t);
sys/arch/amd64/amd64/vmm_machdep.c
113
int vmx_handle_cr4_write(struct vcpu *, uint64_t);
sys/arch/amd64/amd64/vmm_machdep.c
114
int vmx_handle_cr(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1141
vcpu_readregs_svm(struct vcpu *vcpu, uint64_t regmask,
sys/arch/amd64/amd64/vmm_machdep.c
115
int svm_handle_inout(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1150
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
1154
gprs[VCPU_REGS_RBX] = vcpu->vc_gueststate.vg_rbx;
sys/arch/amd64/amd64/vmm_machdep.c
1155
gprs[VCPU_REGS_RCX] = vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
1156
gprs[VCPU_REGS_RDX] = vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
1157
gprs[VCPU_REGS_RSI] = vcpu->vc_gueststate.vg_rsi;
sys/arch/amd64/amd64/vmm_machdep.c
1158
gprs[VCPU_REGS_RDI] = vcpu->vc_gueststate.vg_rdi;
sys/arch/amd64/amd64/vmm_machdep.c
1159
gprs[VCPU_REGS_R8] = vcpu->vc_gueststate.vg_r8;
sys/arch/amd64/amd64/vmm_machdep.c
116
int vmx_handle_inout(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1160
gprs[VCPU_REGS_R9] = vcpu->vc_gueststate.vg_r9;
sys/arch/amd64/amd64/vmm_machdep.c
1161
gprs[VCPU_REGS_R10] = vcpu->vc_gueststate.vg_r10;
sys/arch/amd64/amd64/vmm_machdep.c
1162
gprs[VCPU_REGS_R11] = vcpu->vc_gueststate.vg_r11;
sys/arch/amd64/amd64/vmm_machdep.c
1163
gprs[VCPU_REGS_R12] = vcpu->vc_gueststate.vg_r12;
sys/arch/amd64/amd64/vmm_machdep.c
1164
gprs[VCPU_REGS_R13] = vcpu->vc_gueststate.vg_r13;
sys/arch/amd64/amd64/vmm_machdep.c
1165
gprs[VCPU_REGS_R14] = vcpu->vc_gueststate.vg_r14;
sys/arch/amd64/amd64/vmm_machdep.c
1166
gprs[VCPU_REGS_R15] = vcpu->vc_gueststate.vg_r15;
sys/arch/amd64/amd64/vmm_machdep.c
1167
gprs[VCPU_REGS_RBP] = vcpu->vc_gueststate.vg_rbp;
sys/arch/amd64/amd64/vmm_machdep.c
117
int svm_handle_hlt(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
118
int vmx_handle_hlt(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
119
int vmm_inject_ud(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
120
int vmm_inject_gp(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
121
int vmm_inject_db(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
122
void vmx_handle_intr(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
123
void vmx_handle_misc_enable_msr(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1240
crs[VCPU_REGS_CR2] = vcpu->vc_gueststate.vg_cr2;
sys/arch/amd64/amd64/vmm_machdep.c
1241
crs[VCPU_REGS_XCR0] = vcpu->vc_gueststate.vg_xcr0;
sys/arch/amd64/amd64/vmm_machdep.c
1254
drs[VCPU_REGS_DR0] = vcpu->vc_gueststate.vg_dr0;
sys/arch/amd64/amd64/vmm_machdep.c
1255
drs[VCPU_REGS_DR1] = vcpu->vc_gueststate.vg_dr1;
sys/arch/amd64/amd64/vmm_machdep.c
1256
drs[VCPU_REGS_DR2] = vcpu->vc_gueststate.vg_dr2;
sys/arch/amd64/amd64/vmm_machdep.c
1257
drs[VCPU_REGS_DR3] = vcpu->vc_gueststate.vg_dr3;
sys/arch/amd64/amd64/vmm_machdep.c
1281
vcpu_writeregs_vmx(struct vcpu *vcpu, uint64_t regmask, int loadvmcs,
sys/arch/amd64/amd64/vmm_machdep.c
129
int vmm_get_guest_cpu_cpl(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1295
if (vcpu_reload_vmcs_vmx(vcpu))
sys/arch/amd64/amd64/vmm_machdep.c
130
int vmm_get_guest_cpu_mode(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1304
KASSERT(pa == vcpu->vc_control_pa);
sys/arch/amd64/amd64/vmm_machdep.c
1308
vcpu->vc_gueststate.vg_rax = gprs[VCPU_REGS_RAX];
sys/arch/amd64/amd64/vmm_machdep.c
1309
vcpu->vc_gueststate.vg_rbx = gprs[VCPU_REGS_RBX];
sys/arch/amd64/amd64/vmm_machdep.c
131
int svm_fault_page(struct vcpu *, paddr_t);
sys/arch/amd64/amd64/vmm_machdep.c
1310
vcpu->vc_gueststate.vg_rcx = gprs[VCPU_REGS_RCX];
sys/arch/amd64/amd64/vmm_machdep.c
1311
vcpu->vc_gueststate.vg_rdx = gprs[VCPU_REGS_RDX];
sys/arch/amd64/amd64/vmm_machdep.c
1312
vcpu->vc_gueststate.vg_rsi = gprs[VCPU_REGS_RSI];
sys/arch/amd64/amd64/vmm_machdep.c
1313
vcpu->vc_gueststate.vg_rdi = gprs[VCPU_REGS_RDI];
sys/arch/amd64/amd64/vmm_machdep.c
1314
vcpu->vc_gueststate.vg_r8 = gprs[VCPU_REGS_R8];
sys/arch/amd64/amd64/vmm_machdep.c
1315
vcpu->vc_gueststate.vg_r9 = gprs[VCPU_REGS_R9];
sys/arch/amd64/amd64/vmm_machdep.c
1316
vcpu->vc_gueststate.vg_r10 = gprs[VCPU_REGS_R10];
sys/arch/amd64/amd64/vmm_machdep.c
1317
vcpu->vc_gueststate.vg_r11 = gprs[VCPU_REGS_R11];
sys/arch/amd64/amd64/vmm_machdep.c
1318
vcpu->vc_gueststate.vg_r12 = gprs[VCPU_REGS_R12];
sys/arch/amd64/amd64/vmm_machdep.c
1319
vcpu->vc_gueststate.vg_r13 = gprs[VCPU_REGS_R13];
sys/arch/amd64/amd64/vmm_machdep.c
132
int vmx_fault_page(struct vcpu *, paddr_t);
sys/arch/amd64/amd64/vmm_machdep.c
1320
vcpu->vc_gueststate.vg_r14 = gprs[VCPU_REGS_R14];
sys/arch/amd64/amd64/vmm_machdep.c
1321
vcpu->vc_gueststate.vg_r15 = gprs[VCPU_REGS_R15];
sys/arch/amd64/amd64/vmm_machdep.c
1322
vcpu->vc_gueststate.vg_rbp = gprs[VCPU_REGS_RBP];
sys/arch/amd64/amd64/vmm_machdep.c
1323
vcpu->vc_gueststate.vg_rip = gprs[VCPU_REGS_RIP];
sys/arch/amd64/amd64/vmm_machdep.c
133
int vmx_handle_np_fault(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
134
int svm_handle_np_fault(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
135
int vmm_alloc_vpid_vcpu(uint16_t *, struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1364
vcpu->vc_gueststate.vg_xcr0 = crs[VCPU_REGS_XCR0];
sys/arch/amd64/amd64/vmm_machdep.c
137
int vmm_alloc_asid(uint16_t *, struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1381
msr_store = (struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_save_va;
sys/arch/amd64/amd64/vmm_machdep.c
1390
vcpu->vc_gueststate.vg_dr0 = drs[VCPU_REGS_DR0];
sys/arch/amd64/amd64/vmm_machdep.c
1391
vcpu->vc_gueststate.vg_dr1 = drs[VCPU_REGS_DR1];
sys/arch/amd64/amd64/vmm_machdep.c
1392
vcpu->vc_gueststate.vg_dr2 = drs[VCPU_REGS_DR2];
sys/arch/amd64/amd64/vmm_machdep.c
1393
vcpu->vc_gueststate.vg_dr3 = drs[VCPU_REGS_DR3];
sys/arch/amd64/amd64/vmm_machdep.c
1396
vcpu->vc_gueststate.vg_dr6 = drs[VCPU_REGS_DR6];
sys/arch/amd64/amd64/vmm_machdep.c
1409
if (vmclear(&vcpu->vc_control_pa))
sys/arch/amd64/amd64/vmm_machdep.c
1411
atomic_swap_uint(&vcpu->vc_vmx_vmcs_state, VMCS_CLEARED);
sys/arch/amd64/amd64/vmm_machdep.c
143
void svm_setmsrbr(struct vcpu *, uint32_t);
sys/arch/amd64/amd64/vmm_machdep.c
1431
vcpu_writeregs_svm(struct vcpu *vcpu, uint64_t regmask,
sys/arch/amd64/amd64/vmm_machdep.c
144
void svm_setmsrbw(struct vcpu *, uint32_t);
sys/arch/amd64/amd64/vmm_machdep.c
1440
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
1443
vcpu->vc_gueststate.vg_rax = gprs[VCPU_REGS_RAX];
sys/arch/amd64/amd64/vmm_machdep.c
1444
vcpu->vc_gueststate.vg_rbx = gprs[VCPU_REGS_RBX];
sys/arch/amd64/amd64/vmm_machdep.c
1445
vcpu->vc_gueststate.vg_rcx = gprs[VCPU_REGS_RCX];
sys/arch/amd64/amd64/vmm_machdep.c
1446
vcpu->vc_gueststate.vg_rdx = gprs[VCPU_REGS_RDX];
sys/arch/amd64/amd64/vmm_machdep.c
1447
vcpu->vc_gueststate.vg_rsi = gprs[VCPU_REGS_RSI];
sys/arch/amd64/amd64/vmm_machdep.c
1448
vcpu->vc_gueststate.vg_rdi = gprs[VCPU_REGS_RDI];
sys/arch/amd64/amd64/vmm_machdep.c
1449
vcpu->vc_gueststate.vg_r8 = gprs[VCPU_REGS_R8];
sys/arch/amd64/amd64/vmm_machdep.c
145
void svm_setmsrbrw(struct vcpu *, uint32_t);
sys/arch/amd64/amd64/vmm_machdep.c
1450
vcpu->vc_gueststate.vg_r9 = gprs[VCPU_REGS_R9];
sys/arch/amd64/amd64/vmm_machdep.c
1451
vcpu->vc_gueststate.vg_r10 = gprs[VCPU_REGS_R10];
sys/arch/amd64/amd64/vmm_machdep.c
1452
vcpu->vc_gueststate.vg_r11 = gprs[VCPU_REGS_R11];
sys/arch/amd64/amd64/vmm_machdep.c
1453
vcpu->vc_gueststate.vg_r12 = gprs[VCPU_REGS_R12];
sys/arch/amd64/amd64/vmm_machdep.c
1454
vcpu->vc_gueststate.vg_r13 = gprs[VCPU_REGS_R13];
sys/arch/amd64/amd64/vmm_machdep.c
1455
vcpu->vc_gueststate.vg_r14 = gprs[VCPU_REGS_R14];
sys/arch/amd64/amd64/vmm_machdep.c
1456
vcpu->vc_gueststate.vg_r15 = gprs[VCPU_REGS_R15];
sys/arch/amd64/amd64/vmm_machdep.c
1457
vcpu->vc_gueststate.vg_rbp = gprs[VCPU_REGS_RBP];
sys/arch/amd64/amd64/vmm_machdep.c
1458
vcpu->vc_gueststate.vg_rip = gprs[VCPU_REGS_RIP];
sys/arch/amd64/amd64/vmm_machdep.c
146
void vmx_setmsrbr(struct vcpu *, uint32_t);
sys/arch/amd64/amd64/vmm_machdep.c
147
void vmx_setmsrbw(struct vcpu *, uint32_t);
sys/arch/amd64/amd64/vmm_machdep.c
148
void vmx_setmsrbrw(struct vcpu *, uint32_t);
sys/arch/amd64/amd64/vmm_machdep.c
149
void svm_set_clean(struct vcpu *, uint32_t);
sys/arch/amd64/amd64/vmm_machdep.c
150
void svm_set_dirty(struct vcpu *, uint32_t);
sys/arch/amd64/amd64/vmm_machdep.c
1517
vcpu->vc_gueststate.vg_cr2 = crs[VCPU_REGS_CR2];
sys/arch/amd64/amd64/vmm_machdep.c
1518
vcpu->vc_gueststate.vg_xcr0 = crs[VCPU_REGS_XCR0];
sys/arch/amd64/amd64/vmm_machdep.c
153
int vmm_gpa_is_valid(struct vcpu *vcpu, paddr_t gpa, size_t obj_size);
sys/arch/amd64/amd64/vmm_machdep.c
1531
vcpu->vc_gueststate.vg_dr0 = drs[VCPU_REGS_DR0];
sys/arch/amd64/amd64/vmm_machdep.c
1532
vcpu->vc_gueststate.vg_dr1 = drs[VCPU_REGS_DR1];
sys/arch/amd64/amd64/vmm_machdep.c
1533
vcpu->vc_gueststate.vg_dr2 = drs[VCPU_REGS_DR2];
sys/arch/amd64/amd64/vmm_machdep.c
1534
vcpu->vc_gueststate.vg_dr3 = drs[VCPU_REGS_DR3];
sys/arch/amd64/amd64/vmm_machdep.c
154
void vmm_init_pvclock(struct vcpu *, paddr_t);
sys/arch/amd64/amd64/vmm_machdep.c
155
int vmm_update_pvclock(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
156
void vmm_pv_wall_clock(struct vcpu *, paddr_t);
sys/arch/amd64/amd64/vmm_machdep.c
1560
vcpu_reset_regs_svm(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
sys/arch/amd64/amd64/vmm_machdep.c
1565
vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
160
static int vmx_remote_vmclear(struct cpu_info*, struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1605
if (xsave_mask && !vcpu->vc_seves)
sys/arch/amd64/amd64/vmm_machdep.c
1608
if (vcpu->vc_seves) {
sys/arch/amd64/amd64/vmm_machdep.c
1616
memset((uint8_t *)vcpu->vc_svm_ioio_va, 0xFF, 3 * PAGE_SIZE);
sys/arch/amd64/amd64/vmm_machdep.c
1617
vmcb->v_iopm_pa = (uint64_t)(vcpu->vc_svm_ioio_pa);
sys/arch/amd64/amd64/vmm_machdep.c
1620
memset((uint8_t *)vcpu->vc_msr_bitmap_va, 0xFF, 2 * PAGE_SIZE);
sys/arch/amd64/amd64/vmm_machdep.c
1621
vmcb->v_msrpm_pa = (uint64_t)(vcpu->vc_msr_bitmap_pa);
sys/arch/amd64/amd64/vmm_machdep.c
1622
svm_setmsrbrw(vcpu, MSR_IA32_FEATURE_CONTROL);
sys/arch/amd64/amd64/vmm_machdep.c
1623
svm_setmsrbrw(vcpu, MSR_SYSENTER_CS);
sys/arch/amd64/amd64/vmm_machdep.c
1624
svm_setmsrbrw(vcpu, MSR_SYSENTER_ESP);
sys/arch/amd64/amd64/vmm_machdep.c
1625
svm_setmsrbrw(vcpu, MSR_SYSENTER_EIP);
sys/arch/amd64/amd64/vmm_machdep.c
1626
svm_setmsrbrw(vcpu, MSR_STAR);
sys/arch/amd64/amd64/vmm_machdep.c
1627
svm_setmsrbrw(vcpu, MSR_LSTAR);
sys/arch/amd64/amd64/vmm_machdep.c
1628
svm_setmsrbrw(vcpu, MSR_CSTAR);
sys/arch/amd64/amd64/vmm_machdep.c
1629
svm_setmsrbrw(vcpu, MSR_SFMASK);
sys/arch/amd64/amd64/vmm_machdep.c
1630
svm_setmsrbrw(vcpu, MSR_FSBASE);
sys/arch/amd64/amd64/vmm_machdep.c
1631
svm_setmsrbrw(vcpu, MSR_GSBASE);
sys/arch/amd64/amd64/vmm_machdep.c
1632
svm_setmsrbrw(vcpu, MSR_KERNELGSBASE);
sys/arch/amd64/amd64/vmm_machdep.c
1635
svm_setmsrbrw(vcpu, MSR_SEV_STATUS);
sys/arch/amd64/amd64/vmm_machdep.c
1637
if (vcpu->vc_seves) {
sys/arch/amd64/amd64/vmm_machdep.c
1639
svm_setmsrbrw(vcpu, MSR_SEV_GHCB);
sys/arch/amd64/amd64/vmm_machdep.c
164
void vmx_vcpu_dump_regs(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1642
svm_setmsrbr(vcpu, MSR_XSS);
sys/arch/amd64/amd64/vmm_machdep.c
1649
svm_setmsrbrw(vcpu, MSR_EFER);
sys/arch/amd64/amd64/vmm_machdep.c
165
void vmx_dump_vmcs(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1652
svm_setmsrbr(vcpu, MSR_EFER);
sys/arch/amd64/amd64/vmm_machdep.c
1656
svm_setmsrbr(vcpu, MSR_TSC);
sys/arch/amd64/amd64/vmm_machdep.c
1659
svm_setmsrbr(vcpu, MSR_HWCR);
sys/arch/amd64/amd64/vmm_machdep.c
1660
svm_setmsrbr(vcpu, MSR_PSTATEDEF(0));
sys/arch/amd64/amd64/vmm_machdep.c
1663
vmcb->v_asid = vcpu->vc_vpid;
sys/arch/amd64/amd64/vmm_machdep.c
1679
vmcb->v_n_cr3 = vcpu->vc_parent->vm_pmap->pm_pdirpa;
sys/arch/amd64/amd64/vmm_machdep.c
1682
if (vcpu->vc_sev)
sys/arch/amd64/amd64/vmm_machdep.c
1686
if (vcpu->vc_seves) {
sys/arch/amd64/amd64/vmm_machdep.c
1691
vmcb->v_vmsa_pa = vcpu->vc_svm_vmsa_pa;
sys/arch/amd64/amd64/vmm_machdep.c
1697
if ((ret = vcpu_writeregs_svm(vcpu, VM_RWREGS_ALL, vrs)) != 0)
sys/arch/amd64/amd64/vmm_machdep.c
1701
vcpu->vc_gueststate.vg_xcr0 = XFEATURE_X87 & xsave_mask;
sys/arch/amd64/amd64/vmm_machdep.c
1703
vcpu->vc_parent->vm_pmap->eptp = 0;
sys/arch/amd64/amd64/vmm_machdep.c
1705
ret = vcpu_svm_init_vmsa(vcpu, vrs);
sys/arch/amd64/amd64/vmm_machdep.c
1716
vcpu_svm_init_vmsa(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
sys/arch/amd64/amd64/vmm_machdep.c
1719
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
1722
if (!vcpu->vc_seves)
sys/arch/amd64/amd64/vmm_machdep.c
1725
vmsa = (struct vmsa *)vcpu->vc_svm_vmsa_va;
sys/arch/amd64/amd64/vmm_machdep.c
1748
vmsa->v_xcr0 = vcpu->vc_gueststate.vg_xcr0;
sys/arch/amd64/amd64/vmm_machdep.c
1767
svm_setmsrbr(struct vcpu *vcpu, uint32_t msr)
sys/arch/amd64/amd64/vmm_machdep.c
1772
msrs = (uint8_t *)vcpu->vc_msr_bitmap_va;
sys/arch/amd64/amd64/vmm_machdep.c
1808
svm_setmsrbw(struct vcpu *vcpu, uint32_t msr)
sys/arch/amd64/amd64/vmm_machdep.c
181
const char *vmm_decode_cpu_mode(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
1813
msrs = (uint8_t *)vcpu->vc_msr_bitmap_va;
sys/arch/amd64/amd64/vmm_machdep.c
1849
svm_setmsrbrw(struct vcpu *vcpu, uint32_t msr)
sys/arch/amd64/amd64/vmm_machdep.c
1851
svm_setmsrbr(vcpu, msr);
sys/arch/amd64/amd64/vmm_machdep.c
1852
svm_setmsrbw(vcpu, msr);
sys/arch/amd64/amd64/vmm_machdep.c
1865
vmx_setmsrbr(struct vcpu *vcpu, uint32_t msr)
sys/arch/amd64/amd64/vmm_machdep.c
1870
msrs = (uint8_t *)vcpu->vc_msr_bitmap_va;
sys/arch/amd64/amd64/vmm_machdep.c
1897
vmx_setmsrbw(struct vcpu *vcpu, uint32_t msr)
sys/arch/amd64/amd64/vmm_machdep.c
1902
msrs = (uint8_t *)vcpu->vc_msr_bitmap_va;
sys/arch/amd64/amd64/vmm_machdep.c
1929
vmx_setmsrbrw(struct vcpu *vcpu, uint32_t msr)
sys/arch/amd64/amd64/vmm_machdep.c
1931
vmx_setmsrbr(vcpu, msr);
sys/arch/amd64/amd64/vmm_machdep.c
1932
vmx_setmsrbw(vcpu, msr);
sys/arch/amd64/amd64/vmm_machdep.c
1952
svm_set_clean(struct vcpu *vcpu, uint32_t value)
sys/arch/amd64/amd64/vmm_machdep.c
1960
vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
1979
svm_set_dirty(struct vcpu *vcpu, uint32_t value)
sys/arch/amd64/amd64/vmm_machdep.c
1987
vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
2006
vcpu_reset_regs_vmx(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
sys/arch/amd64/amd64/vmm_machdep.c
2016
rw_assert_wrlock(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
2020
if (vcpu_reload_vmcs_vmx(vcpu)) {
sys/arch/amd64/amd64/vmm_machdep.c
2031
KASSERT(pa == vcpu->vc_control_pa);
sys/arch/amd64/amd64/vmm_machdep.c
2035
vcpu->vc_vmx_basic = rdmsr(IA32_VMX_BASIC);
sys/arch/amd64/amd64/vmm_machdep.c
2036
vcpu->vc_vmx_entry_ctls = rdmsr(IA32_VMX_ENTRY_CTLS);
sys/arch/amd64/amd64/vmm_machdep.c
2037
vcpu->vc_vmx_exit_ctls = rdmsr(IA32_VMX_EXIT_CTLS);
sys/arch/amd64/amd64/vmm_machdep.c
2038
vcpu->vc_vmx_pinbased_ctls = rdmsr(IA32_VMX_PINBASED_CTLS);
sys/arch/amd64/amd64/vmm_machdep.c
2039
vcpu->vc_vmx_procbased_ctls = rdmsr(IA32_VMX_PROCBASED_CTLS);
sys/arch/amd64/amd64/vmm_machdep.c
2042
if (vcpu->vc_vmx_basic & IA32_VMX_TRUE_CTLS_AVAIL) {
sys/arch/amd64/amd64/vmm_machdep.c
2043
vcpu->vc_vmx_true_entry_ctls = rdmsr(IA32_VMX_TRUE_ENTRY_CTLS);
sys/arch/amd64/amd64/vmm_machdep.c
2044
vcpu->vc_vmx_true_exit_ctls = rdmsr(IA32_VMX_TRUE_EXIT_CTLS);
sys/arch/amd64/amd64/vmm_machdep.c
2045
vcpu->vc_vmx_true_pinbased_ctls =
sys/arch/amd64/amd64/vmm_machdep.c
2047
vcpu->vc_vmx_true_procbased_ctls =
sys/arch/amd64/amd64/vmm_machdep.c
2052
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
2054
vcpu->vc_vmx_procbased2_ctls = rdmsr(IA32_VMX_PROCBASED2_CTLS);
sys/arch/amd64/amd64/vmm_machdep.c
2067
if (vcpu->vc_vmx_basic & IA32_VMX_TRUE_CTLS_AVAIL) {
sys/arch/amd64/amd64/vmm_machdep.c
2069
ctrlval = vcpu->vc_vmx_true_pinbased_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2072
ctrlval = vcpu->vc_vmx_pinbased_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2117
if (vcpu->vc_vmx_basic & IA32_VMX_TRUE_CTLS_AVAIL) {
sys/arch/amd64/amd64/vmm_machdep.c
2119
ctrlval = vcpu->vc_vmx_true_procbased_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2122
ctrlval = vcpu->vc_vmx_procbased_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2154
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
2156
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
2159
vcpu->vc_vmx_vpid_enabled = 1;
sys/arch/amd64/amd64/vmm_machdep.c
2163
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
2165
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
2173
ctrlval = vcpu->vc_vmx_procbased2_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2203
if (vcpu->vc_vmx_basic & IA32_VMX_TRUE_CTLS_AVAIL) {
sys/arch/amd64/amd64/vmm_machdep.c
2205
ctrlval = vcpu->vc_vmx_true_exit_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2208
ctrlval = vcpu->vc_vmx_exit_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2247
if (vcpu->vc_vmx_basic & IA32_VMX_TRUE_CTLS_AVAIL) {
sys/arch/amd64/amd64/vmm_machdep.c
2249
ctrlval = vcpu->vc_vmx_true_entry_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2252
ctrlval = vcpu->vc_vmx_entry_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
2270
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
2272
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
2274
if (vmwrite(VMCS_GUEST_VPID, vcpu->vc_vpid)) {
sys/arch/amd64/amd64/vmm_machdep.c
2322
vcpu->vc_vmx_cr0_fixed1 = want1;
sys/arch/amd64/amd64/vmm_machdep.c
2323
vcpu->vc_vmx_cr0_fixed0 = want0;
sys/arch/amd64/amd64/vmm_machdep.c
2385
msr_store = (struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_load_va;
sys/arch/amd64/amd64/vmm_machdep.c
2404
msr_store = (struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_save_va;
sys/arch/amd64/amd64/vmm_machdep.c
2454
vcpu->vc_vmx_msr_exit_save_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2462
vcpu->vc_vmx_msr_exit_load_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2470
vcpu->vc_vmx_msr_exit_save_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2478
vcpu->vc_msr_bitmap_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2502
ret = vcpu_writeregs_vmx(vcpu, VM_RWREGS_ALL, 0, vrs);
sys/arch/amd64/amd64/vmm_machdep.c
2507
memset((uint8_t *)vcpu->vc_msr_bitmap_va, 0xFF, PAGE_SIZE);
sys/arch/amd64/amd64/vmm_machdep.c
2508
vmx_setmsrbrw(vcpu, MSR_IA32_FEATURE_CONTROL);
sys/arch/amd64/amd64/vmm_machdep.c
2509
vmx_setmsrbrw(vcpu, MSR_SYSENTER_CS);
sys/arch/amd64/amd64/vmm_machdep.c
2510
vmx_setmsrbrw(vcpu, MSR_SYSENTER_ESP);
sys/arch/amd64/amd64/vmm_machdep.c
2511
vmx_setmsrbrw(vcpu, MSR_SYSENTER_EIP);
sys/arch/amd64/amd64/vmm_machdep.c
2512
vmx_setmsrbrw(vcpu, MSR_EFER);
sys/arch/amd64/amd64/vmm_machdep.c
2513
vmx_setmsrbrw(vcpu, MSR_STAR);
sys/arch/amd64/amd64/vmm_machdep.c
2514
vmx_setmsrbrw(vcpu, MSR_LSTAR);
sys/arch/amd64/amd64/vmm_machdep.c
2515
vmx_setmsrbrw(vcpu, MSR_CSTAR);
sys/arch/amd64/amd64/vmm_machdep.c
2516
vmx_setmsrbrw(vcpu, MSR_SFMASK);
sys/arch/amd64/amd64/vmm_machdep.c
2517
vmx_setmsrbrw(vcpu, MSR_FSBASE);
sys/arch/amd64/amd64/vmm_machdep.c
2518
vmx_setmsrbrw(vcpu, MSR_GSBASE);
sys/arch/amd64/amd64/vmm_machdep.c
2519
vmx_setmsrbrw(vcpu, MSR_KERNELGSBASE);
sys/arch/amd64/amd64/vmm_machdep.c
2521
vmx_setmsrbr(vcpu, MSR_MISC_ENABLE);
sys/arch/amd64/amd64/vmm_machdep.c
2522
vmx_setmsrbr(vcpu, MSR_TSC);
sys/arch/amd64/amd64/vmm_machdep.c
2526
vmx_setmsrbrw(vcpu, MSR_S_CET);
sys/arch/amd64/amd64/vmm_machdep.c
2532
vcpu->vc_gueststate.vg_xcr0 = XFEATURE_X87 & xsave_mask;
sys/arch/amd64/amd64/vmm_machdep.c
2535
vcpu->vc_shadow_pat = rdmsr(MSR_CR_PAT);
sys/arch/amd64/amd64/vmm_machdep.c
2538
if (vmclear(&vcpu->vc_control_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2542
atomic_swap_uint(&vcpu->vc_vmx_vmcs_state, VMCS_CLEARED);
sys/arch/amd64/amd64/vmm_machdep.c
2565
vcpu_init_vmx(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
2573
if (vmm_alloc_vpid(&vcpu->vc_vpid))
sys/arch/amd64/amd64/vmm_machdep.c
2577
vcpu->vc_control_va = (vaddr_t)km_alloc(PAGE_SIZE, &kv_page, &kp_zero,
sys/arch/amd64/amd64/vmm_machdep.c
2579
vcpu->vc_vmx_vmcs_state = VMCS_CLEARED;
sys/arch/amd64/amd64/vmm_machdep.c
2581
if (!vcpu->vc_control_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2587
if (!pmap_extract(pmap_kernel(), vcpu->vc_control_va,
sys/arch/amd64/amd64/vmm_machdep.c
2588
(paddr_t *)&vcpu->vc_control_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2594
vcpu->vc_msr_bitmap_va = (vaddr_t)km_alloc(PAGE_SIZE, &kv_page, &kp_zero,
sys/arch/amd64/amd64/vmm_machdep.c
2597
if (!vcpu->vc_msr_bitmap_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2603
if (!pmap_extract(pmap_kernel(), vcpu->vc_msr_bitmap_va,
sys/arch/amd64/amd64/vmm_machdep.c
2604
(paddr_t *)&vcpu->vc_msr_bitmap_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2610
vcpu->vc_vmx_msr_exit_load_va = (vaddr_t)km_alloc(PAGE_SIZE, &kv_page,
sys/arch/amd64/amd64/vmm_machdep.c
2613
if (!vcpu->vc_vmx_msr_exit_load_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2619
if (!pmap_extract(pmap_kernel(), vcpu->vc_vmx_msr_exit_load_va,
sys/arch/amd64/amd64/vmm_machdep.c
2620
&vcpu->vc_vmx_msr_exit_load_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2626
vcpu->vc_vmx_msr_exit_save_va = (vaddr_t)km_alloc(PAGE_SIZE, &kv_page,
sys/arch/amd64/amd64/vmm_machdep.c
2629
if (!vcpu->vc_vmx_msr_exit_save_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2635
if (!pmap_extract(pmap_kernel(), vcpu->vc_vmx_msr_exit_save_va,
sys/arch/amd64/amd64/vmm_machdep.c
2636
&vcpu->vc_vmx_msr_exit_save_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2643
vcpu->vc_vmx_msr_entry_load_va = (vaddr_t)km_alloc(PAGE_SIZE, &kv_page,
sys/arch/amd64/amd64/vmm_machdep.c
2646
if (!vcpu->vc_vmx_msr_entry_load_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2652
if (!pmap_extract(pmap_kernel(), vcpu->vc_vmx_msr_entry_load_va,
sys/arch/amd64/amd64/vmm_machdep.c
2653
&vcpu->vc_vmx_msr_entry_load_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2659
vmcs = (struct vmcs *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
2665
if (vmptrld(&vcpu->vc_control_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2671
eptp = vcpu->vc_parent->vm_pmap->pm_pdirpa;
sys/arch/amd64/amd64/vmm_machdep.c
2695
vcpu->vc_parent->vm_pmap->eptp = eptp;
sys/arch/amd64/amd64/vmm_machdep.c
2771
if (vmclear(&vcpu->vc_control_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2778
vcpu_deinit_vmx(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
2798
vcpu_reset_regs(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
sys/arch/amd64/amd64/vmm_machdep.c
2803
ret = vcpu_reset_regs_vmx(vcpu, vrs);
sys/arch/amd64/amd64/vmm_machdep.c
2805
ret = vcpu_reset_regs_svm(vcpu, vrs);
sys/arch/amd64/amd64/vmm_machdep.c
2830
vcpu_init_svm(struct vcpu *vcpu, struct vm_create_params *vcp)
sys/arch/amd64/amd64/vmm_machdep.c
2835
vcpu->vc_sev = vcp->vcp_sev;
sys/arch/amd64/amd64/vmm_machdep.c
2836
vcpu->vc_seves = vcp->vcp_seves;
sys/arch/amd64/amd64/vmm_machdep.c
2839
if (vmm_alloc_asid(&vcpu->vc_vpid, vcpu))
sys/arch/amd64/amd64/vmm_machdep.c
2843
vcpu->vc_control_va = (vaddr_t)km_alloc(PAGE_SIZE, &kv_page, &kp_zero,
sys/arch/amd64/amd64/vmm_machdep.c
2846
if (!vcpu->vc_control_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2852
if (!pmap_extract(pmap_kernel(), vcpu->vc_control_va,
sys/arch/amd64/amd64/vmm_machdep.c
2853
(paddr_t *)&vcpu->vc_control_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2859
(uint64_t)vcpu->vc_control_va,
sys/arch/amd64/amd64/vmm_machdep.c
2860
(uint64_t)vcpu->vc_control_pa);
sys/arch/amd64/amd64/vmm_machdep.c
2864
vcpu->vc_msr_bitmap_va = (vaddr_t)km_alloc(2 * PAGE_SIZE, &kv_any,
sys/arch/amd64/amd64/vmm_machdep.c
2867
if (!vcpu->vc_msr_bitmap_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2873
if (!pmap_extract(pmap_kernel(), vcpu->vc_msr_bitmap_va,
sys/arch/amd64/amd64/vmm_machdep.c
2874
(paddr_t *)&vcpu->vc_msr_bitmap_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2880
(uint64_t)vcpu->vc_msr_bitmap_va,
sys/arch/amd64/amd64/vmm_machdep.c
2881
(uint64_t)vcpu->vc_msr_bitmap_pa);
sys/arch/amd64/amd64/vmm_machdep.c
2884
vcpu->vc_svm_hsa_va = (vaddr_t)km_alloc(PAGE_SIZE, &kv_page,
sys/arch/amd64/amd64/vmm_machdep.c
2887
if (!vcpu->vc_svm_hsa_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2893
if (!pmap_extract(pmap_kernel(), vcpu->vc_svm_hsa_va,
sys/arch/amd64/amd64/vmm_machdep.c
2894
&vcpu->vc_svm_hsa_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2900
(uint64_t)vcpu->vc_svm_hsa_va,
sys/arch/amd64/amd64/vmm_machdep.c
2901
(uint64_t)vcpu->vc_svm_hsa_pa);
sys/arch/amd64/amd64/vmm_machdep.c
2904
vcpu->vc_svm_ioio_va = (vaddr_t)km_alloc(3 * PAGE_SIZE, &kv_any,
sys/arch/amd64/amd64/vmm_machdep.c
2907
if (!vcpu->vc_svm_ioio_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2913
if (!pmap_extract(pmap_kernel(), vcpu->vc_svm_ioio_va,
sys/arch/amd64/amd64/vmm_machdep.c
2914
&vcpu->vc_svm_ioio_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2920
(uint64_t)vcpu->vc_svm_ioio_va,
sys/arch/amd64/amd64/vmm_machdep.c
2921
(uint64_t)vcpu->vc_svm_ioio_pa);
sys/arch/amd64/amd64/vmm_machdep.c
2923
if (vcpu->vc_seves) {
sys/arch/amd64/amd64/vmm_machdep.c
2925
vcpu->vc_svm_vmsa_va = (vaddr_t)km_alloc(PAGE_SIZE, &kv_page,
sys/arch/amd64/amd64/vmm_machdep.c
2928
if (!vcpu->vc_svm_vmsa_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2934
if (!pmap_extract(pmap_kernel(), vcpu->vc_svm_vmsa_va,
sys/arch/amd64/amd64/vmm_machdep.c
2935
&vcpu->vc_svm_vmsa_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
2941
(uint64_t)vcpu->vc_svm_vmsa_va,
sys/arch/amd64/amd64/vmm_machdep.c
2942
(uint64_t)vcpu->vc_svm_vmsa_pa);
sys/arch/amd64/amd64/vmm_machdep.c
2947
vcp->vcp_asid[vcpu->vc_id] = vcpu->vc_vpid;
sys/arch/amd64/amd64/vmm_machdep.c
2951
vcpu_deinit_svm(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
2962
vcpu_init(struct vcpu *vcpu, struct vm_create_params *vcp)
sys/arch/amd64/amd64/vmm_machdep.c
2966
vcpu->vc_virt_mode = vmm_softc->mode;
sys/arch/amd64/amd64/vmm_machdep.c
2967
vcpu->vc_state = VCPU_STATE_STOPPED;
sys/arch/amd64/amd64/vmm_machdep.c
2968
vcpu->vc_vpid = 0;
sys/arch/amd64/amd64/vmm_machdep.c
2969
vcpu->vc_pvclock_system_gpa = 0;
sys/arch/amd64/amd64/vmm_machdep.c
2970
vcpu->vc_last_pcpu = NULL;
sys/arch/amd64/amd64/vmm_machdep.c
2972
rw_init(&vcpu->vc_lock, "vcpu");
sys/arch/amd64/amd64/vmm_machdep.c
2975
vcpu->vc_shadow_pat = rdmsr(MSR_CR_PAT);
sys/arch/amd64/amd64/vmm_machdep.c
2978
ret = vcpu_init_vmx(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
2980
ret = vcpu_init_svm(vcpu, vcp);
sys/arch/amd64/amd64/vmm_machdep.c
2996
vcpu_deinit_vmx(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
2998
if (vcpu->vc_control_va) {
sys/arch/amd64/amd64/vmm_machdep.c
2999
km_free((void *)vcpu->vc_control_va, PAGE_SIZE,
sys/arch/amd64/amd64/vmm_machdep.c
3001
vcpu->vc_control_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3003
if (vcpu->vc_vmx_msr_exit_save_va) {
sys/arch/amd64/amd64/vmm_machdep.c
3004
km_free((void *)vcpu->vc_vmx_msr_exit_save_va,
sys/arch/amd64/amd64/vmm_machdep.c
3006
vcpu->vc_vmx_msr_exit_save_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3008
if (vcpu->vc_vmx_msr_exit_load_va) {
sys/arch/amd64/amd64/vmm_machdep.c
3009
km_free((void *)vcpu->vc_vmx_msr_exit_load_va,
sys/arch/amd64/amd64/vmm_machdep.c
3011
vcpu->vc_vmx_msr_exit_load_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3014
if (vcpu->vc_vmx_msr_entry_load_va) {
sys/arch/amd64/amd64/vmm_machdep.c
3015
km_free((void *)vcpu->vc_vmx_msr_entry_load_va,
sys/arch/amd64/amd64/vmm_machdep.c
3017
vcpu->vc_vmx_msr_entry_load_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3021
vmm_free_vpid(vcpu->vc_vpid);
sys/arch/amd64/amd64/vmm_machdep.c
3033
vcpu_deinit_svm(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
3035
if (vcpu->vc_control_va) {
sys/arch/amd64/amd64/vmm_machdep.c
3036
km_free((void *)vcpu->vc_control_va, PAGE_SIZE, &kv_page,
sys/arch/amd64/amd64/vmm_machdep.c
3038
vcpu->vc_control_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3040
if (vcpu->vc_msr_bitmap_va) {
sys/arch/amd64/amd64/vmm_machdep.c
3041
km_free((void *)vcpu->vc_msr_bitmap_va, 2 * PAGE_SIZE, &kv_any,
sys/arch/amd64/amd64/vmm_machdep.c
3043
vcpu->vc_msr_bitmap_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3045
if (vcpu->vc_svm_hsa_va) {
sys/arch/amd64/amd64/vmm_machdep.c
3046
km_free((void *)vcpu->vc_svm_hsa_va, PAGE_SIZE, &kv_page,
sys/arch/amd64/amd64/vmm_machdep.c
3048
vcpu->vc_svm_hsa_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3050
if (vcpu->vc_svm_vmsa_va) {
sys/arch/amd64/amd64/vmm_machdep.c
3051
km_free((void *)vcpu->vc_svm_vmsa_va, PAGE_SIZE, &kv_page,
sys/arch/amd64/amd64/vmm_machdep.c
3053
vcpu->vc_svm_vmsa_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3055
if (vcpu->vc_svm_ioio_va) {
sys/arch/amd64/amd64/vmm_machdep.c
3056
km_free((void *)vcpu->vc_svm_ioio_va, 3 * PAGE_SIZE, &kv_any,
sys/arch/amd64/amd64/vmm_machdep.c
3058
vcpu->vc_svm_ioio_va = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3061
vmm_free_vpid(vcpu->vc_vpid);
sys/arch/amd64/amd64/vmm_machdep.c
3073
vcpu_deinit(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
3076
vcpu_deinit_vmx(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
3078
vcpu_deinit_svm(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
3095
vcpu_vmx_check_cap(struct vcpu *vcpu, uint32_t msr, uint32_t cap, int set)
sys/arch/amd64/amd64/vmm_machdep.c
3099
if (vcpu->vc_vmx_basic & IA32_VMX_TRUE_CTLS_AVAIL) {
sys/arch/amd64/amd64/vmm_machdep.c
3102
ctl = vcpu->vc_vmx_true_pinbased_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3105
ctl = vcpu->vc_vmx_true_procbased_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3108
ctl = vcpu->vc_vmx_procbased2_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3111
ctl = vcpu->vc_vmx_true_entry_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3114
ctl = vcpu->vc_vmx_true_exit_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3122
ctl = vcpu->vc_vmx_pinbased_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3125
ctl = vcpu->vc_vmx_procbased_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3128
ctl = vcpu->vc_vmx_procbased2_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3131
ctl = vcpu->vc_vmx_entry_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3134
ctl = vcpu->vc_vmx_exit_ctls;
sys/arch/amd64/amd64/vmm_machdep.c
3354
struct vcpu *vcpu;
sys/arch/amd64/amd64/vmm_machdep.c
3365
vcpu = vm_find_vcpu(vm, vrp->vrp_vcpu_id);
sys/arch/amd64/amd64/vmm_machdep.c
3366
if (vcpu == NULL) {
sys/arch/amd64/amd64/vmm_machdep.c
3375
rw_enter_write(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
3378
if (atomic_cas_uint(&vcpu->vc_state, old, next) != old) {
sys/arch/amd64/amd64/vmm_machdep.c
3389
ret = copyin(vrp->vrp_exit, &vcpu->vc_exit, sizeof(struct vm_exit));
sys/arch/amd64/amd64/vmm_machdep.c
3393
vcpu->vc_inject.vie_type = vrp->vrp_inject.vie_type;
sys/arch/amd64/amd64/vmm_machdep.c
3394
vcpu->vc_inject.vie_vector = vrp->vrp_inject.vie_vector;
sys/arch/amd64/amd64/vmm_machdep.c
3395
vcpu->vc_inject.vie_errorcode = vrp->vrp_inject.vie_errorcode;
sys/arch/amd64/amd64/vmm_machdep.c
3397
WRITE_ONCE(vcpu->vc_curcpu, curcpu());
sys/arch/amd64/amd64/vmm_machdep.c
3399
if (vcpu->vc_virt_mode == VMM_MODE_EPT) {
sys/arch/amd64/amd64/vmm_machdep.c
3400
vcpu_rv = vcpu_run_vmx(vcpu, vrp);
sys/arch/amd64/amd64/vmm_machdep.c
3401
} else if (vcpu->vc_virt_mode == VMM_MODE_RVI) {
sys/arch/amd64/amd64/vmm_machdep.c
3402
vcpu_rv = vcpu_run_svm(vcpu, vrp);
sys/arch/amd64/amd64/vmm_machdep.c
3404
WRITE_ONCE(vcpu->vc_curcpu, NULL);
sys/arch/amd64/amd64/vmm_machdep.c
3409
: vcpu->vc_gueststate.vg_exit_reason;
sys/arch/amd64/amd64/vmm_machdep.c
3410
vrp->vrp_irqready = vcpu->vc_irqready;
sys/arch/amd64/amd64/vmm_machdep.c
3411
vcpu->vc_state = VCPU_STATE_STOPPED;
sys/arch/amd64/amd64/vmm_machdep.c
3412
ret = copyout(&vcpu->vc_exit, vrp->vrp_exit,
sys/arch/amd64/amd64/vmm_machdep.c
3417
vcpu->vc_state = VCPU_STATE_TERMINATED;
sys/arch/amd64/amd64/vmm_machdep.c
3420
rw_exit_write(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
3433
vmm_fpurestore(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
3437
rw_assert_wrlock(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
3445
if (vcpu->vc_fpuinited)
sys/arch/amd64/amd64/vmm_machdep.c
3446
xrstor_kern(&vcpu->vc_g_fpu, xsave_mask);
sys/arch/amd64/amd64/vmm_machdep.c
3450
if (xsetbv_user(0, vcpu->vc_gueststate.vg_xcr0)) {
sys/arch/amd64/amd64/vmm_machdep.c
3453
__func__, vcpu->vc_gueststate.vg_xcr0, xsave_mask);
sys/arch/amd64/amd64/vmm_machdep.c
3467
vmm_fpusave(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
3469
rw_assert_wrlock(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
3473
vcpu->vc_gueststate.vg_xcr0 = xgetbv(0);
sys/arch/amd64/amd64/vmm_machdep.c
348
struct vcpu *vcpu;
sys/arch/amd64/amd64/vmm_machdep.c
3483
fpusavereset(&vcpu->vc_g_fpu);
sys/arch/amd64/amd64/vmm_machdep.c
3484
vcpu->vc_fpuinited = 1;
sys/arch/amd64/amd64/vmm_machdep.c
3515
vmm_translate_gva(struct vcpu *vcpu, uint64_t va, uint64_t *pa, int mode)
sys/arch/amd64/amd64/vmm_machdep.c
3526
if (vcpu_readregs_vmx(vcpu, VM_RWREGS_ALL, 1, &vrs))
sys/arch/amd64/amd64/vmm_machdep.c
3529
if (vcpu_readregs_svm(vcpu, VM_RWREGS_ALL, &vrs))
sys/arch/amd64/amd64/vmm_machdep.c
3585
if (!pmap_extract(vcpu->vc_parent->vm_pmap, pte_paddr,
sys/arch/amd64/amd64/vmm_machdep.c
3612
if ((vcpu->vc_exit.cpl > 0) && !(pte & PG_u))
sys/arch/amd64/amd64/vmm_machdep.c
362
SLIST_FOREACH(vcpu, &vm->vm_vcpu_list, vc_vcpu_link) {
sys/arch/amd64/amd64/vmm_machdep.c
363
err = rw_enter(&vcpu->vc_lock, RW_WRITE | RW_NOSLEEP);
sys/arch/amd64/amd64/vmm_machdep.c
3658
vcpu_run_vmx(struct vcpu *vcpu, struct vm_run_params *vrp)
sys/arch/amd64/amd64/vmm_machdep.c
3671
rw_assert_wrlock(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
3673
if (vcpu_reload_vmcs_vmx(vcpu)) {
sys/arch/amd64/amd64/vmm_machdep.c
368
if (atomic_load_int(&vcpu->vc_vmx_vmcs_state)
sys/arch/amd64/amd64/vmm_machdep.c
3685
vcpu->vc_intr = 1;
sys/arch/amd64/amd64/vmm_machdep.c
3687
vcpu->vc_intr = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3689
switch (vcpu->vc_gueststate.vg_exit_reason) {
sys/arch/amd64/amd64/vmm_machdep.c
3691
if (vcpu->vc_exit.vei.vei_dir == VEI_DIR_IN)
sys/arch/amd64/amd64/vmm_machdep.c
3692
vcpu->vc_gueststate.vg_rax = vcpu->vc_exit.vei.vei_data;
sys/arch/amd64/amd64/vmm_machdep.c
3693
vcpu->vc_gueststate.vg_rip =
sys/arch/amd64/amd64/vmm_machdep.c
3694
vcpu->vc_exit.vrs.vrs_gprs[VCPU_REGS_RIP];
sys/arch/amd64/amd64/vmm_machdep.c
3695
if (vmwrite(VMCS_GUEST_IA32_RIP, vcpu->vc_gueststate.vg_rip)) {
sys/arch/amd64/amd64/vmm_machdep.c
3701
ret = vcpu_writeregs_vmx(vcpu, VM_RWREGS_GPRS, 0,
sys/arch/amd64/amd64/vmm_machdep.c
3702
&vcpu->vc_exit.vrs);
sys/arch/amd64/amd64/vmm_machdep.c
3705
__func__, vcpu->vc_parent->vm_id, vcpu->vc_id);
sys/arch/amd64/amd64/vmm_machdep.c
371
__func__, vcpu->vc_id, vm->vm_id);
sys/arch/amd64/amd64/vmm_machdep.c
3710
memset(&vcpu->vc_exit, 0, sizeof(vcpu->vc_exit));
sys/arch/amd64/amd64/vmm_machdep.c
3714
if (vcpu->vc_inject.vie_type == VCPU_INJECT_INTR) {
sys/arch/amd64/amd64/vmm_machdep.c
372
rw_exit_write(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
3722
if (!(int_st & 0x3) && vcpu->vc_irqready) {
sys/arch/amd64/amd64/vmm_machdep.c
3723
eii = (uint64_t)vcpu->vc_inject.vie_vector;
sys/arch/amd64/amd64/vmm_machdep.c
3731
vcpu->vc_inject.vie_type = VCPU_INJECT_NONE;
sys/arch/amd64/amd64/vmm_machdep.c
3733
} else if (!vcpu->vc_intr) {
sys/arch/amd64/amd64/vmm_machdep.c
3751
msr_store = (struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_load_va;
sys/arch/amd64/amd64/vmm_machdep.c
3756
KASSERT(pa == vcpu->vc_control_pa);
sys/arch/amd64/amd64/vmm_machdep.c
3759
vmm_update_pvclock(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
3763
vcpu->vc_last_pcpu = ci;
sys/arch/amd64/amd64/vmm_machdep.c
3767
vcpu->vc_parent->vm_pmap);
sys/arch/amd64/amd64/vmm_machdep.c
377
if (vcpu->vc_last_pcpu != curcpu()) {
sys/arch/amd64/amd64/vmm_machdep.c
3771
vid_ept.vid_eptp = vcpu->vc_parent->vm_pmap->eptp;
sys/arch/amd64/amd64/vmm_machdep.c
379
err = vmx_remote_vmclear(vcpu->vc_last_pcpu,
sys/arch/amd64/amd64/vmm_machdep.c
380
vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
3831
if (vcpu->vc_inject.vie_type == VCPU_INJECT_EX) {
sys/arch/amd64/amd64/vmm_machdep.c
3832
eii = (uint64_t)vcpu->vc_inject.vie_vector;
sys/arch/amd64/amd64/vmm_machdep.c
3835
switch (vcpu->vc_inject.vie_vector) {
sys/arch/amd64/amd64/vmm_machdep.c
384
vcpu->vc_id, vm->vm_id);
sys/arch/amd64/amd64/vmm_machdep.c
3868
if (vcpu->vc_inject.vie_vector == VMM_EX_AC)
sys/arch/amd64/amd64/vmm_machdep.c
3869
vcpu->vc_inject.vie_errorcode = 0;
sys/arch/amd64/amd64/vmm_machdep.c
3878
vcpu->vc_inject.vie_errorcode)) {
sys/arch/amd64/amd64/vmm_machdep.c
389
if ((err = vmclear(&vcpu->vc_control_pa)))
sys/arch/amd64/amd64/vmm_machdep.c
3893
vcpu->vc_inject.vie_type = VCPU_INJECT_NONE;
sys/arch/amd64/amd64/vmm_machdep.c
3896
if (vcpu->vc_vmx_vpid_enabled) {
sys/arch/amd64/amd64/vmm_machdep.c
3898
vid.vid_vpid = vcpu->vc_vpid;
sys/arch/amd64/amd64/vmm_machdep.c
3907
if ((ret = vmm_fpurestore(vcpu))) {
sys/arch/amd64/amd64/vmm_machdep.c
3912
TRACEPOINT(vmm, guest_enter, vcpu, vrp);
sys/arch/amd64/amd64/vmm_machdep.c
3918
if (ci->ci_guest_vcpu != vcpu &&
sys/arch/amd64/amd64/vmm_machdep.c
392
vcpu->vc_id, vm->vm_id);
sys/arch/amd64/amd64/vmm_machdep.c
3921
ci->ci_guest_vcpu = vcpu;
sys/arch/amd64/amd64/vmm_machdep.c
3926
wrpkru(0, vcpu->vc_pkru);
sys/arch/amd64/amd64/vmm_machdep.c
3928
ret = vmx_enter_guest(&vcpu->vc_control_pa,
sys/arch/amd64/amd64/vmm_machdep.c
3929
&vcpu->vc_gueststate,
sys/arch/amd64/amd64/vmm_machdep.c
393
atomic_swap_uint(&vcpu->vc_vmx_vmcs_state,
sys/arch/amd64/amd64/vmm_machdep.c
3930
(vcpu->vc_vmx_vmcs_state == VMCS_LAUNCHED),
sys/arch/amd64/amd64/vmm_machdep.c
3935
vcpu->vc_pkru = rdpkru(0);
sys/arch/amd64/amd64/vmm_machdep.c
3953
vmm_fpusave(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
3956
atomic_swap_uint(&vcpu->vc_vmx_vmcs_state, VMCS_LAUNCHED);
sys/arch/amd64/amd64/vmm_machdep.c
3962
&vcpu->vc_gueststate.vg_rip, &exit_reason);
sys/arch/amd64/amd64/vmm_machdep.c
397
rw_exit_write(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
3974
vcpu->vc_gueststate.vg_exit_reason = exit_reason;
sys/arch/amd64/amd64/vmm_machdep.c
3975
TRACEPOINT(vmm, guest_exit, vcpu, vrp, exit_reason);
sys/arch/amd64/amd64/vmm_machdep.c
3979
&vcpu->vc_gueststate.vg_rflags)) {
sys/arch/amd64/amd64/vmm_machdep.c
3990
ret = vmx_handle_exit(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
3992
if (vcpu->vc_gueststate.vg_rflags & PSL_I)
sys/arch/amd64/amd64/vmm_machdep.c
3993
vcpu->vc_irqready = 1;
sys/arch/amd64/amd64/vmm_machdep.c
3995
vcpu->vc_irqready = 0;
sys/arch/amd64/amd64/vmm_machdep.c
4001
if (vcpu->vc_irqready == 0 && vcpu->vc_intr) {
sys/arch/amd64/amd64/vmm_machdep.c
401
vcpu->vc_id, vm->vm_id);
sys/arch/amd64/amd64/vmm_machdep.c
4022
if (ret || vcpu_must_stop(vcpu))
sys/arch/amd64/amd64/vmm_machdep.c
4025
if (vcpu->vc_intr && vcpu->vc_irqready) {
sys/arch/amd64/amd64/vmm_machdep.c
4045
(vcpu->vc_vmx_vmcs_state == VMCS_LAUNCHED
sys/arch/amd64/amd64/vmm_machdep.c
4051
(vcpu->vc_vmx_vmcs_state == VMCS_LAUNCHED
sys/arch/amd64/amd64/vmm_machdep.c
4057
(vcpu->vc_vmx_vmcs_state == VMCS_LAUNCHED
sys/arch/amd64/amd64/vmm_machdep.c
4072
vmx_vcpu_dump_regs(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4073
dump_vcpu(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4078
vcpu->vc_last_pcpu = curcpu();
sys/arch/amd64/amd64/vmm_machdep.c
4081
if (vcpu_readregs_vmx(vcpu, VM_RWREGS_ALL, 0, &vcpu->vc_exit.vrs))
sys/arch/amd64/amd64/vmm_machdep.c
4083
vcpu->vc_exit.cpl = vmm_get_guest_cpu_cpl(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4096
vmx_handle_intr(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4130
svm_handle_hlt(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4132
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
4136
vcpu->vc_gueststate.vg_rip += 1;
sys/arch/amd64/amd64/vmm_machdep.c
4138
if (!svm_get_iflag(vcpu, rflags)) {
sys/arch/amd64/amd64/vmm_machdep.c
4165
vmx_handle_hlt(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4191
vcpu->vc_gueststate.vg_rip += insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
4222
svm_handle_exit(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4226
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
4229
exit_reason = vcpu->vc_gueststate.vg_exit_reason;
sys/arch/amd64/amd64/vmm_machdep.c
4230
rflags = vcpu->vc_gueststate.vg_rflags;
sys/arch/amd64/amd64/vmm_machdep.c
4234
if (!svm_get_iflag(vcpu, rflags)) {
sys/arch/amd64/amd64/vmm_machdep.c
4248
svm_set_dirty(vcpu, SVM_CLEANBITS_TPR | SVM_CLEANBITS_I);
sys/arch/amd64/amd64/vmm_machdep.c
4260
ret = svm_handle_np_fault(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4263
ret = vmm_handle_cpuid(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4267
ret = svm_handle_msr(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4271
ret = svm_handle_xsetbv(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4275
if (svm_handle_inout(vcpu) == 0)
sys/arch/amd64/amd64/vmm_machdep.c
4279
ret = svm_handle_hlt(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4294
ret = vmm_inject_ud(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4300
ret = svm_handle_efercr(vcpu, exit_reason);
sys/arch/amd64/amd64/vmm_machdep.c
4304
ret = svm_handle_vmgexit(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4307
guest_cpl = vmm_get_guest_cpu_cpl(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4309
vcpu->vc_gueststate.vg_rax == HVCALL_FORCED_ABORT)
sys/arch/amd64/amd64/vmm_machdep.c
4312
ret = vmm_inject_ud(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4317
exit_reason, (uint64_t)vcpu->vc_control_pa);
sys/arch/amd64/amd64/vmm_machdep.c
4322
vmcb->v_rip = vcpu->vc_gueststate.vg_rip;
sys/arch/amd64/amd64/vmm_machdep.c
4325
if (vmm_inject_db(vcpu)) {
sys/arch/amd64/amd64/vmm_machdep.c
4335
svm_set_dirty(vcpu, SVM_CLEANBITS_CR);
sys/arch/amd64/amd64/vmm_machdep.c
4344
svm_vmgexit_sync_host(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4346
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
4351
if (!vcpu->vc_seves)
sys/arch/amd64/amd64/vmm_machdep.c
4354
if (vcpu->vc_svm_ghcb_va == 0)
sys/arch/amd64/amd64/vmm_machdep.c
4357
ghcb = (struct ghcb_sa *)vcpu->vc_svm_ghcb_va;
sys/arch/amd64/amd64/vmm_machdep.c
4403
vmcb->v_exitcode = vcpu->vc_gueststate.vg_exit_reason =
sys/arch/amd64/amd64/vmm_machdep.c
4409
vmcb->v_rax = vcpu->vc_gueststate.vg_rax = ghcb->v_rax;
sys/arch/amd64/amd64/vmm_machdep.c
4411
vcpu->vc_gueststate.vg_rbx = ghcb->v_rbx;
sys/arch/amd64/amd64/vmm_machdep.c
4413
vcpu->vc_gueststate.vg_rcx = ghcb->v_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
4415
vcpu->vc_gueststate.vg_rdx = ghcb->v_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
4424
svm_vmgexit_sync_guest(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4431
if (!vcpu->vc_seves)
sys/arch/amd64/amd64/vmm_machdep.c
4434
if (vcpu->vc_svm_ghcb_va == 0)
sys/arch/amd64/amd64/vmm_machdep.c
4437
ghcb = (struct ghcb_sa *)vcpu->vc_svm_ghcb_va;
sys/arch/amd64/amd64/vmm_machdep.c
4479
ghcb->v_rax = vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
4481
ghcb->v_rbx = vcpu->vc_gueststate.vg_rbx;
sys/arch/amd64/amd64/vmm_machdep.c
4483
ghcb->v_rcx = vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
4485
ghcb->v_rdx = vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
4502
svm_handle_vmgexit(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4504
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
4505
struct vm *vm = vcpu->vc_parent;
sys/arch/amd64/amd64/vmm_machdep.c
4517
vcpu->vc_svm_ghcb_va = (vaddr_t)PMAP_DIRECT_MAP(ghcb_hpa);
sys/arch/amd64/amd64/vmm_machdep.c
4535
vcpu->vc_gueststate.vg_rax = 0;
sys/arch/amd64/amd64/vmm_machdep.c
4536
vcpu->vc_gueststate.vg_rbx = 0;
sys/arch/amd64/amd64/vmm_machdep.c
4537
vcpu->vc_gueststate.vg_rcx = 0;
sys/arch/amd64/amd64/vmm_machdep.c
4538
vcpu->vc_gueststate.vg_rdx = 0;
sys/arch/amd64/amd64/vmm_machdep.c
4539
error = vmm_handle_cpuid(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4548
result = vcpu->vc_gueststate.vg_rbx;
sys/arch/amd64/amd64/vmm_machdep.c
4551
result = vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
4554
result = vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
4569
ghcb = (struct ghcb_sa *)vcpu->vc_svm_ghcb_va;
sys/arch/amd64/amd64/vmm_machdep.c
4570
if (svm_vmgexit_sync_host(vcpu)) {
sys/arch/amd64/amd64/vmm_machdep.c
4579
error = vmm_handle_cpuid(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4580
vmcb->v_rip = vcpu->vc_gueststate.vg_rip;
sys/arch/amd64/amd64/vmm_machdep.c
4581
vcpu->vc_gueststate.vg_rax = vmcb->v_rax;
sys/arch/amd64/amd64/vmm_machdep.c
4585
if (svm_handle_inout(vcpu) == 0)
sys/arch/amd64/amd64/vmm_machdep.c
4589
error = svm_handle_msr(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4590
vmcb->v_rip = vcpu->vc_gueststate.vg_rip;
sys/arch/amd64/amd64/vmm_machdep.c
4594
error = vmm_inject_ud(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4603
error = svm_vmgexit_sync_guest(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4617
svm_handle_efercr(struct vcpu *vcpu, uint64_t exit_reason)
sys/arch/amd64/amd64/vmm_machdep.c
4619
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
4646
svm_get_iflag(struct vcpu *vcpu, uint64_t rflags)
sys/arch/amd64/amd64/vmm_machdep.c
4648
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
4650
if (vcpu->vc_seves)
sys/arch/amd64/amd64/vmm_machdep.c
4662
vmx_handle_exit(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4668
exit_reason = vcpu->vc_gueststate.vg_exit_reason;
sys/arch/amd64/amd64/vmm_machdep.c
4669
rflags = vcpu->vc_gueststate.vg_rflags;
sys/arch/amd64/amd64/vmm_machdep.c
4684
ret = vmx_handle_np_fault(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4687
ret = vmm_handle_cpuid(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4691
if (vmx_handle_inout(vcpu) == 0)
sys/arch/amd64/amd64/vmm_machdep.c
4695
vmx_handle_intr(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4699
ret = vmx_handle_cr(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4703
ret = vmx_handle_hlt(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4707
ret = vmx_handle_rdmsr(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4711
ret = vmx_handle_wrmsr(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4715
ret = vmx_handle_xsetbv(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4732
ret = vmm_inject_ud(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4738
vcpu->vc_parent->vm_id, vcpu->vc_id);
sys/arch/amd64/amd64/vmm_machdep.c
4739
vmx_vcpu_dump_regs(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4740
dump_vcpu(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4741
vmx_dump_vmcs(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4747
guest_cpl = vmm_get_guest_cpu_cpl(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4749
vcpu->vc_gueststate.vg_rax == HVCALL_FORCED_ABORT)
sys/arch/amd64/amd64/vmm_machdep.c
4752
ret = vmm_inject_ud(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
4765
vcpu->vc_gueststate.vg_rip)) {
sys/arch/amd64/amd64/vmm_machdep.c
4788
if (vmm_inject_db(vcpu)) {
sys/arch/amd64/amd64/vmm_machdep.c
4811
vmm_inject_gp(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4814
vcpu->vc_gueststate.vg_rip);
sys/arch/amd64/amd64/vmm_machdep.c
4815
vcpu->vc_inject.vie_vector = VMM_EX_GP;
sys/arch/amd64/amd64/vmm_machdep.c
4816
vcpu->vc_inject.vie_type = VCPU_INJECT_EX;
sys/arch/amd64/amd64/vmm_machdep.c
4817
vcpu->vc_inject.vie_errorcode = 0;
sys/arch/amd64/amd64/vmm_machdep.c
4834
vmm_inject_ud(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
4837
vcpu->vc_gueststate.vg_rip);
sys/arch/amd64/amd64/vmm_machdep.c
4838
vcpu->vc_inject.vie_vector = VMM_EX_UD;
sys/arch/amd64/amd64/vmm_machdep.c
4839
vcpu->vc_inject.vie_type = VCPU_INJECT_EX;
sys/arch/amd64/amd64/vmm_machdep.c
4840
vcpu->vc_inject.vie_errorcode = 0;
sys/arch/amd64/amd64/vmm_machdep.c
4857
vmm_inject_db(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
486
struct vcpu *vcpu;
sys/arch/amd64/amd64/vmm_machdep.c
4860
vcpu->vc_gueststate.vg_rip);
sys/arch/amd64/amd64/vmm_machdep.c
4861
vcpu->vc_inject.vie_vector = VMM_EX_DB;
sys/arch/amd64/amd64/vmm_machdep.c
4862
vcpu->vc_inject.vie_type = VCPU_INJECT_EX;
sys/arch/amd64/amd64/vmm_machdep.c
4863
vcpu->vc_inject.vie_errorcode = 0;
sys/arch/amd64/amd64/vmm_machdep.c
499
vcpu = vm_find_vcpu(vm, vip->vip_vcpu_id);
sys/arch/amd64/amd64/vmm_machdep.c
5003
svm_fault_page(struct vcpu *vcpu, paddr_t gpa)
sys/arch/amd64/amd64/vmm_machdep.c
501
if (vcpu == NULL) {
sys/arch/amd64/amd64/vmm_machdep.c
5010
hva = vmm_translate_gpa(vcpu->vc_parent, pa);
sys/arch/amd64/amd64/vmm_machdep.c
5037
ret = pmap_enter(vcpu->vc_parent->vm_pmap, pa, hpa,
sys/arch/amd64/amd64/vmm_machdep.c
5054
svm_handle_np_fault(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5058
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
5059
struct vm_exit_eptviolation *vee = &vcpu->vc_exit.vee;
sys/arch/amd64/amd64/vmm_machdep.c
506
vcpu->vc_intr = vip->vip_intr;
sys/arch/amd64/amd64/vmm_machdep.c
5066
gpa_memtype = vmm_get_guest_memtype(vcpu->vc_parent, gpa);
sys/arch/amd64/amd64/vmm_machdep.c
5070
ret = svm_fault_page(vcpu, gpa);
sys/arch/amd64/amd64/vmm_machdep.c
508
ci = READ_ONCE(vcpu->vc_curcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5108
vmx_fault_page(struct vcpu *vcpu, paddr_t gpa)
sys/arch/amd64/amd64/vmm_machdep.c
5121
vcpu->vc_exit.vee.vee_fault_type = VEE_FAULT_PROTECT;
sys/arch/amd64/amd64/vmm_machdep.c
5124
vcpu->vc_exit.vee.vee_fault_type = VEE_FAULT_HANDLED;
sys/arch/amd64/amd64/vmm_machdep.c
5128
hva = vmm_translate_gpa(vcpu->vc_parent, pa);
sys/arch/amd64/amd64/vmm_machdep.c
5138
vcpu->vc_last_pcpu = curcpu(); /* uvm_fault may sleep. */
sys/arch/amd64/amd64/vmm_machdep.c
5146
if (vcpu_reload_vmcs_vmx(vcpu)) {
sys/arch/amd64/amd64/vmm_machdep.c
5160
ret = pmap_enter(vcpu->vc_parent->vm_pmap, pa, hpa,
sys/arch/amd64/amd64/vmm_machdep.c
5177
vmx_handle_np_fault(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5181
struct vm_exit_eptviolation *vee = &vcpu->vc_exit.vee;
sys/arch/amd64/amd64/vmm_machdep.c
5190
gpa_memtype = vmm_get_guest_memtype(vcpu->vc_parent, gpa);
sys/arch/amd64/amd64/vmm_machdep.c
5194
ret = vmx_fault_page(vcpu, gpa);
sys/arch/amd64/amd64/vmm_machdep.c
5234
vmm_get_guest_cpu_cpl(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5240
mode = vmm_get_guest_cpu_mode(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5249
vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
5272
vmm_get_guest_cpu_mode(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5280
vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
5291
(struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_save_va;
sys/arch/amd64/amd64/vmm_machdep.c
5332
svm_handle_inout(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5335
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
5342
vcpu->vc_exit.vei.vei_dir = VEI_DIR_IN;
sys/arch/amd64/amd64/vmm_machdep.c
5344
vcpu->vc_exit.vei.vei_dir = VEI_DIR_OUT;
sys/arch/amd64/amd64/vmm_machdep.c
5346
vcpu->vc_exit.vei.vei_string = (exit_qual & 0x4) >> 2;
sys/arch/amd64/amd64/vmm_machdep.c
5348
vcpu->vc_exit.vei.vei_rep = (exit_qual & 0x8) >> 3;
sys/arch/amd64/amd64/vmm_machdep.c
5352
vcpu->vc_exit.vei.vei_size = 1;
sys/arch/amd64/amd64/vmm_machdep.c
5354
vcpu->vc_exit.vei.vei_size = 2;
sys/arch/amd64/amd64/vmm_machdep.c
5356
vcpu->vc_exit.vei.vei_size = 4;
sys/arch/amd64/amd64/vmm_machdep.c
5359
vcpu->vc_exit.vei.vei_port = (exit_qual & 0xFFFF0000) >> 16;
sys/arch/amd64/amd64/vmm_machdep.c
5361
vcpu->vc_exit.vei.vei_data = vmcb->v_rax;
sys/arch/amd64/amd64/vmm_machdep.c
5363
vcpu->vc_exit.vei.vei_insn_len = (uint8_t)insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
5365
TRACEPOINT(vmm, inout, vcpu, vcpu->vc_exit.vei.vei_port,
sys/arch/amd64/amd64/vmm_machdep.c
5366
vcpu->vc_exit.vei.vei_dir, vcpu->vc_exit.vei.vei_data);
sys/arch/amd64/amd64/vmm_machdep.c
537
struct vcpu *vcpu;
sys/arch/amd64/amd64/vmm_machdep.c
5384
vmx_handle_inout(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5399
vcpu->vc_exit.vei.vei_size = (exit_qual & 0x7) + 1;
sys/arch/amd64/amd64/vmm_machdep.c
5402
vcpu->vc_exit.vei.vei_dir = VEI_DIR_IN;
sys/arch/amd64/amd64/vmm_machdep.c
5404
vcpu->vc_exit.vei.vei_dir = VEI_DIR_OUT;
sys/arch/amd64/amd64/vmm_machdep.c
5406
vcpu->vc_exit.vei.vei_string = (exit_qual & 0x10) >> 4;
sys/arch/amd64/amd64/vmm_machdep.c
5408
vcpu->vc_exit.vei.vei_rep = (exit_qual & 0x20) >> 5;
sys/arch/amd64/amd64/vmm_machdep.c
5410
vcpu->vc_exit.vei.vei_encoding = (exit_qual & 0x40) >> 6;
sys/arch/amd64/amd64/vmm_machdep.c
5412
vcpu->vc_exit.vei.vei_port = (exit_qual & 0xFFFF0000) >> 16;
sys/arch/amd64/amd64/vmm_machdep.c
5414
vcpu->vc_exit.vei.vei_data = (uint32_t)vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
5416
vcpu->vc_exit.vei.vei_insn_len = (uint8_t)insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
5418
TRACEPOINT(vmm, inout, vcpu, vcpu->vc_exit.vei.vei_port,
sys/arch/amd64/amd64/vmm_machdep.c
5419
vcpu->vc_exit.vei.vei_dir, vcpu->vc_exit.vei.vei_data);
sys/arch/amd64/amd64/vmm_machdep.c
5439
vmx_load_pdptes(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5451
if (!pmap_extract(vcpu->vc_parent->vm_pmap, (vaddr_t)cr3,
sys/arch/amd64/amd64/vmm_machdep.c
547
vcpu = vm_find_vcpu(vm, vpp->vpp_vcpu_id);
sys/arch/amd64/amd64/vmm_machdep.c
5480
vcpu->vc_last_pcpu = curcpu();
sys/arch/amd64/amd64/vmm_machdep.c
5483
if (vcpu_reload_vmcs_vmx(vcpu)) {
sys/arch/amd64/amd64/vmm_machdep.c
549
if (vcpu == NULL) {
sys/arch/amd64/amd64/vmm_machdep.c
5526
vcpu->vc_last_pcpu = curcpu();
sys/arch/amd64/amd64/vmm_machdep.c
5528
if (vcpu_reload_vmcs_vmx(vcpu)) {
sys/arch/amd64/amd64/vmm_machdep.c
5551
vmx_handle_cr0_write(struct vcpu *vcpu, uint64_t r)
sys/arch/amd64/amd64/vmm_machdep.c
5559
mask = vcpu->vc_vmx_cr0_fixed1;
sys/arch/amd64/amd64/vmm_machdep.c
556
vpp->vpp_pvclock_version = vcpu->vc_pvclock_version;
sys/arch/amd64/amd64/vmm_machdep.c
5564
vcpu->vc_vmx_cr0_fixed1, r);
sys/arch/amd64/amd64/vmm_machdep.c
5565
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5570
mask = vcpu->vc_vmx_cr0_fixed0;
sys/arch/amd64/amd64/vmm_machdep.c
5575
vcpu->vc_vmx_cr0_fixed0, r);
sys/arch/amd64/amd64/vmm_machdep.c
5576
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5583
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
559
vcpu->vc_pvclock_system_gpa;
sys/arch/amd64/amd64/vmm_machdep.c
5590
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5597
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5617
if (vcpu->vc_vmx_vpid_enabled) {
sys/arch/amd64/amd64/vmm_machdep.c
5618
vid.vid_vpid = vcpu->vc_vpid;
sys/arch/amd64/amd64/vmm_machdep.c
562
vcpu->vc_pvclock_version = vpp->vpp_pvclock_version;
sys/arch/amd64/amd64/vmm_machdep.c
5627
msr_store = (struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_save_va;
sys/arch/amd64/amd64/vmm_machdep.c
564
vmm_init_pvclock(vcpu, vpp->vpp_pvclock_system_gpa);
sys/arch/amd64/amd64/vmm_machdep.c
5651
ret = vmx_load_pdptes(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5678
vmx_handle_cr4_write(struct vcpu *vcpu, uint64_t r)
sys/arch/amd64/amd64/vmm_machdep.c
5690
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5702
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5723
vmx_handle_cr(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5754
case 0: r = vcpu->vc_gueststate.vg_rax; break;
sys/arch/amd64/amd64/vmm_machdep.c
5755
case 1: r = vcpu->vc_gueststate.vg_rcx; break;
sys/arch/amd64/amd64/vmm_machdep.c
5756
case 2: r = vcpu->vc_gueststate.vg_rdx; break;
sys/arch/amd64/amd64/vmm_machdep.c
5757
case 3: r = vcpu->vc_gueststate.vg_rbx; break;
sys/arch/amd64/amd64/vmm_machdep.c
5764
case 5: r = vcpu->vc_gueststate.vg_rbp; break;
sys/arch/amd64/amd64/vmm_machdep.c
5765
case 6: r = vcpu->vc_gueststate.vg_rsi; break;
sys/arch/amd64/amd64/vmm_machdep.c
5766
case 7: r = vcpu->vc_gueststate.vg_rdi; break;
sys/arch/amd64/amd64/vmm_machdep.c
5767
case 8: r = vcpu->vc_gueststate.vg_r8; break;
sys/arch/amd64/amd64/vmm_machdep.c
5768
case 9: r = vcpu->vc_gueststate.vg_r9; break;
sys/arch/amd64/amd64/vmm_machdep.c
5769
case 10: r = vcpu->vc_gueststate.vg_r10; break;
sys/arch/amd64/amd64/vmm_machdep.c
5770
case 11: r = vcpu->vc_gueststate.vg_r11; break;
sys/arch/amd64/amd64/vmm_machdep.c
5771
case 12: r = vcpu->vc_gueststate.vg_r12; break;
sys/arch/amd64/amd64/vmm_machdep.c
5772
case 13: r = vcpu->vc_gueststate.vg_r13; break;
sys/arch/amd64/amd64/vmm_machdep.c
5773
case 14: r = vcpu->vc_gueststate.vg_r14; break;
sys/arch/amd64/amd64/vmm_machdep.c
5774
case 15: r = vcpu->vc_gueststate.vg_r15; break;
sys/arch/amd64/amd64/vmm_machdep.c
5777
__func__, crnum, vcpu->vc_gueststate.vg_rip, r);
sys/arch/amd64/amd64/vmm_machdep.c
5781
vmx_handle_cr0_write(vcpu, r);
sys/arch/amd64/amd64/vmm_machdep.c
5784
vmx_handle_cr4_write(vcpu, r);
sys/arch/amd64/amd64/vmm_machdep.c
5789
vcpu->vc_gueststate.vg_rip);
sys/arch/amd64/amd64/vmm_machdep.c
5793
vcpu->vc_gueststate.vg_rip);
sys/arch/amd64/amd64/vmm_machdep.c
5797
vcpu->vc_gueststate.vg_rip);
sys/arch/amd64/amd64/vmm_machdep.c
5801
vcpu->vc_gueststate.vg_rip);
sys/arch/amd64/amd64/vmm_machdep.c
5804
vcpu->vc_gueststate.vg_rip += insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
5826
vmx_handle_rdmsr(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5844
rax = &vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
5845
rcx = &vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
5846
rdx = &vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
5856
*rax = (vcpu->vc_shadow_pat & 0xFFFFFFFFULL);
sys/arch/amd64/amd64/vmm_machdep.c
5857
*rdx = (vcpu->vc_shadow_pat >> 32);
sys/arch/amd64/amd64/vmm_machdep.c
5863
ret = vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
5867
vcpu->vc_gueststate.vg_rip += insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
5885
vmx_handle_xsetbv(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5902
rax = &vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
5904
ret = vmm_handle_xsetbv(vcpu, rax);
sys/arch/amd64/amd64/vmm_machdep.c
5906
vcpu->vc_gueststate.vg_rip += insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
5924
svm_handle_xsetbv(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
5928
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
593
struct vcpu *vcpu;
sys/arch/amd64/amd64/vmm_machdep.c
5935
ret = vmm_handle_xsetbv(vcpu, rax);
sys/arch/amd64/amd64/vmm_machdep.c
5937
vcpu->vc_gueststate.vg_rip += insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
5957
vmm_handle_xsetbv(struct vcpu *vcpu, uint64_t *rax)
sys/arch/amd64/amd64/vmm_machdep.c
5961
rcx = &vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
5962
rdx = &vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
5964
if (vmm_get_guest_cpu_cpl(vcpu) != 0) {
sys/arch/amd64/amd64/vmm_machdep.c
5966
return (vmm_inject_gp(vcpu));
sys/arch/amd64/amd64/vmm_machdep.c
5972
return (vmm_inject_gp(vcpu));
sys/arch/amd64/amd64/vmm_machdep.c
5983
return (vmm_inject_gp(vcpu));
sys/arch/amd64/amd64/vmm_machdep.c
5986
vcpu->vc_gueststate.vg_xcr0 = val;
sys/arch/amd64/amd64/vmm_machdep.c
6003
vmx_handle_misc_enable_msr(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
6008
rax = &vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
6009
rdx = &vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
6010
msr_store = (struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_save_va;
sys/arch/amd64/amd64/vmm_machdep.c
6034
vmx_handle_wrmsr(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
604
vcpu = vm_find_vcpu(vm, vrwp->vrwp_vcpu_id);
sys/arch/amd64/amd64/vmm_machdep.c
6051
rax = &vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
6052
rcx = &vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
6053
rdx = &vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
6059
ret = vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
606
if (vcpu == NULL) {
sys/arch/amd64/amd64/vmm_machdep.c
6062
vcpu->vc_shadow_pat = val;
sys/arch/amd64/amd64/vmm_machdep.c
6065
vmx_handle_misc_enable_msr(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
6074
ret = vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
6077
vmm_init_pvclock(vcpu,
sys/arch/amd64/amd64/vmm_machdep.c
6081
vmm_pv_wall_clock(vcpu,
sys/arch/amd64/amd64/vmm_machdep.c
6095
vcpu->vc_gueststate.vg_rip += insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
611
rw_enter_write(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
6112
svm_handle_msr(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
6116
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
6123
rcx = &vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
6124
rdx = &vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
6133
ret = vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
6136
vcpu->vc_shadow_pat = val;
sys/arch/amd64/amd64/vmm_machdep.c
614
vcpu_readregs_vmx(vcpu, vrwp->vrwp_mask, 1, vrs) :
sys/arch/amd64/amd64/vmm_machdep.c
6142
vmm_init_pvclock(vcpu,
sys/arch/amd64/amd64/vmm_machdep.c
6146
vmm_pv_wall_clock(vcpu,
sys/arch/amd64/amd64/vmm_machdep.c
615
vcpu_writeregs_vmx(vcpu, vrwp->vrwp_mask, 1, vrs);
sys/arch/amd64/amd64/vmm_machdep.c
6167
*rax = (vcpu->vc_shadow_pat & 0xFFFFFFFFULL);
sys/arch/amd64/amd64/vmm_machdep.c
6168
*rdx = (vcpu->vc_shadow_pat >> 32);
sys/arch/amd64/amd64/vmm_machdep.c
618
vcpu_readregs_svm(vcpu, vrwp->vrwp_mask, vrs) :
sys/arch/amd64/amd64/vmm_machdep.c
6182
ret = vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
6187
vcpu->vc_gueststate.vg_rip += insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
619
vcpu_writeregs_svm(vcpu, vrwp->vrwp_mask, vrs);
sys/arch/amd64/amd64/vmm_machdep.c
6194
vmm_handle_cpuid_0xd(struct vcpu *vcpu, uint32_t subleaf, uint64_t *rax,
sys/arch/amd64/amd64/vmm_machdep.c
6197
uint64_t xcr0 = vcpu->vc_gueststate.vg_xcr0;
sys/arch/amd64/amd64/vmm_machdep.c
624
rw_exit_write(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
6259
vcpu->vc_gueststate.vg_rbx = ebx;
sys/arch/amd64/amd64/vmm_machdep.c
6260
vcpu->vc_gueststate.vg_rcx = ecx;
sys/arch/amd64/amd64/vmm_machdep.c
6261
vcpu->vc_gueststate.vg_rdx = edx;
sys/arch/amd64/amd64/vmm_machdep.c
6277
vmm_handle_cpuid(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
6303
rax = &vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
6311
(struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_save_va;
sys/arch/amd64/amd64/vmm_machdep.c
6318
vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
6323
rbx = &vcpu->vc_gueststate.vg_rbx;
sys/arch/amd64/amd64/vmm_machdep.c
6324
rcx = &vcpu->vc_gueststate.vg_rcx;
sys/arch/amd64/amd64/vmm_machdep.c
6325
rdx = &vcpu->vc_gueststate.vg_rdx;
sys/arch/amd64/amd64/vmm_machdep.c
6326
vcpu->vc_gueststate.vg_rip += insn_length;
sys/arch/amd64/amd64/vmm_machdep.c
6349
vcpu->vc_gueststate.vg_rip - insn_length,
sys/arch/amd64/amd64/vmm_machdep.c
6371
*rbx |= (vcpu->vc_id & 0xFF) << 24;
sys/arch/amd64/amd64/vmm_machdep.c
6474
vmm_handle_cpuid_0xd(vcpu, subleaf, rax, eax, ebx, ecx, edx);
sys/arch/amd64/amd64/vmm_machdep.c
6646
vcpu_run_svm(struct vcpu *vcpu, struct vm_run_params *vrp)
sys/arch/amd64/amd64/vmm_machdep.c
6653
struct vmcb *vmcb = (struct vmcb *)vcpu->vc_control_va;
sys/arch/amd64/amd64/vmm_machdep.c
6656
vcpu->vc_intr = 1;
sys/arch/amd64/amd64/vmm_machdep.c
6658
vcpu->vc_intr = 0;
sys/arch/amd64/amd64/vmm_machdep.c
6666
switch (vcpu->vc_gueststate.vg_exit_reason) {
sys/arch/amd64/amd64/vmm_machdep.c
6668
if (vcpu->vc_exit.vei.vei_dir == VEI_DIR_IN) {
sys/arch/amd64/amd64/vmm_machdep.c
6669
vcpu->vc_gueststate.vg_rax =
sys/arch/amd64/amd64/vmm_machdep.c
6670
vcpu->vc_exit.vei.vei_data;
sys/arch/amd64/amd64/vmm_machdep.c
6671
vmcb->v_rax = vcpu->vc_gueststate.vg_rax;
sys/arch/amd64/amd64/vmm_machdep.c
6673
vcpu->vc_gueststate.vg_rip =
sys/arch/amd64/amd64/vmm_machdep.c
6674
vcpu->vc_exit.vrs.vrs_gprs[VCPU_REGS_RIP];
sys/arch/amd64/amd64/vmm_machdep.c
6675
vmcb->v_rip = vcpu->vc_gueststate.vg_rip;
sys/arch/amd64/amd64/vmm_machdep.c
6676
if (svm_vmgexit_sync_guest(vcpu))
sys/arch/amd64/amd64/vmm_machdep.c
6680
ret = vcpu_writeregs_svm(vcpu, VM_RWREGS_GPRS,
sys/arch/amd64/amd64/vmm_machdep.c
6681
&vcpu->vc_exit.vrs);
sys/arch/amd64/amd64/vmm_machdep.c
6685
vcpu->vc_parent->vm_id, vcpu->vc_id);
sys/arch/amd64/amd64/vmm_machdep.c
6690
memset(&vcpu->vc_exit, 0, sizeof(vcpu->vc_exit));
sys/arch/amd64/amd64/vmm_machdep.c
6693
vmm_update_pvclock(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
6703
if (ci != vcpu->vc_last_pcpu) {
sys/arch/amd64/amd64/vmm_machdep.c
6715
svm_set_dirty(vcpu, SVM_CLEANBITS_ALL);
sys/arch/amd64/amd64/vmm_machdep.c
6718
vcpu->vc_last_pcpu = ci;
sys/arch/amd64/amd64/vmm_machdep.c
6728
if (vcpu->vc_inject.vie_type == VCPU_INJECT_INTR &&
sys/arch/amd64/amd64/vmm_machdep.c
6729
vcpu->vc_irqready) {
sys/arch/amd64/amd64/vmm_machdep.c
6730
vmcb->v_eventinj = vcpu->vc_inject.vie_vector |
sys/arch/amd64/amd64/vmm_machdep.c
6732
vcpu->vc_inject.vie_type = VCPU_INJECT_NONE;
sys/arch/amd64/amd64/vmm_machdep.c
6736
if (vcpu->vc_inject.vie_type == VCPU_INJECT_EX) {
sys/arch/amd64/amd64/vmm_machdep.c
6737
vmcb->v_eventinj = vcpu->vc_inject.vie_vector;
sys/arch/amd64/amd64/vmm_machdep.c
6740
switch (vcpu->vc_inject.vie_vector) {
sys/arch/amd64/amd64/vmm_machdep.c
6755
vcpu->vc_inject.vie_errorcode = 0;
sys/arch/amd64/amd64/vmm_machdep.c
6770
vcpu->vc_inject.vie_errorcode << 32;
sys/arch/amd64/amd64/vmm_machdep.c
6775
__func__, vcpu->vc_inject.vie_vector);
sys/arch/amd64/amd64/vmm_machdep.c
6783
vcpu->vc_inject.vie_type = VCPU_INJECT_NONE;
sys/arch/amd64/amd64/vmm_machdep.c
6786
TRACEPOINT(vmm, guest_enter, vcpu, vrp);
sys/arch/amd64/amd64/vmm_machdep.c
6791
if ((ret = vmm_fpurestore(vcpu))) {
sys/arch/amd64/amd64/vmm_machdep.c
6800
if (ci->ci_guest_vcpu != vcpu &&
sys/arch/amd64/amd64/vmm_machdep.c
6803
ci->ci_guest_vcpu = vcpu;
sys/arch/amd64/amd64/vmm_machdep.c
6808
wrpkru(0, vcpu->vc_pkru);
sys/arch/amd64/amd64/vmm_machdep.c
6811
wrmsr(MSR_AMD_VM_HSAVE_PA, vcpu->vc_svm_hsa_pa);
sys/arch/amd64/amd64/vmm_machdep.c
6813
if (vcpu->vc_seves) {
sys/arch/amd64/amd64/vmm_machdep.c
6814
ret = svm_seves_enter_guest(vcpu->vc_control_pa,
sys/arch/amd64/amd64/vmm_machdep.c
6815
vcpu->vc_svm_hsa_va + SVM_HSA_OFFSET, &gdt);
sys/arch/amd64/amd64/vmm_machdep.c
6817
ret = svm_enter_guest(vcpu->vc_control_pa,
sys/arch/amd64/amd64/vmm_machdep.c
6818
&vcpu->vc_gueststate, &gdt);
sys/arch/amd64/amd64/vmm_machdep.c
6823
vcpu->vc_pkru = rdpkru(0);
sys/arch/amd64/amd64/vmm_machdep.c
6832
vmm_fpusave(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
6840
vcpu->vc_gueststate.vg_rip = vmcb->v_rip;
sys/arch/amd64/amd64/vmm_machdep.c
6842
svm_set_clean(vcpu, SVM_CLEANBITS_ALL);
sys/arch/amd64/amd64/vmm_machdep.c
6847
vcpu->vc_gueststate.vg_exit_reason = exit_reason;
sys/arch/amd64/amd64/vmm_machdep.c
6848
TRACEPOINT(vmm, guest_exit, vcpu, vrp, exit_reason);
sys/arch/amd64/amd64/vmm_machdep.c
6850
vcpu->vc_gueststate.vg_rflags = vmcb->v_rflags;
sys/arch/amd64/amd64/vmm_machdep.c
6856
ret = svm_handle_exit(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
6858
if (svm_get_iflag(vcpu, vcpu->vc_gueststate.vg_rflags))
sys/arch/amd64/amd64/vmm_machdep.c
6859
vcpu->vc_irqready = 1;
sys/arch/amd64/amd64/vmm_machdep.c
6861
vcpu->vc_irqready = 0;
sys/arch/amd64/amd64/vmm_machdep.c
6867
if (vcpu->vc_irqready == 0 && vcpu->vc_intr) {
sys/arch/amd64/amd64/vmm_machdep.c
6872
svm_set_dirty(vcpu, SVM_CLEANBITS_TPR |
sys/arch/amd64/amd64/vmm_machdep.c
6880
if (ret || vcpu_must_stop(vcpu))
sys/arch/amd64/amd64/vmm_machdep.c
6883
if (vcpu->vc_intr && vcpu->vc_irqready) {
sys/arch/amd64/amd64/vmm_machdep.c
6901
if (vcpu_readregs_svm(vcpu, VM_RWREGS_ALL, &vcpu->vc_exit.vrs))
sys/arch/amd64/amd64/vmm_machdep.c
6922
vmm_alloc_vpid_vcpu(uint16_t *vpid, struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
6929
if (vcpu == NULL || vcpu->vc_seves || amd64_min_noes_asid == 0)
sys/arch/amd64/amd64/vmm_machdep.c
6962
vmm_alloc_asid(uint16_t *asid, struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
6964
return vmm_alloc_vpid_vcpu(asid, vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
7005
vmm_gpa_is_valid(struct vcpu *vcpu, paddr_t gpa, size_t obj_size)
sys/arch/amd64/amd64/vmm_machdep.c
7007
struct vm *vm = vcpu->vc_parent;
sys/arch/amd64/amd64/vmm_machdep.c
7023
vmm_init_pvclock(struct vcpu *vcpu, paddr_t gpa)
sys/arch/amd64/amd64/vmm_machdep.c
7026
if (!vmm_gpa_is_valid(vcpu, pvclock_gpa,
sys/arch/amd64/amd64/vmm_machdep.c
7029
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
7036
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
7040
vcpu->vc_pvclock_system_gpa = gpa;
sys/arch/amd64/amd64/vmm_machdep.c
7042
vcpu->vc_pvclock_system_tsc_mul =
sys/arch/amd64/amd64/vmm_machdep.c
7045
vcpu->vc_pvclock_system_tsc_mul = 0;
sys/arch/amd64/amd64/vmm_machdep.c
7046
vmm_update_pvclock(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
7050
vmm_update_pvclock(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
7054
struct vm *vm = vcpu->vc_parent;
sys/arch/amd64/amd64/vmm_machdep.c
7057
if (vcpu->vc_pvclock_system_gpa & PVCLOCK_SYSTEM_TIME_ENABLE) {
sys/arch/amd64/amd64/vmm_machdep.c
7058
pvclock_gpa = vcpu->vc_pvclock_system_gpa & 0xFFFFFFFFFFFFFFF0;
sys/arch/amd64/amd64/vmm_machdep.c
7065
(++vcpu->vc_pvclock_version << 1) | 0x1;
sys/arch/amd64/amd64/vmm_machdep.c
7073
vcpu->vc_pvclock_system_tsc_mul;
sys/arch/amd64/amd64/vmm_machdep.c
7083
vmm_pv_wall_clock(struct vcpu *vcpu, paddr_t gpa)
sys/arch/amd64/amd64/vmm_machdep.c
7087
struct vm *vm = vcpu->vc_parent;
sys/arch/amd64/amd64/vmm_machdep.c
7090
if (!vmm_gpa_is_valid(vcpu, gpa, sizeof(struct pvclock_wall_clock)))
sys/arch/amd64/amd64/vmm_machdep.c
7108
vmm_inject_gp(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
7418
struct vcpu *vcpu;
sys/arch/amd64/amd64/vmm_machdep.c
7425
vcpu = vm_find_vcpu(vm, vcpuid);
sys/arch/amd64/amd64/vmm_machdep.c
7426
if (vcpu == NULL || !vcpu->vc_seves) {
sys/arch/amd64/amd64/vmm_machdep.c
7432
*vmsapa = vcpu->vc_svm_vmsa_pa;
sys/arch/amd64/amd64/vmm_machdep.c
7446
dump_vcpu(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
7448
printf("vcpu @ %p\n", vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
7449
printf(" parent vm @ %p\n", vcpu->vc_parent);
sys/arch/amd64/amd64/vmm_machdep.c
7451
if (vcpu->vc_virt_mode == VMM_MODE_EPT) {
sys/arch/amd64/amd64/vmm_machdep.c
7454
vcpu->vc_vmx_pinbased_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7456
vcpu->vc_vmx_true_pinbased_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7457
CTRL_DUMP(vcpu, PINBASED, EXTERNAL_INT_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7458
CTRL_DUMP(vcpu, PINBASED, NMI_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7459
CTRL_DUMP(vcpu, PINBASED, VIRTUAL_NMIS);
sys/arch/amd64/amd64/vmm_machdep.c
7460
CTRL_DUMP(vcpu, PINBASED, ACTIVATE_VMX_PREEMPTION_TIMER);
sys/arch/amd64/amd64/vmm_machdep.c
7461
CTRL_DUMP(vcpu, PINBASED, PROCESS_POSTED_INTERRUPTS);
sys/arch/amd64/amd64/vmm_machdep.c
7463
vcpu->vc_vmx_procbased_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7465
vcpu->vc_vmx_true_procbased_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7466
CTRL_DUMP(vcpu, PROCBASED, INTERRUPT_WINDOW_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7467
CTRL_DUMP(vcpu, PROCBASED, USE_TSC_OFFSETTING);
sys/arch/amd64/amd64/vmm_machdep.c
7468
CTRL_DUMP(vcpu, PROCBASED, HLT_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7469
CTRL_DUMP(vcpu, PROCBASED, INVLPG_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7470
CTRL_DUMP(vcpu, PROCBASED, MWAIT_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7471
CTRL_DUMP(vcpu, PROCBASED, RDPMC_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7472
CTRL_DUMP(vcpu, PROCBASED, RDTSC_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7473
CTRL_DUMP(vcpu, PROCBASED, CR3_LOAD_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7474
CTRL_DUMP(vcpu, PROCBASED, CR3_STORE_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7475
CTRL_DUMP(vcpu, PROCBASED, CR8_LOAD_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7476
CTRL_DUMP(vcpu, PROCBASED, CR8_STORE_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7477
CTRL_DUMP(vcpu, PROCBASED, USE_TPR_SHADOW);
sys/arch/amd64/amd64/vmm_machdep.c
7478
CTRL_DUMP(vcpu, PROCBASED, NMI_WINDOW_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7479
CTRL_DUMP(vcpu, PROCBASED, MOV_DR_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7480
CTRL_DUMP(vcpu, PROCBASED, UNCONDITIONAL_IO_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7481
CTRL_DUMP(vcpu, PROCBASED, USE_IO_BITMAPS);
sys/arch/amd64/amd64/vmm_machdep.c
7482
CTRL_DUMP(vcpu, PROCBASED, MONITOR_TRAP_FLAG);
sys/arch/amd64/amd64/vmm_machdep.c
7483
CTRL_DUMP(vcpu, PROCBASED, USE_MSR_BITMAPS);
sys/arch/amd64/amd64/vmm_machdep.c
7484
CTRL_DUMP(vcpu, PROCBASED, MONITOR_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7485
CTRL_DUMP(vcpu, PROCBASED, PAUSE_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7486
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7489
vcpu->vc_vmx_procbased2_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7490
CTRL_DUMP(vcpu, PROCBASED2, VIRTUALIZE_APIC);
sys/arch/amd64/amd64/vmm_machdep.c
7491
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_EPT);
sys/arch/amd64/amd64/vmm_machdep.c
7492
CTRL_DUMP(vcpu, PROCBASED2, DESCRIPTOR_TABLE_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7493
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_RDTSCP);
sys/arch/amd64/amd64/vmm_machdep.c
7494
CTRL_DUMP(vcpu, PROCBASED2, VIRTUALIZE_X2APIC_MODE);
sys/arch/amd64/amd64/vmm_machdep.c
7495
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_VPID);
sys/arch/amd64/amd64/vmm_machdep.c
7496
CTRL_DUMP(vcpu, PROCBASED2, WBINVD_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7497
CTRL_DUMP(vcpu, PROCBASED2, UNRESTRICTED_GUEST);
sys/arch/amd64/amd64/vmm_machdep.c
7498
CTRL_DUMP(vcpu, PROCBASED2,
sys/arch/amd64/amd64/vmm_machdep.c
7500
CTRL_DUMP(vcpu, PROCBASED2,
sys/arch/amd64/amd64/vmm_machdep.c
7502
CTRL_DUMP(vcpu, PROCBASED2, PAUSE_LOOP_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7503
CTRL_DUMP(vcpu, PROCBASED2, RDRAND_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7504
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_INVPCID);
sys/arch/amd64/amd64/vmm_machdep.c
7505
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_VM_FUNCTIONS);
sys/arch/amd64/amd64/vmm_machdep.c
7506
CTRL_DUMP(vcpu, PROCBASED2, VMCS_SHADOWING);
sys/arch/amd64/amd64/vmm_machdep.c
7507
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_ENCLS_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7508
CTRL_DUMP(vcpu, PROCBASED2, RDSEED_EXITING);
sys/arch/amd64/amd64/vmm_machdep.c
7509
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_PML);
sys/arch/amd64/amd64/vmm_machdep.c
7510
CTRL_DUMP(vcpu, PROCBASED2, EPT_VIOLATION_VE);
sys/arch/amd64/amd64/vmm_machdep.c
7511
CTRL_DUMP(vcpu, PROCBASED2, CONCEAL_VMX_FROM_PT);
sys/arch/amd64/amd64/vmm_machdep.c
7512
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_XSAVES_XRSTORS);
sys/arch/amd64/amd64/vmm_machdep.c
7513
CTRL_DUMP(vcpu, PROCBASED2, ENABLE_TSC_SCALING);
sys/arch/amd64/amd64/vmm_machdep.c
7516
vcpu->vc_vmx_entry_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7518
vcpu->vc_vmx_true_entry_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7519
CTRL_DUMP(vcpu, ENTRY, LOAD_DEBUG_CONTROLS);
sys/arch/amd64/amd64/vmm_machdep.c
7520
CTRL_DUMP(vcpu, ENTRY, IA32E_MODE_GUEST);
sys/arch/amd64/amd64/vmm_machdep.c
7521
CTRL_DUMP(vcpu, ENTRY, ENTRY_TO_SMM);
sys/arch/amd64/amd64/vmm_machdep.c
7522
CTRL_DUMP(vcpu, ENTRY, DEACTIVATE_DUAL_MONITOR_TREATMENT);
sys/arch/amd64/amd64/vmm_machdep.c
7523
CTRL_DUMP(vcpu, ENTRY, LOAD_IA32_PERF_GLOBAL_CTRL_ON_ENTRY);
sys/arch/amd64/amd64/vmm_machdep.c
7524
CTRL_DUMP(vcpu, ENTRY, LOAD_IA32_PAT_ON_ENTRY);
sys/arch/amd64/amd64/vmm_machdep.c
7525
CTRL_DUMP(vcpu, ENTRY, LOAD_IA32_EFER_ON_ENTRY);
sys/arch/amd64/amd64/vmm_machdep.c
7526
CTRL_DUMP(vcpu, ENTRY, LOAD_IA32_BNDCFGS_ON_ENTRY);
sys/arch/amd64/amd64/vmm_machdep.c
7527
CTRL_DUMP(vcpu, ENTRY, CONCEAL_VM_ENTRIES_FROM_PT);
sys/arch/amd64/amd64/vmm_machdep.c
7529
vcpu->vc_vmx_exit_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7531
vcpu->vc_vmx_true_exit_ctls);
sys/arch/amd64/amd64/vmm_machdep.c
7532
CTRL_DUMP(vcpu, EXIT, SAVE_DEBUG_CONTROLS);
sys/arch/amd64/amd64/vmm_machdep.c
7533
CTRL_DUMP(vcpu, EXIT, HOST_SPACE_ADDRESS_SIZE);
sys/arch/amd64/amd64/vmm_machdep.c
7534
CTRL_DUMP(vcpu, EXIT, LOAD_IA32_PERF_GLOBAL_CTRL_ON_EXIT);
sys/arch/amd64/amd64/vmm_machdep.c
7535
CTRL_DUMP(vcpu, EXIT, ACKNOWLEDGE_INTERRUPT_ON_EXIT);
sys/arch/amd64/amd64/vmm_machdep.c
7536
CTRL_DUMP(vcpu, EXIT, SAVE_IA32_PAT_ON_EXIT);
sys/arch/amd64/amd64/vmm_machdep.c
7537
CTRL_DUMP(vcpu, EXIT, LOAD_IA32_PAT_ON_EXIT);
sys/arch/amd64/amd64/vmm_machdep.c
7538
CTRL_DUMP(vcpu, EXIT, SAVE_IA32_EFER_ON_EXIT);
sys/arch/amd64/amd64/vmm_machdep.c
7539
CTRL_DUMP(vcpu, EXIT, LOAD_IA32_EFER_ON_EXIT);
sys/arch/amd64/amd64/vmm_machdep.c
7540
CTRL_DUMP(vcpu, EXIT, SAVE_VMX_PREEMPTION_TIMER);
sys/arch/amd64/amd64/vmm_machdep.c
7541
CTRL_DUMP(vcpu, EXIT, CLEAR_IA32_BNDCFGS_ON_EXIT);
sys/arch/amd64/amd64/vmm_machdep.c
7542
CTRL_DUMP(vcpu, EXIT, CONCEAL_VM_EXITS_FROM_PT);
sys/arch/amd64/amd64/vmm_machdep.c
7590
vmx_dump_vmcs(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
7599
(vcpu->vc_vmx_vmcs_state == VMCS_LAUNCHED) ? "Yes" : "No");
sys/arch/amd64/amd64/vmm_machdep.c
7613
has_sec = vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7617
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7623
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PINBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7630
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7649
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7655
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7676
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7692
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
77
int vcpu_readregs_vmx(struct vcpu *, uint64_t, int, struct vcpu_reg_state *);
sys/arch/amd64/amd64/vmm_machdep.c
7702
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7710
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7718
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PINBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7726
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7733
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7740
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7756
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7766
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7773
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7780
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7787
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7794
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
78
int vcpu_readregs_svm(struct vcpu *, uint64_t, struct vcpu_reg_state *);
sys/arch/amd64/amd64/vmm_machdep.c
7807
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_ENTRY_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7809
vcpu_vmx_check_cap(vcpu, IA32_VMX_EXIT_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7816
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_ENTRY_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7818
vcpu_vmx_check_cap(vcpu, IA32_VMX_EXIT_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7825
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_ENTRY_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7833
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7846
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_ENTRY_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7848
vcpu_vmx_check_cap(vcpu, IA32_VMX_EXIT_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7855
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_EXIT_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7862
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_EXIT_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7869
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_EXIT_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7899
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
79
int vcpu_writeregs_vmx(struct vcpu *, uint64_t, int, struct vcpu_reg_state *);
sys/arch/amd64/amd64/vmm_machdep.c
7908
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
7978
if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PINBASED_CTLS,
sys/arch/amd64/amd64/vmm_machdep.c
80
int vcpu_writeregs_svm(struct vcpu *, uint64_t, struct vcpu_reg_state *);
sys/arch/amd64/amd64/vmm_machdep.c
8099
vmx_vcpu_dump_regs(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
81
int vcpu_reset_regs(struct vcpu *, struct vcpu_reg_state *);
sys/arch/amd64/amd64/vmm_machdep.c
8106
DPRINTF("vcpu @ %p in %s mode\n", vcpu, vmm_decode_cpu_mode(vcpu));
sys/arch/amd64/amd64/vmm_machdep.c
8107
i = vmm_get_guest_cpu_cpl(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
8113
vcpu->vc_gueststate.vg_rax, vcpu->vc_gueststate.vg_rbx,
sys/arch/amd64/amd64/vmm_machdep.c
8114
vcpu->vc_gueststate.vg_rcx);
sys/arch/amd64/amd64/vmm_machdep.c
8116
vcpu->vc_gueststate.vg_rdx, vcpu->vc_gueststate.vg_rbp,
sys/arch/amd64/amd64/vmm_machdep.c
8117
vcpu->vc_gueststate.vg_rdi);
sys/arch/amd64/amd64/vmm_machdep.c
8119
vcpu->vc_gueststate.vg_rsi, vcpu->vc_gueststate.vg_r8,
sys/arch/amd64/amd64/vmm_machdep.c
8120
vcpu->vc_gueststate.vg_r9);
sys/arch/amd64/amd64/vmm_machdep.c
8122
vcpu->vc_gueststate.vg_r10, vcpu->vc_gueststate.vg_r11,
sys/arch/amd64/amd64/vmm_machdep.c
8123
vcpu->vc_gueststate.vg_r12);
sys/arch/amd64/amd64/vmm_machdep.c
8125
vcpu->vc_gueststate.vg_r13, vcpu->vc_gueststate.vg_r14,
sys/arch/amd64/amd64/vmm_machdep.c
8126
vcpu->vc_gueststate.vg_r15);
sys/arch/amd64/amd64/vmm_machdep.c
8128
DPRINTF(" rip=0x%016llx rsp=", vcpu->vc_gueststate.vg_rip);
sys/arch/amd64/amd64/vmm_machdep.c
8150
DPRINTF(" cr2=0x%016llx\n", vcpu->vc_gueststate.vg_cr2);
sys/arch/amd64/amd64/vmm_machdep.c
82
int vcpu_reset_regs_vmx(struct vcpu *, struct vcpu_reg_state *);
sys/arch/amd64/amd64/vmm_machdep.c
83
int vcpu_reset_regs_svm(struct vcpu *, struct vcpu_reg_state *);
sys/arch/amd64/amd64/vmm_machdep.c
84
int vcpu_svm_init_vmsa(struct vcpu *, struct vcpu_reg_state *);
sys/arch/amd64/amd64/vmm_machdep.c
8403
(uint64_t)vcpu->vc_vmx_msr_exit_save_va,
sys/arch/amd64/amd64/vmm_machdep.c
8404
(uint64_t)vcpu->vc_vmx_msr_exit_save_pa);
sys/arch/amd64/amd64/vmm_machdep.c
8406
msr_store = (struct vmx_msr_store *)vcpu->vc_vmx_msr_exit_save_va;
sys/arch/amd64/amd64/vmm_machdep.c
85
int vcpu_reload_vmcs_vmx(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
86
int vcpu_init(struct vcpu *, struct vm_create_params *);
sys/arch/amd64/amd64/vmm_machdep.c
87
int vcpu_init_vmx(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
874
vmx_remote_vmclear(struct cpu_info *ci, struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
88
int vcpu_init_svm(struct vcpu *, struct vm_create_params *);
sys/arch/amd64/amd64/vmm_machdep.c
881
atomic_swap_ulong(&ci->ci_vmcs_pa, vcpu->vc_control_pa);
sys/arch/amd64/amd64/vmm_machdep.c
8864
vmm_decode_cpu_mode(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
8866
int mode = vmm_get_guest_cpu_mode(vcpu);
sys/arch/amd64/amd64/vmm_machdep.c
89
int vcpu_run_vmx(struct vcpu *, struct vm_run_params *);
sys/arch/amd64/amd64/vmm_machdep.c
894
atomic_swap_uint(&vcpu->vc_vmx_vmcs_state, VMCS_CLEARED);
sys/arch/amd64/amd64/vmm_machdep.c
90
int vcpu_run_svm(struct vcpu *, struct vm_run_params *);
sys/arch/amd64/amd64/vmm_machdep.c
91
void vcpu_deinit(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
92
void vcpu_deinit_svm(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
93
void vcpu_deinit_vmx(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
94
int vcpu_vmx_check_cap(struct vcpu *, uint32_t, uint32_t, int);
sys/arch/amd64/amd64/vmm_machdep.c
955
vcpu_reload_vmcs_vmx(struct vcpu *vcpu)
sys/arch/amd64/amd64/vmm_machdep.c
959
rw_assert_wrlock(&vcpu->vc_lock);
sys/arch/amd64/amd64/vmm_machdep.c
962
last_ci = vcpu->vc_last_pcpu;
sys/arch/amd64/amd64/vmm_machdep.c
966
if (vmclear(&vcpu->vc_control_pa))
sys/arch/amd64/amd64/vmm_machdep.c
968
atomic_swap_uint(&vcpu->vc_vmx_vmcs_state, VMCS_CLEARED);
sys/arch/amd64/amd64/vmm_machdep.c
97
int vmx_load_pdptes(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
972
if (vmx_remote_vmclear(last_ci, vcpu))
sys/arch/amd64/amd64/vmm_machdep.c
974
KASSERT(vcpu->vc_vmx_vmcs_state == VMCS_CLEARED);
sys/arch/amd64/amd64/vmm_machdep.c
978
if (vmptrld(&vcpu->vc_control_pa)) {
sys/arch/amd64/amd64/vmm_machdep.c
98
int vmx_handle_exit(struct vcpu *);
sys/arch/amd64/amd64/vmm_machdep.c
99
int svm_handle_exit(struct vcpu *);
sys/arch/amd64/include/cpu.h
110
struct vcpu;
sys/arch/amd64/include/cpu.h
246
struct vcpu *ci_guest_vcpu; /* [o] last vcpu resumed */
sys/arch/amd64/include/vmmvar.h
1037
SLIST_HEAD(vcpu_head, vcpu);
sys/arch/amd64/include/vmmvar.h
1065
int vcpu_init(struct vcpu *, struct vm_create_params *);
sys/arch/amd64/include/vmmvar.h
1066
void vcpu_deinit(struct vcpu *);
sys/arch/amd64/include/vmmvar.h
1068
int vcpu_reset_regs(struct vcpu *, struct vcpu_reg_state *);
sys/arch/amd64/include/vmmvar.h
968
SLIST_ENTRY(vcpu) vc_vcpu_link; /* [V] */
sys/dev/pv/xen.c
822
ebv.vcpu = 0;
sys/dev/pv/xen.c
825
sc->sc_dev.dv_xname, ebv.port, ebv.vcpu);
sys/dev/pv/xen.c
845
es.port, es.vcpu);
sys/dev/pv/xenreg.h
495
uint32_t vcpu; /* VCPU to which this channel is bound. */
sys/dev/pv/xenreg.h
524
uint32_t vcpu;
sys/dev/vmm/vmm.c
327
struct vcpu *
sys/dev/vmm/vmm.c
330
struct vcpu *vcpu;
sys/dev/vmm/vmm.c
335
SLIST_FOREACH(vcpu, &vm->vm_vcpu_list, vc_vcpu_link) {
sys/dev/vmm/vmm.c
336
if (vcpu->vc_id == id)
sys/dev/vmm/vmm.c
337
return (vcpu);
sys/dev/vmm/vmm.c
361
struct vcpu *vcpu;
sys/dev/vmm/vmm.c
458
vcpu = pool_get(&vcpu_pool, PR_WAITOK | PR_ZERO);
sys/dev/vmm/vmm.c
460
vcpu->vc_parent = vm;
sys/dev/vmm/vmm.c
461
vcpu->vc_id = vm->vm_vcpu_ct;
sys/dev/vmm/vmm.c
464
if ((ret = vcpu_init(vcpu, vcp)) != 0) {
sys/dev/vmm/vmm.c
466
pool_put(&vcpu_pool, vcpu);
sys/dev/vmm/vmm.c
470
SLIST_INSERT_HEAD(&vm->vm_vcpu_list, vcpu, vc_vcpu_link);
sys/dev/vmm/vmm.c
580
struct vcpu *vcpu, *tmp;
sys/dev/vmm/vmm.c
587
SLIST_FOREACH_SAFE(vcpu, &vm->vm_vcpu_list, vc_vcpu_link, tmp) {
sys/dev/vmm/vmm.c
588
SLIST_REMOVE(&vm->vm_vcpu_list, vcpu, vcpu, vc_vcpu_link);
sys/dev/vmm/vmm.c
589
vcpu_deinit(vcpu);
sys/dev/vmm/vmm.c
590
pool_put(&vcpu_pool, vcpu);
sys/dev/vmm/vmm.c
640
struct vcpu *vcpu;
sys/dev/vmm/vmm.c
677
SLIST_FOREACH(vcpu, &vm->vm_vcpu_list,
sys/dev/vmm/vmm.c
679
if (vcpu->vc_id == j)
sys/dev/vmm/vmm.c
681
vcpu->vc_state;
sys/dev/vmm/vmm.c
76
pool_init(&vcpu_pool, sizeof(struct vcpu), 64, IPL_MPFLOOR, PR_WAITOK,
sys/dev/vmm/vmm.c
780
struct vcpu *vcpu;
sys/dev/vmm/vmm.c
793
vcpu = vm_find_vcpu(vm, vrp->vrp_vcpu_id);
sys/dev/vmm/vmm.c
795
if (vcpu == NULL) {
sys/dev/vmm/vmm.c
802
rw_enter_write(&vcpu->vc_lock);
sys/dev/vmm/vmm.c
803
if (vcpu->vc_state != VCPU_STATE_STOPPED)
sys/dev/vmm/vmm.c
806
if (vcpu_reset_regs(vcpu, &vrp->vrp_init_state)) {
sys/dev/vmm/vmm.c
809
dump_vcpu(vcpu);
sys/dev/vmm/vmm.c
814
rw_exit_write(&vcpu->vc_lock);
sys/dev/vmm/vmm.c
837
vcpu_must_stop(struct vcpu *vcpu)
sys/dev/vmm/vmm.c
841
if (vcpu->vc_state == VCPU_STATE_REQTERM)
sys/dev/vmm/vmm.h
255
struct vcpu *vm_find_vcpu(struct vm *, uint32_t);
sys/dev/vmm/vmm.h
263
int vcpu_must_stop(struct vcpu *);
sys/dev/vmm/vmm.h
268
void dump_vcpu(struct vcpu *);
usr.sbin/ldomctl/config.c
2812
primary_num_cpus = domain->vcpu;
usr.sbin/ldomctl/config.c
2816
num_cpus += (domain->vcpu * domain->vcpu_stride);
usr.sbin/ldomctl/config.c
2863
for (i = 0; i < domain->vcpu; i++)
usr.sbin/ldomctl/ldomctl.h
185
uint64_t vcpu, vcpu_stride;
usr.sbin/ldomctl/parse.y
108
%type <v.vcpu_opts> vcpu
usr.sbin/ldomctl/parse.y
139
if (domain->vcpu == 0) {
usr.sbin/ldomctl/parse.y
169
domainopts : VCPU vcpu {
usr.sbin/ldomctl/parse.y
170
if (domain->vcpu) {
usr.sbin/ldomctl/parse.y
174
domain->vcpu = $2.count;
usr.sbin/ldomctl/parse.y
291
vcpu : STRING {
usr.sbin/vmd/vionet.c
1541
msg.vcpu = 0; /* XXX: smp */
usr.sbin/vmd/vionet.c
1563
msg.vcpu = 0; /* XXX: smp */
usr.sbin/vmd/virtio.c
1828
vcpu_assert_irq(vmm_id, msg->vcpu, msg->irq);
usr.sbin/vmd/virtio.c
1830
vcpu_deassert_irq(vmm_id, msg->vcpu, msg->irq);
usr.sbin/vmd/virtio.c
1934
vcpu_assert_irq(dev->vmm_id, msg.vcpu, msg.irq);
usr.sbin/vmd/virtio.c
1936
vcpu_deassert_irq(dev->vmm_id, msg.vcpu, msg.irq);
usr.sbin/vmd/virtio.c
1952
virtio_assert_irq(struct virtio_dev *dev, int vcpu)
usr.sbin/vmd/virtio.c
1959
msg.vcpu = vcpu;
usr.sbin/vmd/virtio.c
1970
virtio_deassert_irq(struct virtio_dev *dev, int vcpu)
usr.sbin/vmd/virtio.c
1977
msg.vcpu = vcpu;
usr.sbin/vmd/virtio.h
140
uint8_t vcpu; /* VCPU id */
