vACR
#define ADB_SET_SR_INPUT() via_reg_and(VIA1, vACR, ~vSR_OUT)
#define ADB_SET_SR_OUTPUT() via_reg_or(VIA1, vACR, vSR_OUT)
via_reg_and(VIA1, vACR, ~vSR_OUT); /* make sure SR is set
write_via_reg(VIA1, vACR, (read_via_reg(VIA1, vACR) | 0x0c) & ~0x10);
via_reg_or(VIA1, vACR, 0x0c);
via_reg_and(VIA1, vACR, ~0x10);
via_reg_or(VIA1, vACR, 0x1c);
via_reg_or(VIA1, vACR, 0x1c);
via_reg_or(VIA1, vACR, 0x1c);
via_reg_or(VIA1, vACR, 0x1c);