urtwn_write_4
urtwn_write_4(sc, R92C_SYS_SWR_CTRL2, reg);
urtwn_write_4(sc, R92C_AFE_XTAL_CTRL_EXT,
urtwn_write_4(sc, R92C_AFE_XTAL_CTRL_EXT,
urtwn_write_4(sc, R92C_APS_FSMCO,
urtwn_write_4(sc, R92E_AUTO_LLT,
urtwn_write_4(sc, R92C_MCUFWDL, reg);
urtwn_write_4(sc, R92C_RQPN,
urtwn_write_4(sc, R92C_TDECTRL, reg);
urtwn_write_4(sc, R92C_TXDMA_OFFSET_CHK,
urtwn_write_4(sc, R92C_AFE_XTAL_CTRL, 0x000f81fb);
urtwn_write_4(sc, R92C_AGGLEN_LMT, 0xffffffff);
urtwn_write_4(sc, R92C_FAST_EDCA_CTRL, 0x03086666);
void urtwn_write_4(void *, uint16_t, uint32_t);
#define urtwn_bb_write urtwn_write_4
sc->sc_sc.sc_ops.write_4 = urtwn_write_4;
urtwn_write_4(sc, R92C_LLT_INIT,