urtwn_bb_write
urtwn_bb_write(sc, prog->regs[i], prog->vals[i]);
urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg);
urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg);
urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg);
urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg);
urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg);
urtwn_bb_write(sc, 0xe74, reg);
urtwn_bb_write(sc, 0xe78, reg);
urtwn_bb_write(sc, 0xe7c, reg);
urtwn_bb_write(sc, 0xe80, reg);
urtwn_bb_write(sc, 0xe88, reg);
urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE,
urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422);
urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420);
urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x00040022);
urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x00040020);
urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL,
urtwn_bb_write(sc, R92C_AFE_CTRL3,