Symbol: track
sbin/fdisk/cmd.c
215
uint64_t track;
sbin/fdisk/cmd.c
251
track = start.chs_cyl * disk.dk_heads + start.chs_head;
sbin/fdisk/cmd.c
252
pp->prt_bs = track * disk.dk_sectors + (start.chs_sect - 1);
sbin/fdisk/cmd.c
253
track = end.chs_cyl * disk.dk_heads + end.chs_head;
sbin/fdisk/cmd.c
254
pp->prt_ns = track * disk.dk_sectors + (end.chs_sect - 1) -
sys/arch/sh/sh/trap.c
321
int err, track, access_type;
sys/arch/sh/sh/trap.c
350
track = PG_PMAP_REF;
sys/arch/sh/sh/trap.c
354
track = PG_PMAP_REF;
sys/arch/sh/sh/trap.c
358
track = PG_PMAP_REF | PG_PMAP_MOD;
sys/arch/sh/sh/trap.c
376
track = 0; /* call uvm_fault first. (COW) */
sys/arch/sh/sh/trap.c
412
if (track && __pmap_pte_load(pmap, va, track)) {
sys/arch/sh/sh/trap.c
430
int loaded = __pmap_pte_load(pmap, va, track);
sys/dev/pci/drm/i915/gvt/gtt.c
740
struct intel_vgpu_page_track *track;
sys/dev/pci/drm/i915/gvt/gtt.c
742
track = intel_vgpu_find_page_track(vgpu, gfn);
sys/dev/pci/drm/i915/gvt/gtt.c
743
if (track && track->handler == ppgtt_write_protection_handler)
sys/dev/pci/drm/i915/gvt/gtt.c
744
return track->priv_data;
sys/dev/pci/drm/i915/gvt/page_track.c
105
struct intel_vgpu_page_track *track;
sys/dev/pci/drm/i915/gvt/page_track.c
108
track = intel_vgpu_find_page_track(vgpu, gfn);
sys/dev/pci/drm/i915/gvt/page_track.c
109
if (!track)
sys/dev/pci/drm/i915/gvt/page_track.c
112
if (track->tracked)
sys/dev/pci/drm/i915/gvt/page_track.c
118
track->tracked = true;
sys/dev/pci/drm/i915/gvt/page_track.c
132
struct intel_vgpu_page_track *track;
sys/dev/pci/drm/i915/gvt/page_track.c
135
track = intel_vgpu_find_page_track(vgpu, gfn);
sys/dev/pci/drm/i915/gvt/page_track.c
136
if (!track)
sys/dev/pci/drm/i915/gvt/page_track.c
139
if (!track->tracked)
sys/dev/pci/drm/i915/gvt/page_track.c
145
track->tracked = false;
sys/dev/pci/drm/i915/gvt/page_track.c
53
struct intel_vgpu_page_track *track;
sys/dev/pci/drm/i915/gvt/page_track.c
56
track = intel_vgpu_find_page_track(vgpu, gfn);
sys/dev/pci/drm/i915/gvt/page_track.c
57
if (track)
sys/dev/pci/drm/i915/gvt/page_track.c
60
track = kzalloc(sizeof(*track), GFP_KERNEL);
sys/dev/pci/drm/i915/gvt/page_track.c
61
if (!track)
sys/dev/pci/drm/i915/gvt/page_track.c
64
track->handler = handler;
sys/dev/pci/drm/i915/gvt/page_track.c
65
track->priv_data = priv;
sys/dev/pci/drm/i915/gvt/page_track.c
67
ret = radix_tree_insert(&vgpu->page_track_tree, gfn, track);
sys/dev/pci/drm/i915/gvt/page_track.c
69
kfree(track);
sys/dev/pci/drm/i915/gvt/page_track.c
85
struct intel_vgpu_page_track *track;
sys/dev/pci/drm/i915/gvt/page_track.c
87
track = radix_tree_delete(&vgpu->page_track_tree, gfn);
sys/dev/pci/drm/i915/gvt/page_track.c
88
if (track) {
sys/dev/pci/drm/i915/gvt/page_track.c
89
if (track->tracked)
sys/dev/pci/drm/i915/gvt/page_track.c
91
kfree(track);
sys/dev/pci/drm/radeon/evergreen_cs.c
1005
if (G_028040_FORMAT(track->db_z_info) != V_028040_Z_INVALID &&
sys/dev/pci/drm/radeon/evergreen_cs.c
1006
G_028800_Z_ENABLE(track->db_depth_control)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
1011
track->db_dirty = false;
sys/dev/pci/drm/radeon/evergreen_cs.c
1097
struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
1153
track->db_depth_control = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1154
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1171
track->db_z_info = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1180
track->db_z_info &= ~Z_ARRAY_MODE(0xf);
sys/dev/pci/drm/radeon/evergreen_cs.c
1182
track->db_z_info |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags));
sys/dev/pci/drm/radeon/evergreen_cs.c
1189
ib[idx] |= DB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks));
sys/dev/pci/drm/radeon/evergreen_cs.c
119
static void evergreen_cs_track_init(struct evergreen_cs_track *track)
sys/dev/pci/drm/radeon/evergreen_cs.c
1196
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1199
track->db_s_info = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1200
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1203
track->db_depth_view = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1204
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1207
track->db_depth_size = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1208
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1211
track->db_depth_slice = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1212
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1221
track->db_z_read_offset = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1223
track->db_z_read_bo = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
1224
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1233
track->db_z_write_offset = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1235
track->db_z_write_bo = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
1236
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
124
track->cb_color_fmask_bo[i] = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
1245
track->db_s_read_offset = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1247
track->db_s_read_bo = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
1248
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
125
track->cb_color_cmask_bo[i] = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
1257
track->db_s_write_offset = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1259
track->db_s_write_bo = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
126
track->cb_color_cmask_slice[i] = 0;
sys/dev/pci/drm/radeon/evergreen_cs.c
1260
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1263
track->vgt_strmout_config = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1264
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1267
track->vgt_strmout_buffer_config = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1268
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
127
track->cb_color_fmask_slice[i] = 0;
sys/dev/pci/drm/radeon/evergreen_cs.c
1281
track->vgt_strmout_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
1283
track->vgt_strmout_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
1284
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1292
track->vgt_strmout_size[tmp] = radeon_get_ib_value(p, idx) * 4;
sys/dev/pci/drm/radeon/evergreen_cs.c
1293
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1305
track->cb_target_mask = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1306
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1309
track->cb_shader_mask = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
131
track->cb_color_bo[i] = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
1310
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1319
track->nsamples = 1 << tmp;
sys/dev/pci/drm/radeon/evergreen_cs.c
132
track->cb_color_bo_offset[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1328
track->nsamples = 1 << tmp;
sys/dev/pci/drm/radeon/evergreen_cs.c
133
track->cb_color_info[i] = 0;
sys/dev/pci/drm/radeon/evergreen_cs.c
1339
track->cb_color_view[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
134
track->cb_color_view[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1340
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1347
track->cb_color_view[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1348
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
135
track->cb_color_pitch[i] = 0;
sys/dev/pci/drm/radeon/evergreen_cs.c
1359
track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
136
track->cb_color_slice[i] = 0xfffffff;
sys/dev/pci/drm/radeon/evergreen_cs.c
1368
track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags));
sys/dev/pci/drm/radeon/evergreen_cs.c
137
track->cb_color_slice_idx[i] = 0;
sys/dev/pci/drm/radeon/evergreen_cs.c
1370
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1377
track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1386
track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags));
sys/dev/pci/drm/radeon/evergreen_cs.c
1388
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
139
track->cb_target_mask = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1399
track->cb_color_pitch[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
140
track->cb_shader_mask = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1400
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1407
track->cb_color_pitch[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1408
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
141
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1419
track->cb_color_slice[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1420
track->cb_color_slice_idx[tmp] = idx;
sys/dev/pci/drm/radeon/evergreen_cs.c
1421
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1428
track->cb_color_slice[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1429
track->cb_color_slice_idx[tmp] = idx;
sys/dev/pci/drm/radeon/evergreen_cs.c
143
track->db_depth_slice = 0xffffffff;
sys/dev/pci/drm/radeon/evergreen_cs.c
1430
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
144
track->db_depth_view = 0xFFFFC000;
sys/dev/pci/drm/radeon/evergreen_cs.c
145
track->db_depth_size = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1453
ib[idx] |= CB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks));
sys/dev/pci/drm/radeon/evergreen_cs.c
146
track->db_depth_control = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1461
track->cb_color_attrib[tmp] = ib[idx];
sys/dev/pci/drm/radeon/evergreen_cs.c
1462
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
147
track->db_z_info = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
148
track->db_z_read_offset = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1481
ib[idx] |= CB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks));
sys/dev/pci/drm/radeon/evergreen_cs.c
1489
track->cb_color_attrib[tmp] = ib[idx];
sys/dev/pci/drm/radeon/evergreen_cs.c
149
track->db_z_write_offset = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1490
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
150
track->db_z_read_bo = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
1507
track->cb_color_fmask_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
151
track->db_z_write_bo = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
152
track->db_s_info = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1524
track->cb_color_cmask_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
153
track->db_s_read_offset = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1535
track->cb_color_fmask_slice[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
154
track->db_s_write_offset = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1546
track->cb_color_cmask_slice[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
155
track->db_s_read_bo = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
156
track->db_s_write_bo = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
1563
track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1565
track->cb_color_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
1566
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
157
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1579
track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
158
track->htile_bo = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
1581
track->cb_color_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
1582
track->cb_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
159
track->htile_offset = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
1591
track->htile_offset = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
1593
track->htile_bo = reloc->robj;
sys/dev/pci/drm/radeon/evergreen_cs.c
1594
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
1598
track->htile_surface = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/evergreen_cs.c
160
track->htile_surface = 0;
sys/dev/pci/drm/radeon/evergreen_cs.c
1601
track->db_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
163
track->vgt_strmout_size[i] = 0;
sys/dev/pci/drm/radeon/evergreen_cs.c
164
track->vgt_strmout_bo[i] = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
165
track->vgt_strmout_bo_offset[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/evergreen_cs.c
167
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/evergreen_cs.c
168
track->sx_misc_kill_all_prims = false;
sys/dev/pci/drm/radeon/evergreen_cs.c
1740
track->sx_misc_kill_all_prims = (radeon_get_ib_value(p, idx) & 0x1) != 0;
sys/dev/pci/drm/radeon/evergreen_cs.c
1759
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
1767
if (!(track->reg_safe_bm[i] & m))
sys/dev/pci/drm/radeon/evergreen_cs.c
1777
struct evergreen_cs_track *track;
sys/dev/pci/drm/radeon/evergreen_cs.c
1785
track = (struct evergreen_cs_track *)p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
2024
track->indirect_draw_buffer_size = radeon_bo_size(reloc->robj);
sys/dev/pci/drm/radeon/evergreen_cs.c
2046
if (idx_value + size > track->indirect_draw_buffer_size) {
sys/dev/pci/drm/radeon/evergreen_cs.c
2048
idx_value, size, track->indirect_draw_buffer_size);
sys/dev/pci/drm/radeon/evergreen_cs.c
206
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
209
palign = MAX(64, track->group_size / surf->bpe);
sys/dev/pci/drm/radeon/evergreen_cs.c
211
surf->base_align = track->group_size;
sys/dev/pci/drm/radeon/evergreen_cs.c
228
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
231
palign = track->group_size / (8 * surf->bpe * surf->nsamples);
sys/dev/pci/drm/radeon/evergreen_cs.c
234
surf->base_align = track->group_size;
sys/dev/pci/drm/radeon/evergreen_cs.c
2375
TEX_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks));
sys/dev/pci/drm/radeon/evergreen_cs.c
241
track->group_size, surf->bpe, surf->nsamples);
sys/dev/pci/drm/radeon/evergreen_cs.c
259
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
270
palign = (8 * surf->bankw * track->npipes) * surf->mtilea;
sys/dev/pci/drm/radeon/evergreen_cs.c
2766
struct evergreen_cs_track *track;
sys/dev/pci/drm/radeon/evergreen_cs.c
2770
if (p->track == NULL) {
sys/dev/pci/drm/radeon/evergreen_cs.c
2772
track = kzalloc(sizeof(*track), GFP_KERNEL);
sys/dev/pci/drm/radeon/evergreen_cs.c
2773
if (track == NULL)
sys/dev/pci/drm/radeon/evergreen_cs.c
2775
evergreen_cs_track_init(track);
sys/dev/pci/drm/radeon/evergreen_cs.c
2778
track->reg_safe_bm = cayman_reg_safe_bm;
sys/dev/pci/drm/radeon/evergreen_cs.c
2781
track->reg_safe_bm = evergreen_reg_safe_bm;
sys/dev/pci/drm/radeon/evergreen_cs.c
2787
track->npipes = 1;
sys/dev/pci/drm/radeon/evergreen_cs.c
2791
track->npipes = 2;
sys/dev/pci/drm/radeon/evergreen_cs.c
2794
track->npipes = 4;
sys/dev/pci/drm/radeon/evergreen_cs.c
2797
track->npipes = 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
2803
track->nbanks = 4;
sys/dev/pci/drm/radeon/evergreen_cs.c
2807
track->nbanks = 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
2810
track->nbanks = 16;
sys/dev/pci/drm/radeon/evergreen_cs.c
2816
track->group_size = 256;
sys/dev/pci/drm/radeon/evergreen_cs.c
2820
track->group_size = 512;
sys/dev/pci/drm/radeon/evergreen_cs.c
2826
track->row_size = 1;
sys/dev/pci/drm/radeon/evergreen_cs.c
2830
track->row_size = 2;
sys/dev/pci/drm/radeon/evergreen_cs.c
2833
track->row_size = 4;
sys/dev/pci/drm/radeon/evergreen_cs.c
2837
p->track = track;
sys/dev/pci/drm/radeon/evergreen_cs.c
2842
kfree(p->track);
sys/dev/pci/drm/radeon/evergreen_cs.c
2843
p->track = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
2858
kfree(p->track);
sys/dev/pci/drm/radeon/evergreen_cs.c
2859
p->track = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
2863
kfree(p->track);
sys/dev/pci/drm/radeon/evergreen_cs.c
2864
p->track = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
2874
kfree(p->track);
sys/dev/pci/drm/radeon/evergreen_cs.c
2875
p->track = NULL;
sys/dev/pci/drm/radeon/evergreen_cs.c
397
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
403
mslice = G_028C6C_SLICE_MAX(track->cb_color_view[id]) + 1;
sys/dev/pci/drm/radeon/evergreen_cs.c
404
pitch = track->cb_color_pitch[id];
sys/dev/pci/drm/radeon/evergreen_cs.c
405
slice = track->cb_color_slice[id];
sys/dev/pci/drm/radeon/evergreen_cs.c
408
surf.mode = G_028C70_ARRAY_MODE(track->cb_color_info[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
409
surf.format = G_028C70_FORMAT(track->cb_color_info[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
410
surf.tsplit = G_028C74_TILE_SPLIT(track->cb_color_attrib[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
411
surf.nbanks = G_028C74_NUM_BANKS(track->cb_color_attrib[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
412
surf.bankw = G_028C74_BANK_WIDTH(track->cb_color_attrib[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
413
surf.bankh = G_028C74_BANK_HEIGHT(track->cb_color_attrib[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
414
surf.mtilea = G_028C74_MACRO_TILE_ASPECT(track->cb_color_attrib[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
420
id, track->cb_color_info[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
432
__func__, __LINE__, id, track->cb_color_pitch[id],
sys/dev/pci/drm/radeon/evergreen_cs.c
433
track->cb_color_slice[id], track->cb_color_attrib[id],
sys/dev/pci/drm/radeon/evergreen_cs.c
434
track->cb_color_info[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
438
offset = (u64)track->cb_color_bo_offset[id] << 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
446
if (offset > radeon_bo_size(track->cb_color_bo[id])) {
sys/dev/pci/drm/radeon/evergreen_cs.c
459
bsize = radeon_bo_size(track->cb_color_bo[id]);
sys/dev/pci/drm/radeon/evergreen_cs.c
460
tmp = (u64)track->cb_color_bo_offset[id] << 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
474
ib[track->cb_color_slice_idx[id]] = slice;
sys/dev/pci/drm/radeon/evergreen_cs.c
483
(u64)track->cb_color_bo_offset[id] << 8, mslice,
sys/dev/pci/drm/radeon/evergreen_cs.c
484
radeon_bo_size(track->cb_color_bo[id]), slice);
sys/dev/pci/drm/radeon/evergreen_cs.c
500
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
503
if (track->htile_bo == NULL) {
sys/dev/pci/drm/radeon/evergreen_cs.c
505
__func__, __LINE__, track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
509
if (G_028ABC_LINEAR(track->htile_surface)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
513
nby = round_up(nby, track->npipes * 8);
sys/dev/pci/drm/radeon/evergreen_cs.c
519
switch (track->npipes) {
sys/dev/pci/drm/radeon/evergreen_cs.c
542
__func__, __LINE__, track->npipes);
sys/dev/pci/drm/radeon/evergreen_cs.c
550
size = roundup(nbx * nby * 4, track->npipes * (2 << 10));
sys/dev/pci/drm/radeon/evergreen_cs.c
551
size += track->htile_offset;
sys/dev/pci/drm/radeon/evergreen_cs.c
553
if (size > radeon_bo_size(track->htile_bo)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
555
__func__, __LINE__, radeon_bo_size(track->htile_bo),
sys/dev/pci/drm/radeon/evergreen_cs.c
564
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
570
mslice = G_028008_SLICE_MAX(track->db_depth_view) + 1;
sys/dev/pci/drm/radeon/evergreen_cs.c
571
pitch = G_028058_PITCH_TILE_MAX(track->db_depth_size);
sys/dev/pci/drm/radeon/evergreen_cs.c
572
slice = track->db_depth_slice;
sys/dev/pci/drm/radeon/evergreen_cs.c
575
surf.mode = G_028040_ARRAY_MODE(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
576
surf.format = G_028044_FORMAT(track->db_s_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
577
surf.tsplit = G_028044_TILE_SPLIT(track->db_s_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
578
surf.nbanks = G_028040_NUM_BANKS(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
579
surf.bankw = G_028040_BANK_WIDTH(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
580
surf.bankh = G_028040_BANK_HEIGHT(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
581
surf.mtilea = G_028040_MACRO_TILE_ASPECT(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
607
__func__, __LINE__, track->db_depth_size,
sys/dev/pci/drm/radeon/evergreen_cs.c
608
track->db_depth_slice, track->db_s_info, track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
613
offset = (u64)track->db_s_read_offset << 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
620
if (offset > radeon_bo_size(track->db_s_read_bo)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
624
(u64)track->db_s_read_offset << 8, mslice,
sys/dev/pci/drm/radeon/evergreen_cs.c
625
radeon_bo_size(track->db_s_read_bo));
sys/dev/pci/drm/radeon/evergreen_cs.c
627
__func__, __LINE__, track->db_depth_size,
sys/dev/pci/drm/radeon/evergreen_cs.c
628
track->db_depth_slice, track->db_s_info, track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
632
offset = (u64)track->db_s_write_offset << 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
639
if (offset > radeon_bo_size(track->db_s_write_bo)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
643
(u64)track->db_s_write_offset << 8, mslice,
sys/dev/pci/drm/radeon/evergreen_cs.c
644
radeon_bo_size(track->db_s_write_bo));
sys/dev/pci/drm/radeon/evergreen_cs.c
649
if (G_028040_TILE_SURFACE_ENABLE(track->db_z_info)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
661
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
667
mslice = G_028008_SLICE_MAX(track->db_depth_view) + 1;
sys/dev/pci/drm/radeon/evergreen_cs.c
668
pitch = G_028058_PITCH_TILE_MAX(track->db_depth_size);
sys/dev/pci/drm/radeon/evergreen_cs.c
669
slice = track->db_depth_slice;
sys/dev/pci/drm/radeon/evergreen_cs.c
672
surf.mode = G_028040_ARRAY_MODE(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
673
surf.format = G_028040_FORMAT(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
674
surf.tsplit = G_028040_TILE_SPLIT(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
675
surf.nbanks = G_028040_NUM_BANKS(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
676
surf.bankw = G_028040_BANK_WIDTH(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
677
surf.bankh = G_028040_BANK_HEIGHT(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
678
surf.mtilea = G_028040_MACRO_TILE_ASPECT(track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
698
__func__, __LINE__, track->db_depth_size,
sys/dev/pci/drm/radeon/evergreen_cs.c
699
track->db_depth_slice, track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
706
__func__, __LINE__, track->db_depth_size,
sys/dev/pci/drm/radeon/evergreen_cs.c
707
track->db_depth_slice, track->db_z_info);
sys/dev/pci/drm/radeon/evergreen_cs.c
711
offset = (u64)track->db_z_read_offset << 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
718
if (offset > radeon_bo_size(track->db_z_read_bo)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
722
(u64)track->db_z_read_offset << 8, mslice,
sys/dev/pci/drm/radeon/evergreen_cs.c
723
radeon_bo_size(track->db_z_read_bo));
sys/dev/pci/drm/radeon/evergreen_cs.c
727
offset = (u64)track->db_z_write_offset << 8;
sys/dev/pci/drm/radeon/evergreen_cs.c
734
if (offset > radeon_bo_size(track->db_z_write_bo)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
738
(u64)track->db_z_write_offset << 8, mslice,
sys/dev/pci/drm/radeon/evergreen_cs.c
739
radeon_bo_size(track->db_z_write_bo));
sys/dev/pci/drm/radeon/evergreen_cs.c
744
if (G_028040_TILE_SURFACE_ENABLE(track->db_z_info)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
935
struct evergreen_cs_track *track = p->track;
sys/dev/pci/drm/radeon/evergreen_cs.c
941
if (track->streamout_dirty && track->vgt_strmout_config) {
sys/dev/pci/drm/radeon/evergreen_cs.c
943
if (track->vgt_strmout_config & (1 << i)) {
sys/dev/pci/drm/radeon/evergreen_cs.c
944
buffer_mask |= (track->vgt_strmout_buffer_config >> (i * 4)) & 0xf;
sys/dev/pci/drm/radeon/evergreen_cs.c
950
if (track->vgt_strmout_bo[i]) {
sys/dev/pci/drm/radeon/evergreen_cs.c
951
u64 offset = (u64)track->vgt_strmout_bo_offset[i] +
sys/dev/pci/drm/radeon/evergreen_cs.c
952
(u64)track->vgt_strmout_size[i];
sys/dev/pci/drm/radeon/evergreen_cs.c
953
if (offset > radeon_bo_size(track->vgt_strmout_bo[i])) {
sys/dev/pci/drm/radeon/evergreen_cs.c
956
radeon_bo_size(track->vgt_strmout_bo[i]));
sys/dev/pci/drm/radeon/evergreen_cs.c
965
track->streamout_dirty = false;
sys/dev/pci/drm/radeon/evergreen_cs.c
968
if (track->sx_misc_kill_all_prims)
sys/dev/pci/drm/radeon/evergreen_cs.c
973
if (track->cb_dirty) {
sys/dev/pci/drm/radeon/evergreen_cs.c
974
tmp = track->cb_target_mask;
sys/dev/pci/drm/radeon/evergreen_cs.c
976
u32 format = G_028C70_FORMAT(track->cb_color_info[i]);
sys/dev/pci/drm/radeon/evergreen_cs.c
981
if (track->cb_color_bo[i] == NULL) {
sys/dev/pci/drm/radeon/evergreen_cs.c
983
__func__, __LINE__, track->cb_target_mask, track->cb_shader_mask, i);
sys/dev/pci/drm/radeon/evergreen_cs.c
993
track->cb_dirty = false;
sys/dev/pci/drm/radeon/evergreen_cs.c
996
if (track->db_dirty) {
sys/dev/pci/drm/radeon/evergreen_cs.c
998
if (G_028044_FORMAT(track->db_s_info) != V_028044_STENCIL_INVALID &&
sys/dev/pci/drm/radeon/evergreen_cs.c
999
G_028800_STENCIL_ENABLE(track->db_depth_control)) {
sys/dev/pci/drm/radeon/r100.c
1336
struct r100_cs_track *track;
sys/dev/pci/drm/radeon/r100.c
1342
track = (struct r100_cs_track *)p->track;
sys/dev/pci/drm/radeon/r100.c
1350
track->num_arrays = c;
sys/dev/pci/drm/radeon/r100.c
1362
track->arrays[i + 0].esize = idx_value >> 8;
sys/dev/pci/drm/radeon/r100.c
1363
track->arrays[i + 0].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1364
track->arrays[i + 0].esize &= 0x7F;
sys/dev/pci/drm/radeon/r100.c
1373
track->arrays[i + 1].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1374
track->arrays[i + 1].esize = idx_value >> 24;
sys/dev/pci/drm/radeon/r100.c
1375
track->arrays[i + 1].esize &= 0x7F;
sys/dev/pci/drm/radeon/r100.c
1387
track->arrays[i + 0].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1388
track->arrays[i + 0].esize = idx_value >> 8;
sys/dev/pci/drm/radeon/r100.c
1389
track->arrays[i + 0].esize &= 0x7F;
sys/dev/pci/drm/radeon/r100.c
1585
struct r100_cs_track *track;
sys/dev/pci/drm/radeon/r100.c
1594
track = (struct r100_cs_track *)p->track;
sys/dev/pci/drm/radeon/r100.c
1624
track->zb.robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1625
track->zb.offset = idx_value;
sys/dev/pci/drm/radeon/r100.c
1626
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1637
track->cb[0].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1638
track->cb[0].offset = idx_value;
sys/dev/pci/drm/radeon/r100.c
1639
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1664
track->textures[i].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1665
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1680
track->textures[0].cube_info[i].offset = idx_value;
sys/dev/pci/drm/radeon/r100.c
1682
track->textures[0].cube_info[i].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1683
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1698
track->textures[1].cube_info[i].offset = idx_value;
sys/dev/pci/drm/radeon/r100.c
1700
track->textures[1].cube_info[i].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1701
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1716
track->textures[2].cube_info[i].offset = idx_value;
sys/dev/pci/drm/radeon/r100.c
1718
track->textures[2].cube_info[i].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1719
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1722
track->maxy = ((idx_value >> 16) & 0x7FF);
sys/dev/pci/drm/radeon/r100.c
1723
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1724
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1746
track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK;
sys/dev/pci/drm/radeon/r100.c
1747
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1750
track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK;
sys/dev/pci/drm/radeon/r100.c
1751
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1760
track->cb[0].cpp = 1;
sys/dev/pci/drm/radeon/r100.c
1765
track->cb[0].cpp = 2;
sys/dev/pci/drm/radeon/r100.c
1768
track->cb[0].cpp = 4;
sys/dev/pci/drm/radeon/r100.c
1775
track->z_enabled = !!(idx_value & RADEON_Z_ENABLE);
sys/dev/pci/drm/radeon/r100.c
1776
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1777
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1782
track->zb.cpp = 2;
sys/dev/pci/drm/radeon/r100.c
1790
track->zb.cpp = 4;
sys/dev/pci/drm/radeon/r100.c
1795
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1810
for (i = 0; i < track->num_texture; i++)
sys/dev/pci/drm/radeon/r100.c
1811
track->textures[i].enabled = !!(temp & (1 << i));
sys/dev/pci/drm/radeon/r100.c
1812
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1816
track->vap_vf_cntl = idx_value;
sys/dev/pci/drm/radeon/r100.c
1819
track->vtx_size = r100_get_vtx_size(idx_value);
sys/dev/pci/drm/radeon/r100.c
1825
track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1;
sys/dev/pci/drm/radeon/r100.c
1826
track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1;
sys/dev/pci/drm/radeon/r100.c
1827
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1833
track->textures[i].pitch = idx_value + 32;
sys/dev/pci/drm/radeon/r100.c
1834
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1840
track->textures[i].num_levels = ((idx_value & RADEON_MAX_MIP_LEVEL_MASK)
sys/dev/pci/drm/radeon/r100.c
1844
track->textures[i].roundup_w = false;
sys/dev/pci/drm/radeon/r100.c
1847
track->textures[i].roundup_h = false;
sys/dev/pci/drm/radeon/r100.c
1848
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1855
track->textures[i].use_pitch = true;
sys/dev/pci/drm/radeon/r100.c
1857
track->textures[i].use_pitch = false;
sys/dev/pci/drm/radeon/r100.c
1858
track->textures[i].width = 1 << ((idx_value & RADEON_TXFORMAT_WIDTH_MASK) >> RADEON_TXFORMAT_WIDTH_SHIFT);
sys/dev/pci/drm/radeon/r100.c
1859
track->textures[i].height = 1 << ((idx_value & RADEON_TXFORMAT_HEIGHT_MASK) >> RADEON_TXFORMAT_HEIGHT_SHIFT);
sys/dev/pci/drm/radeon/r100.c
1862
track->textures[i].tex_coord_type = 2;
sys/dev/pci/drm/radeon/r100.c
1867
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r100.c
1868
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r100.c
1879
track->textures[i].cpp = 2;
sys/dev/pci/drm/radeon/r100.c
1880
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r100.c
1886
track->textures[i].cpp = 4;
sys/dev/pci/drm/radeon/r100.c
1887
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r100.c
1890
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r100.c
1891
track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
sys/dev/pci/drm/radeon/r100.c
1895
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r100.c
1896
track->textures[i].compress_format = R100_TRACK_COMP_DXT35;
sys/dev/pci/drm/radeon/r100.c
1899
track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);
sys/dev/pci/drm/radeon/r100.c
1900
track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf);
sys/dev/pci/drm/radeon/r100.c
1901
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1909
track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf);
sys/dev/pci/drm/radeon/r100.c
1910
track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf);
sys/dev/pci/drm/radeon/r100.c
1912
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
1943
struct r100_cs_track *track;
sys/dev/pci/drm/radeon/r100.c
1950
track = (struct r100_cs_track *)p->track;
sys/dev/pci/drm/radeon/r100.c
1979
track->num_arrays = 1;
sys/dev/pci/drm/radeon/r100.c
1980
track->vtx_size = r100_get_vtx_size(radeon_get_ib_value(p, idx + 2));
sys/dev/pci/drm/radeon/r100.c
1982
track->arrays[0].robj = reloc->robj;
sys/dev/pci/drm/radeon/r100.c
1983
track->arrays[0].esize = track->vtx_size;
sys/dev/pci/drm/radeon/r100.c
1985
track->max_indx = radeon_get_ib_value(p, idx+1);
sys/dev/pci/drm/radeon/r100.c
1987
track->vap_vf_cntl = radeon_get_ib_value(p, idx+3);
sys/dev/pci/drm/radeon/r100.c
1988
track->immd_dwords = pkt->count - 1;
sys/dev/pci/drm/radeon/r100.c
1989
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r100.c
1998
track->vtx_size = r100_get_vtx_size(radeon_get_ib_value(p, idx + 0));
sys/dev/pci/drm/radeon/r100.c
1999
track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);
sys/dev/pci/drm/radeon/r100.c
2000
track->immd_dwords = pkt->count - 1;
sys/dev/pci/drm/radeon/r100.c
2001
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r100.c
2011
track->vap_vf_cntl = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r100.c
2012
track->immd_dwords = pkt->count;
sys/dev/pci/drm/radeon/r100.c
2013
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r100.c
2019
track->vap_vf_cntl = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r100.c
2020
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r100.c
2026
track->vap_vf_cntl = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r100.c
2027
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r100.c
2033
track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);
sys/dev/pci/drm/radeon/r100.c
2034
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r100.c
2040
track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);
sys/dev/pci/drm/radeon/r100.c
2041
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r100.c
2063
struct r100_cs_track *track;
sys/dev/pci/drm/radeon/r100.c
2066
track = kzalloc(sizeof(*track), GFP_KERNEL);
sys/dev/pci/drm/radeon/r100.c
2067
if (!track)
sys/dev/pci/drm/radeon/r100.c
2069
r100_cs_track_clear(p->rdev, track);
sys/dev/pci/drm/radeon/r100.c
2070
p->track = track;
sys/dev/pci/drm/radeon/r100.c
2154
struct r100_cs_track *track, unsigned idx)
sys/dev/pci/drm/radeon/r100.c
2159
unsigned compress_format = track->textures[idx].compress_format;
sys/dev/pci/drm/radeon/r100.c
2162
cube_robj = track->textures[idx].cube_info[face].robj;
sys/dev/pci/drm/radeon/r100.c
2163
w = track->textures[idx].cube_info[face].width;
sys/dev/pci/drm/radeon/r100.c
2164
h = track->textures[idx].cube_info[face].height;
sys/dev/pci/drm/radeon/r100.c
2170
size *= track->textures[idx].cpp;
sys/dev/pci/drm/radeon/r100.c
2172
size += track->textures[idx].cube_info[face].offset;
sys/dev/pci/drm/radeon/r100.c
2178
r100_cs_track_texture_print(&track->textures[idx]);
sys/dev/pci/drm/radeon/r100.c
2186
struct r100_cs_track *track)
sys/dev/pci/drm/radeon/r100.c
2193
for (u = 0; u < track->num_texture; u++) {
sys/dev/pci/drm/radeon/r100.c
2194
if (!track->textures[u].enabled)
sys/dev/pci/drm/radeon/r100.c
2196
if (track->textures[u].lookup_disable)
sys/dev/pci/drm/radeon/r100.c
2198
robj = track->textures[u].robj;
sys/dev/pci/drm/radeon/r100.c
2204
for (i = 0; i <= track->textures[u].num_levels; i++) {
sys/dev/pci/drm/radeon/r100.c
2205
if (track->textures[u].use_pitch) {
sys/dev/pci/drm/radeon/r100.c
2207
w = (track->textures[u].pitch / track->textures[u].cpp) / (1 << i);
sys/dev/pci/drm/radeon/r100.c
2209
w = track->textures[u].pitch / (1 << i);
sys/dev/pci/drm/radeon/r100.c
2211
w = track->textures[u].width;
sys/dev/pci/drm/radeon/r100.c
2213
w |= track->textures[u].width_11;
sys/dev/pci/drm/radeon/r100.c
2215
if (track->textures[u].roundup_w)
sys/dev/pci/drm/radeon/r100.c
2218
h = track->textures[u].height;
sys/dev/pci/drm/radeon/r100.c
2220
h |= track->textures[u].height_11;
sys/dev/pci/drm/radeon/r100.c
2222
if (track->textures[u].roundup_h)
sys/dev/pci/drm/radeon/r100.c
2224
if (track->textures[u].tex_coord_type == 1) {
sys/dev/pci/drm/radeon/r100.c
2225
d = (1 << track->textures[u].txdepth) / (1 << i);
sys/dev/pci/drm/radeon/r100.c
2231
if (track->textures[u].compress_format) {
sys/dev/pci/drm/radeon/r100.c
2233
size += r100_track_compress_size(track->textures[u].compress_format, w, h) * d;
sys/dev/pci/drm/radeon/r100.c
2238
size *= track->textures[u].cpp;
sys/dev/pci/drm/radeon/r100.c
2240
switch (track->textures[u].tex_coord_type) {
sys/dev/pci/drm/radeon/r100.c
2245
if (track->separate_cube) {
sys/dev/pci/drm/radeon/r100.c
2246
ret = r100_cs_track_cube(rdev, track, u);
sys/dev/pci/drm/radeon/r100.c
2254
"%u\n", track->textures[u].tex_coord_type, u);
sys/dev/pci/drm/radeon/r100.c
2260
r100_cs_track_texture_print(&track->textures[u]);
sys/dev/pci/drm/radeon/r100.c
2267
int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track)
sys/dev/pci/drm/radeon/r100.c
2273
unsigned num_cb = track->cb_dirty ? track->num_cb : 0;
sys/dev/pci/drm/radeon/r100.c
2275
if (num_cb && !track->zb_cb_clear && !track->color_channel_mask &&
sys/dev/pci/drm/radeon/r100.c
2276
!track->blend_read_enable)
sys/dev/pci/drm/radeon/r100.c
2280
if (track->cb[i].robj == NULL) {
sys/dev/pci/drm/radeon/r100.c
2284
size = track->cb[i].pitch * track->cb[i].cpp * track->maxy;
sys/dev/pci/drm/radeon/r100.c
2285
size += track->cb[i].offset;
sys/dev/pci/drm/radeon/r100.c
2286
if (size > radeon_bo_size(track->cb[i].robj)) {
sys/dev/pci/drm/radeon/r100.c
2289
radeon_bo_size(track->cb[i].robj));
sys/dev/pci/drm/radeon/r100.c
2291
i, track->cb[i].pitch, track->cb[i].cpp,
sys/dev/pci/drm/radeon/r100.c
2292
track->cb[i].offset, track->maxy);
sys/dev/pci/drm/radeon/r100.c
2296
track->cb_dirty = false;
sys/dev/pci/drm/radeon/r100.c
2298
if (track->zb_dirty && track->z_enabled) {
sys/dev/pci/drm/radeon/r100.c
2299
if (track->zb.robj == NULL) {
sys/dev/pci/drm/radeon/r100.c
2303
size = track->zb.pitch * track->zb.cpp * track->maxy;
sys/dev/pci/drm/radeon/r100.c
2304
size += track->zb.offset;
sys/dev/pci/drm/radeon/r100.c
2305
if (size > radeon_bo_size(track->zb.robj)) {
sys/dev/pci/drm/radeon/r100.c
2308
radeon_bo_size(track->zb.robj));
sys/dev/pci/drm/radeon/r100.c
2310
track->zb.pitch, track->zb.cpp,
sys/dev/pci/drm/radeon/r100.c
2311
track->zb.offset, track->maxy);
sys/dev/pci/drm/radeon/r100.c
2315
track->zb_dirty = false;
sys/dev/pci/drm/radeon/r100.c
2317
if (track->aa_dirty && track->aaresolve) {
sys/dev/pci/drm/radeon/r100.c
2318
if (track->aa.robj == NULL) {
sys/dev/pci/drm/radeon/r100.c
2323
size = track->aa.pitch * track->cb[0].cpp * track->maxy;
sys/dev/pci/drm/radeon/r100.c
2324
size += track->aa.offset;
sys/dev/pci/drm/radeon/r100.c
2325
if (size > radeon_bo_size(track->aa.robj)) {
sys/dev/pci/drm/radeon/r100.c
2328
radeon_bo_size(track->aa.robj));
sys/dev/pci/drm/radeon/r100.c
2330
i, track->aa.pitch, track->cb[0].cpp,
sys/dev/pci/drm/radeon/r100.c
2331
track->aa.offset, track->maxy);
sys/dev/pci/drm/radeon/r100.c
2335
track->aa_dirty = false;
sys/dev/pci/drm/radeon/r100.c
2337
prim_walk = (track->vap_vf_cntl >> 4) & 0x3;
sys/dev/pci/drm/radeon/r100.c
2338
if (track->vap_vf_cntl & (1 << 14)) {
sys/dev/pci/drm/radeon/r100.c
2339
nverts = track->vap_alt_nverts;
sys/dev/pci/drm/radeon/r100.c
2341
nverts = (track->vap_vf_cntl >> 16) & 0xFFFF;
sys/dev/pci/drm/radeon/r100.c
2345
for (i = 0; i < track->num_arrays; i++) {
sys/dev/pci/drm/radeon/r100.c
2346
size = track->arrays[i].esize * track->max_indx * 4UL;
sys/dev/pci/drm/radeon/r100.c
2347
if (track->arrays[i].robj == NULL) {
sys/dev/pci/drm/radeon/r100.c
2352
if (size > radeon_bo_size(track->arrays[i].robj)) {
sys/dev/pci/drm/radeon/r100.c
2356
radeon_bo_size(track->arrays[i].robj)
sys/dev/pci/drm/radeon/r100.c
2358
dev_warn_once(rdev->dev, "Max indices %u\n", track->max_indx);
sys/dev/pci/drm/radeon/r100.c
2364
for (i = 0; i < track->num_arrays; i++) {
sys/dev/pci/drm/radeon/r100.c
2365
size = track->arrays[i].esize * (nverts - 1) * 4UL;
sys/dev/pci/drm/radeon/r100.c
2366
if (track->arrays[i].robj == NULL) {
sys/dev/pci/drm/radeon/r100.c
2371
if (size > radeon_bo_size(track->arrays[i].robj)) {
sys/dev/pci/drm/radeon/r100.c
2375
radeon_bo_size(track->arrays[i].robj)
sys/dev/pci/drm/radeon/r100.c
2382
size = track->vtx_size * nverts;
sys/dev/pci/drm/radeon/r100.c
2383
if (size != track->immd_dwords) {
sys/dev/pci/drm/radeon/r100.c
2385
track->immd_dwords, size);
sys/dev/pci/drm/radeon/r100.c
2387
nverts, track->vtx_size);
sys/dev/pci/drm/radeon/r100.c
2397
if (track->tex_dirty) {
sys/dev/pci/drm/radeon/r100.c
2398
track->tex_dirty = false;
sys/dev/pci/drm/radeon/r100.c
2399
return r100_cs_track_texture_check(rdev, track);
sys/dev/pci/drm/radeon/r100.c
2404
void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track)
sys/dev/pci/drm/radeon/r100.c
2408
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
2409
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r100.c
2410
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r100.c
2411
track->aa_dirty = true;
sys/dev/pci/drm/radeon/r100.c
2414
track->num_cb = 1;
sys/dev/pci/drm/radeon/r100.c
2416
track->num_texture = 3;
sys/dev/pci/drm/radeon/r100.c
2418
track->num_texture = 6;
sys/dev/pci/drm/radeon/r100.c
2419
track->maxy = 2048;
sys/dev/pci/drm/radeon/r100.c
2420
track->separate_cube = true;
sys/dev/pci/drm/radeon/r100.c
2422
track->num_cb = 4;
sys/dev/pci/drm/radeon/r100.c
2423
track->num_texture = 16;
sys/dev/pci/drm/radeon/r100.c
2424
track->maxy = 4096;
sys/dev/pci/drm/radeon/r100.c
2425
track->separate_cube = false;
sys/dev/pci/drm/radeon/r100.c
2426
track->aaresolve = false;
sys/dev/pci/drm/radeon/r100.c
2427
track->aa.robj = NULL;
sys/dev/pci/drm/radeon/r100.c
2430
for (i = 0; i < track->num_cb; i++) {
sys/dev/pci/drm/radeon/r100.c
2431
track->cb[i].robj = NULL;
sys/dev/pci/drm/radeon/r100.c
2432
track->cb[i].pitch = 8192;
sys/dev/pci/drm/radeon/r100.c
2433
track->cb[i].cpp = 16;
sys/dev/pci/drm/radeon/r100.c
2434
track->cb[i].offset = 0;
sys/dev/pci/drm/radeon/r100.c
2436
track->z_enabled = true;
sys/dev/pci/drm/radeon/r100.c
2437
track->zb.robj = NULL;
sys/dev/pci/drm/radeon/r100.c
2438
track->zb.pitch = 8192;
sys/dev/pci/drm/radeon/r100.c
2439
track->zb.cpp = 4;
sys/dev/pci/drm/radeon/r100.c
2440
track->zb.offset = 0;
sys/dev/pci/drm/radeon/r100.c
2441
track->vtx_size = 0x7F;
sys/dev/pci/drm/radeon/r100.c
2442
track->immd_dwords = 0xFFFFFFFFUL;
sys/dev/pci/drm/radeon/r100.c
2443
track->num_arrays = 11;
sys/dev/pci/drm/radeon/r100.c
2444
track->max_indx = 0x00FFFFFFUL;
sys/dev/pci/drm/radeon/r100.c
2445
for (i = 0; i < track->num_arrays; i++) {
sys/dev/pci/drm/radeon/r100.c
2446
track->arrays[i].robj = NULL;
sys/dev/pci/drm/radeon/r100.c
2447
track->arrays[i].esize = 0x7F;
sys/dev/pci/drm/radeon/r100.c
2449
for (i = 0; i < track->num_texture; i++) {
sys/dev/pci/drm/radeon/r100.c
2450
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r100.c
2451
track->textures[i].pitch = 16536;
sys/dev/pci/drm/radeon/r100.c
2452
track->textures[i].width = 16536;
sys/dev/pci/drm/radeon/r100.c
2453
track->textures[i].height = 16536;
sys/dev/pci/drm/radeon/r100.c
2454
track->textures[i].width_11 = 1 << 11;
sys/dev/pci/drm/radeon/r100.c
2455
track->textures[i].height_11 = 1 << 11;
sys/dev/pci/drm/radeon/r100.c
2456
track->textures[i].num_levels = 12;
sys/dev/pci/drm/radeon/r100.c
2458
track->textures[i].tex_coord_type = 0;
sys/dev/pci/drm/radeon/r100.c
2459
track->textures[i].txdepth = 0;
sys/dev/pci/drm/radeon/r100.c
2461
track->textures[i].txdepth = 16;
sys/dev/pci/drm/radeon/r100.c
2462
track->textures[i].tex_coord_type = 1;
sys/dev/pci/drm/radeon/r100.c
2464
track->textures[i].cpp = 64;
sys/dev/pci/drm/radeon/r100.c
2465
track->textures[i].robj = NULL;
sys/dev/pci/drm/radeon/r100.c
2467
track->textures[i].enabled = false;
sys/dev/pci/drm/radeon/r100.c
2468
track->textures[i].lookup_disable = false;
sys/dev/pci/drm/radeon/r100.c
2469
track->textures[i].roundup_w = true;
sys/dev/pci/drm/radeon/r100.c
2470
track->textures[i].roundup_h = true;
sys/dev/pci/drm/radeon/r100.c
2471
if (track->separate_cube)
sys/dev/pci/drm/radeon/r100.c
2473
track->textures[i].cube_info[face].robj = NULL;
sys/dev/pci/drm/radeon/r100.c
2474
track->textures[i].cube_info[face].width = 16536;
sys/dev/pci/drm/radeon/r100.c
2475
track->textures[i].cube_info[face].height = 16536;
sys/dev/pci/drm/radeon/r100.c
2476
track->textures[i].cube_info[face].offset = 0;
sys/dev/pci/drm/radeon/r100_track.h
85
int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);
sys/dev/pci/drm/radeon/r100_track.h
86
void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track);
sys/dev/pci/drm/radeon/r200.c
150
struct r100_cs_track *track;
sys/dev/pci/drm/radeon/r200.c
160
track = (struct r100_cs_track *)p->track;
sys/dev/pci/drm/radeon/r200.c
188
track->zb.robj = reloc->robj;
sys/dev/pci/drm/radeon/r200.c
189
track->zb.offset = idx_value;
sys/dev/pci/drm/radeon/r200.c
190
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
201
track->cb[0].robj = reloc->robj;
sys/dev/pci/drm/radeon/r200.c
202
track->cb[0].offset = idx_value;
sys/dev/pci/drm/radeon/r200.c
203
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
231
track->textures[i].robj = reloc->robj;
sys/dev/pci/drm/radeon/r200.c
232
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r200.c
273
track->textures[i].cube_info[face - 1].offset = idx_value;
sys/dev/pci/drm/radeon/r200.c
275
track->textures[i].cube_info[face - 1].robj = reloc->robj;
sys/dev/pci/drm/radeon/r200.c
276
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r200.c
279
track->maxy = ((idx_value >> 16) & 0x7FF);
sys/dev/pci/drm/radeon/r200.c
280
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
281
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
304
track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK;
sys/dev/pci/drm/radeon/r200.c
305
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
308
track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK;
sys/dev/pci/drm/radeon/r200.c
309
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
318
track->cb[0].cpp = 1;
sys/dev/pci/drm/radeon/r200.c
323
track->cb[0].cpp = 2;
sys/dev/pci/drm/radeon/r200.c
326
track->cb[0].cpp = 4;
sys/dev/pci/drm/radeon/r200.c
338
track->z_enabled = !!(idx_value & RADEON_Z_ENABLE);
sys/dev/pci/drm/radeon/r200.c
339
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
340
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
345
track->zb.cpp = 2;
sys/dev/pci/drm/radeon/r200.c
353
track->zb.cpp = 4;
sys/dev/pci/drm/radeon/r200.c
358
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r200.c
373
for (i = 0; i < track->num_texture; i++)
sys/dev/pci/drm/radeon/r200.c
374
track->textures[i].enabled = !!(temp & (1 << i));
sys/dev/pci/drm/radeon/r200.c
375
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r200.c
379
track->vap_vf_cntl = idx_value;
sys/dev/pci/drm/radeon/r200.c
383
track->max_indx = idx_value & 0x00FFFFFFUL;
sys/dev/pci/drm/radeon/r200.c
386
track->vtx_size = r200_get_vtx_size_0(idx_value);
sys/dev/pci/drm/radeon/r200.c
389
track->vtx_size += r200_get_vtx_size_1(idx_value);
sys/dev/pci/drm/radeon/r200.c
398
track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1;
sys/dev/pci/drm/radeon/r200.c
399
track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1;
sys/dev/pci/drm/radeon/r200.c
400
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r200.c
409
track->textures[i].pitch = idx_value + 32;
sys/dev/pci/drm/radeon/r200.c
410
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r200.c
419
track->textures[i].num_levels = ((idx_value & R200_MAX_MIP_LEVEL_MASK)
sys/dev/pci/drm/radeon/r200.c
423
track->textures[i].roundup_w = false;
sys/dev/pci/drm/radeon/r200.c
426
track->textures[i].roundup_h = false;
sys/dev/pci/drm/radeon/r200.c
427
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r200.c
444
track->textures[i].txdepth = idx_value & 0x7;
sys/dev/pci/drm/radeon/r200.c
455
track->textures[i].tex_coord_type = 0;
sys/dev/pci/drm/radeon/r200.c
459
track->textures[i].tex_coord_type = 2;
sys/dev/pci/drm/radeon/r200.c
463
track->textures[i].tex_coord_type = 1;
sys/dev/pci/drm/radeon/r200.c
466
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r200.c
476
track->textures[i].use_pitch = 1;
sys/dev/pci/drm/radeon/r200.c
478
track->textures[i].use_pitch = 0;
sys/dev/pci/drm/radeon/r200.c
479
track->textures[i].width = 1 << ((idx_value & RADEON_TXFORMAT_WIDTH_MASK) >> RADEON_TXFORMAT_WIDTH_SHIFT);
sys/dev/pci/drm/radeon/r200.c
480
track->textures[i].height = 1 << ((idx_value & RADEON_TXFORMAT_HEIGHT_MASK) >> RADEON_TXFORMAT_HEIGHT_SHIFT);
sys/dev/pci/drm/radeon/r200.c
483
track->textures[i].lookup_disable = true;
sys/dev/pci/drm/radeon/r200.c
488
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r200.c
489
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r200.c
500
track->textures[i].cpp = 2;
sys/dev/pci/drm/radeon/r200.c
501
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r200.c
508
track->textures[i].cpp = 4;
sys/dev/pci/drm/radeon/r200.c
509
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r200.c
512
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r200.c
513
track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
sys/dev/pci/drm/radeon/r200.c
517
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r200.c
518
track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
sys/dev/pci/drm/radeon/r200.c
521
track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);
sys/dev/pci/drm/radeon/r200.c
522
track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf);
sys/dev/pci/drm/radeon/r200.c
523
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r200.c
534
track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf);
sys/dev/pci/drm/radeon/r200.c
535
track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf);
sys/dev/pci/drm/radeon/r200.c
537
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1003
track->textures[i].roundup_w = false;
sys/dev/pci/drm/radeon/r300.c
1007
track->textures[i].roundup_h = false;
sys/dev/pci/drm/radeon/r300.c
1009
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1030
track->textures[i].pitch = tmp + 1;
sys/dev/pci/drm/radeon/r300.c
1033
track->textures[i].width_11 = tmp;
sys/dev/pci/drm/radeon/r300.c
1035
track->textures[i].height_11 = tmp;
sys/dev/pci/drm/radeon/r300.c
1040
track->textures[i].compress_format =
sys/dev/pci/drm/radeon/r300.c
1047
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1068
track->textures[i].width = tmp + 1;
sys/dev/pci/drm/radeon/r300.c
1070
track->textures[i].height = tmp + 1;
sys/dev/pci/drm/radeon/r300.c
1072
track->textures[i].num_levels = tmp;
sys/dev/pci/drm/radeon/r300.c
1074
track->textures[i].use_pitch = !!tmp;
sys/dev/pci/drm/radeon/r300.c
1076
track->textures[i].txdepth = tmp;
sys/dev/pci/drm/radeon/r300.c
1077
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1091
track->color_channel_mask = idx_value;
sys/dev/pci/drm/radeon/r300.c
1092
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1105
track->zb_cb_clear = !!(idx_value & (1 << 5));
sys/dev/pci/drm/radeon/r300.c
1106
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1107
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1118
track->blend_read_enable = !!(idx_value & (1 << 2));
sys/dev/pci/drm/radeon/r300.c
1119
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1129
track->aa.robj = reloc->robj;
sys/dev/pci/drm/radeon/r300.c
1130
track->aa.offset = idx_value;
sys/dev/pci/drm/radeon/r300.c
1131
track->aa_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1135
track->aa.pitch = idx_value & 0x3FFE;
sys/dev/pci/drm/radeon/r300.c
1136
track->aa_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1139
track->aaresolve = idx_value & 0x1;
sys/dev/pci/drm/radeon/r300.c
1140
track->aa_dirty = true;
sys/dev/pci/drm/radeon/r300.c
1177
struct r100_cs_track *track;
sys/dev/pci/drm/radeon/r300.c
1184
track = (struct r100_cs_track *)p->track;
sys/dev/pci/drm/radeon/r300.c
1213
track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);
sys/dev/pci/drm/radeon/r300.c
1214
track->immd_dwords = pkt->count - 1;
sys/dev/pci/drm/radeon/r300.c
1215
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r300.c
1228
track->vap_vf_cntl = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r300.c
1229
track->immd_dwords = pkt->count;
sys/dev/pci/drm/radeon/r300.c
1230
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r300.c
1236
track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);
sys/dev/pci/drm/radeon/r300.c
1237
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r300.c
1243
track->vap_vf_cntl = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r300.c
1244
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r300.c
1250
track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);
sys/dev/pci/drm/radeon/r300.c
1251
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r300.c
1257
track->vap_vf_cntl = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r300.c
1258
r = r100_cs_track_check(p->rdev, track);
sys/dev/pci/drm/radeon/r300.c
1284
struct r100_cs_track *track;
sys/dev/pci/drm/radeon/r300.c
1287
track = kzalloc(sizeof(*track), GFP_KERNEL);
sys/dev/pci/drm/radeon/r300.c
1288
if (track == NULL)
sys/dev/pci/drm/radeon/r300.c
1290
r100_cs_track_clear(p->rdev, track);
sys/dev/pci/drm/radeon/r300.c
1291
p->track = track;
sys/dev/pci/drm/radeon/r300.c
632
struct r100_cs_track *track;
sys/dev/pci/drm/radeon/r300.c
640
track = (struct r100_cs_track *)p->track;
sys/dev/pci/drm/radeon/r300.c
672
track->cb[i].robj = reloc->robj;
sys/dev/pci/drm/radeon/r300.c
673
track->cb[i].offset = idx_value;
sys/dev/pci/drm/radeon/r300.c
674
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
685
track->zb.robj = reloc->robj;
sys/dev/pci/drm/radeon/r300.c
686
track->zb.offset = idx_value;
sys/dev/pci/drm/radeon/r300.c
687
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
730
track->textures[i].robj = reloc->robj;
sys/dev/pci/drm/radeon/r300.c
731
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r300.c
736
track->vap_vf_cntl = idx_value;
sys/dev/pci/drm/radeon/r300.c
740
track->vtx_size = idx_value & 0x7F;
sys/dev/pci/drm/radeon/r300.c
744
track->max_indx = idx_value & 0x00FFFFFFUL;
sys/dev/pci/drm/radeon/r300.c
750
track->vap_alt_nverts = idx_value & 0xFFFFFF;
sys/dev/pci/drm/radeon/r300.c
754
track->maxy = ((idx_value >> 13) & 0x1FFF) + 1;
sys/dev/pci/drm/radeon/r300.c
756
track->maxy -= 1440;
sys/dev/pci/drm/radeon/r300.c
758
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
759
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
768
track->num_cb = ((idx_value >> 5) & 0x3) + 1;
sys/dev/pci/drm/radeon/r300.c
769
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
800
track->cb[i].pitch = idx_value & 0x3FFE;
sys/dev/pci/drm/radeon/r300.c
805
track->cb[i].cpp = 1;
sys/dev/pci/drm/radeon/r300.c
811
track->cb[i].cpp = 2;
sys/dev/pci/drm/radeon/r300.c
821
track->cb[i].cpp = 4;
sys/dev/pci/drm/radeon/r300.c
824
track->cb[i].cpp = 8;
sys/dev/pci/drm/radeon/r300.c
827
track->cb[i].cpp = 16;
sys/dev/pci/drm/radeon/r300.c
834
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
839
track->z_enabled = true;
sys/dev/pci/drm/radeon/r300.c
841
track->z_enabled = false;
sys/dev/pci/drm/radeon/r300.c
843
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
850
track->zb.cpp = 2;
sys/dev/pci/drm/radeon/r300.c
853
track->zb.cpp = 4;
sys/dev/pci/drm/radeon/r300.c
860
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
884
track->zb.pitch = idx_value & 0x3FFC;
sys/dev/pci/drm/radeon/r300.c
885
track->zb_dirty = true;
sys/dev/pci/drm/radeon/r300.c
893
track->textures[i].enabled = enabled;
sys/dev/pci/drm/radeon/r300.c
895
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r300.c
916
track->textures[i].tex_coord_type = tmp;
sys/dev/pci/drm/radeon/r300.c
921
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r300.c
922
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r300.c
934
track->textures[i].cpp = 2;
sys/dev/pci/drm/radeon/r300.c
935
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r300.c
946
track->textures[i].cpp = 4;
sys/dev/pci/drm/radeon/r300.c
947
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r300.c
952
track->textures[i].cpp = 8;
sys/dev/pci/drm/radeon/r300.c
953
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r300.c
956
track->textures[i].cpp = 16;
sys/dev/pci/drm/radeon/r300.c
957
track->textures[i].compress_format = R100_TRACK_COMP_NONE;
sys/dev/pci/drm/radeon/r300.c
960
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r300.c
961
track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
sys/dev/pci/drm/radeon/r300.c
973
track->textures[i].cpp = 1;
sys/dev/pci/drm/radeon/r300.c
974
track->textures[i].compress_format = R100_TRACK_COMP_DXT35;
sys/dev/pci/drm/radeon/r300.c
981
track->tex_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1028
track->sq_config = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1031
track->db_depth_control = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1032
track->db_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1043
track->db_depth_info = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1045
track->db_depth_info &= C_028010_ARRAY_MODE;
sys/dev/pci/drm/radeon/r600_cs.c
1048
track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_2D_TILED_THIN1);
sys/dev/pci/drm/radeon/r600_cs.c
1051
track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_1D_TILED_THIN1);
sys/dev/pci/drm/radeon/r600_cs.c
1054
track->db_depth_info = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1056
track->db_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1059
track->db_depth_view = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1060
track->db_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1063
track->db_depth_size = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1064
track->db_depth_size_idx = idx;
sys/dev/pci/drm/radeon/r600_cs.c
1065
track->db_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1068
track->vgt_strmout_en = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1069
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1072
track->vgt_strmout_buffer_en = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1073
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1086
track->vgt_strmout_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8;
sys/dev/pci/drm/radeon/r600_cs.c
1088
track->vgt_strmout_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/r600_cs.c
1089
track->vgt_strmout_bo_mc[tmp] = reloc->gpu_offset;
sys/dev/pci/drm/radeon/r600_cs.c
1090
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1098
track->vgt_strmout_size[tmp] = radeon_get_ib_value(p, idx) * 4;
sys/dev/pci/drm/radeon/r600_cs.c
1099
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1111
track->cb_target_mask = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1112
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1115
track->cb_shader_mask = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1119
track->log_nsamples = tmp;
sys/dev/pci/drm/radeon/r600_cs.c
1120
track->nsamples = 1 << tmp;
sys/dev/pci/drm/radeon/r600_cs.c
1121
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1125
track->is_resolve = tmp == V_028808_SPECIAL_RESOLVE_BOX;
sys/dev/pci/drm/radeon/r600_cs.c
1126
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1144
track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1147
track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_2D_TILED_THIN1);
sys/dev/pci/drm/radeon/r600_cs.c
1150
track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_1D_TILED_THIN1);
sys/dev/pci/drm/radeon/r600_cs.c
1154
track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1156
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1167
track->cb_color_view[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1168
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1179
track->cb_color_size[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1180
track->cb_color_size_idx[tmp] = idx;
sys/dev/pci/drm/radeon/r600_cs.c
1181
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1202
if (!track->cb_color_base_last[tmp]) {
sys/dev/pci/drm/radeon/r600_cs.c
1206
track->cb_color_frag_bo[tmp] = track->cb_color_bo[tmp];
sys/dev/pci/drm/radeon/r600_cs.c
1207
track->cb_color_frag_offset[tmp] = track->cb_color_bo_offset[tmp];
sys/dev/pci/drm/radeon/r600_cs.c
1208
ib[idx] = track->cb_color_base_last[tmp];
sys/dev/pci/drm/radeon/r600_cs.c
1215
track->cb_color_frag_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/r600_cs.c
1216
track->cb_color_frag_offset[tmp] = (u64)ib[idx] << 8;
sys/dev/pci/drm/radeon/r600_cs.c
1219
if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) {
sys/dev/pci/drm/radeon/r600_cs.c
1220
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1233
if (!track->cb_color_base_last[tmp]) {
sys/dev/pci/drm/radeon/r600_cs.c
1237
track->cb_color_tile_bo[tmp] = track->cb_color_bo[tmp];
sys/dev/pci/drm/radeon/r600_cs.c
1238
track->cb_color_tile_offset[tmp] = track->cb_color_bo_offset[tmp];
sys/dev/pci/drm/radeon/r600_cs.c
1239
ib[idx] = track->cb_color_base_last[tmp];
sys/dev/pci/drm/radeon/r600_cs.c
1246
track->cb_color_tile_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/r600_cs.c
1247
track->cb_color_tile_offset[tmp] = (u64)ib[idx] << 8;
sys/dev/pci/drm/radeon/r600_cs.c
1250
if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) {
sys/dev/pci/drm/radeon/r600_cs.c
1251
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1263
track->cb_color_mask[tmp] = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1264
if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) {
sys/dev/pci/drm/radeon/r600_cs.c
1265
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1283
track->cb_color_bo_offset[tmp] = (u64)radeon_get_ib_value(p, idx) << 8;
sys/dev/pci/drm/radeon/r600_cs.c
1285
track->cb_color_base_last[tmp] = ib[idx];
sys/dev/pci/drm/radeon/r600_cs.c
1286
track->cb_color_bo[tmp] = reloc->robj;
sys/dev/pci/drm/radeon/r600_cs.c
1287
track->cb_color_bo_mc[tmp] = reloc->gpu_offset;
sys/dev/pci/drm/radeon/r600_cs.c
1288
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1297
track->db_offset = radeon_get_ib_value(p, idx) << 8;
sys/dev/pci/drm/radeon/r600_cs.c
1299
track->db_bo = reloc->robj;
sys/dev/pci/drm/radeon/r600_cs.c
1300
track->db_bo_mc = reloc->gpu_offset;
sys/dev/pci/drm/radeon/r600_cs.c
1301
track->db_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1310
track->htile_offset = (u64)radeon_get_ib_value(p, idx) << 8;
sys/dev/pci/drm/radeon/r600_cs.c
1312
track->htile_bo = reloc->robj;
sys/dev/pci/drm/radeon/r600_cs.c
1313
track->db_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1316
track->htile_surface = radeon_get_ib_value(p, idx);
sys/dev/pci/drm/radeon/r600_cs.c
1319
track->db_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
1392
track->sx_misc_kill_all_prims = (radeon_get_ib_value(p, idx) & 0x1) != 0;
sys/dev/pci/drm/radeon/r600_cs.c
1481
struct r600_cs_track *track = p->track;
sys/dev/pci/drm/radeon/r600_cs.c
1521
array_check.group_size = track->group_size;
sys/dev/pci/drm/radeon/r600_cs.c
1522
array_check.nbanks = track->nbanks;
sys/dev/pci/drm/radeon/r600_cs.c
1523
array_check.npipes = track->npipes;
sys/dev/pci/drm/radeon/r600_cs.c
1635
struct r600_cs_track *track;
sys/dev/pci/drm/radeon/r600_cs.c
1643
track = (struct r600_cs_track *)p->track;
sys/dev/pci/drm/radeon/r600_cs.c
2029
if (track->sq_config & DX9_CONSTS) {
sys/dev/pci/drm/radeon/r600_cs.c
2107
if (reloc->robj != track->vgt_strmout_bo[idx_value]) {
sys/dev/pci/drm/radeon/r600_cs.c
2113
if (offset != track->vgt_strmout_bo_offset[idx_value]) {
sys/dev/pci/drm/radeon/r600_cs.c
2116
offset, track->vgt_strmout_bo_offset[idx_value]);
sys/dev/pci/drm/radeon/r600_cs.c
2280
struct r600_cs_track *track;
sys/dev/pci/drm/radeon/r600_cs.c
2283
if (p->track == NULL) {
sys/dev/pci/drm/radeon/r600_cs.c
2285
track = kzalloc(sizeof(*track), GFP_KERNEL);
sys/dev/pci/drm/radeon/r600_cs.c
2286
if (track == NULL)
sys/dev/pci/drm/radeon/r600_cs.c
2288
r600_cs_track_init(track);
sys/dev/pci/drm/radeon/r600_cs.c
2290
track->npipes = p->rdev->config.r600.tiling_npipes;
sys/dev/pci/drm/radeon/r600_cs.c
2291
track->nbanks = p->rdev->config.r600.tiling_nbanks;
sys/dev/pci/drm/radeon/r600_cs.c
2292
track->group_size = p->rdev->config.r600.tiling_group_size;
sys/dev/pci/drm/radeon/r600_cs.c
2294
track->npipes = p->rdev->config.rv770.tiling_npipes;
sys/dev/pci/drm/radeon/r600_cs.c
2295
track->nbanks = p->rdev->config.rv770.tiling_nbanks;
sys/dev/pci/drm/radeon/r600_cs.c
2296
track->group_size = p->rdev->config.rv770.tiling_group_size;
sys/dev/pci/drm/radeon/r600_cs.c
2298
p->track = track;
sys/dev/pci/drm/radeon/r600_cs.c
2303
kfree(p->track);
sys/dev/pci/drm/radeon/r600_cs.c
2304
p->track = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
2319
kfree(p->track);
sys/dev/pci/drm/radeon/r600_cs.c
2320
p->track = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
2324
kfree(p->track);
sys/dev/pci/drm/radeon/r600_cs.c
2325
p->track = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
2335
kfree(p->track);
sys/dev/pci/drm/radeon/r600_cs.c
2336
p->track = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
299
static void r600_cs_track_init(struct r600_cs_track *track)
sys/dev/pci/drm/radeon/r600_cs.c
304
track->sq_config = DX9_CONSTS;
sys/dev/pci/drm/radeon/r600_cs.c
306
track->cb_color_base_last[i] = 0;
sys/dev/pci/drm/radeon/r600_cs.c
307
track->cb_color_size[i] = 0;
sys/dev/pci/drm/radeon/r600_cs.c
308
track->cb_color_size_idx[i] = 0;
sys/dev/pci/drm/radeon/r600_cs.c
309
track->cb_color_info[i] = 0;
sys/dev/pci/drm/radeon/r600_cs.c
310
track->cb_color_view[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
311
track->cb_color_bo[i] = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
312
track->cb_color_bo_offset[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
313
track->cb_color_bo_mc[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
314
track->cb_color_frag_bo[i] = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
315
track->cb_color_frag_offset[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
316
track->cb_color_tile_bo[i] = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
317
track->cb_color_tile_offset[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
318
track->cb_color_mask[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
320
track->is_resolve = false;
sys/dev/pci/drm/radeon/r600_cs.c
321
track->nsamples = 16;
sys/dev/pci/drm/radeon/r600_cs.c
322
track->log_nsamples = 4;
sys/dev/pci/drm/radeon/r600_cs.c
323
track->cb_target_mask = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
324
track->cb_shader_mask = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
325
track->cb_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
326
track->db_bo = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
327
track->db_bo_mc = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
329
track->db_depth_info = 7 | (1 << 25);
sys/dev/pci/drm/radeon/r600_cs.c
330
track->db_depth_view = 0xFFFFC000;
sys/dev/pci/drm/radeon/r600_cs.c
331
track->db_depth_size = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
332
track->db_depth_size_idx = 0;
sys/dev/pci/drm/radeon/r600_cs.c
333
track->db_depth_control = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
334
track->db_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
335
track->htile_bo = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
336
track->htile_offset = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
337
track->htile_surface = 0;
sys/dev/pci/drm/radeon/r600_cs.c
340
track->vgt_strmout_size[i] = 0;
sys/dev/pci/drm/radeon/r600_cs.c
341
track->vgt_strmout_bo[i] = NULL;
sys/dev/pci/drm/radeon/r600_cs.c
342
track->vgt_strmout_bo_offset[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
343
track->vgt_strmout_bo_mc[i] = 0xFFFFFFFF;
sys/dev/pci/drm/radeon/r600_cs.c
345
track->streamout_dirty = true;
sys/dev/pci/drm/radeon/r600_cs.c
346
track->sx_misc_kill_all_prims = false;
sys/dev/pci/drm/radeon/r600_cs.c
351
struct r600_cs_track *track = p->track;
sys/dev/pci/drm/radeon/r600_cs.c
360
unsigned nsamples = track->is_resolve && i == 1 ? 1 : track->nsamples;
sys/dev/pci/drm/radeon/r600_cs.c
362
format = G_0280A0_FORMAT(track->cb_color_info[i]);
sys/dev/pci/drm/radeon/r600_cs.c
366
i, track->cb_color_info[i]);
sys/dev/pci/drm/radeon/r600_cs.c
370
pitch = (G_028060_PITCH_TILE_MAX(track->cb_color_size[i]) + 1) * 8;
sys/dev/pci/drm/radeon/r600_cs.c
371
slice_tile_max = G_028060_SLICE_TILE_MAX(track->cb_color_size[i]) + 1;
sys/dev/pci/drm/radeon/r600_cs.c
376
array_mode = G_0280A0_ARRAY_MODE(track->cb_color_info[i]);
sys/dev/pci/drm/radeon/r600_cs.c
378
base_offset = track->cb_color_bo_mc[i] + track->cb_color_bo_offset[i];
sys/dev/pci/drm/radeon/r600_cs.c
380
array_check.group_size = track->group_size;
sys/dev/pci/drm/radeon/r600_cs.c
381
array_check.nbanks = track->nbanks;
sys/dev/pci/drm/radeon/r600_cs.c
382
array_check.npipes = track->npipes;
sys/dev/pci/drm/radeon/r600_cs.c
388
G_0280A0_ARRAY_MODE(track->cb_color_info[i]), i,
sys/dev/pci/drm/radeon/r600_cs.c
389
track->cb_color_info[i]);
sys/dev/pci/drm/radeon/r600_cs.c
406
G_0280A0_ARRAY_MODE(track->cb_color_info[i]), i,
sys/dev/pci/drm/radeon/r600_cs.c
407
track->cb_color_info[i]);
sys/dev/pci/drm/radeon/r600_cs.c
435
tmp += track->cb_color_view[i] & 0xFF;
sys/dev/pci/drm/radeon/r600_cs.c
439
tmp += G_028080_SLICE_MAX(track->cb_color_view[i]) * tmp;
sys/dev/pci/drm/radeon/r600_cs.c
442
if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) {
sys/dev/pci/drm/radeon/r600_cs.c
454
track->cb_color_bo_offset[i], tmp,
sys/dev/pci/drm/radeon/r600_cs.c
455
radeon_bo_size(track->cb_color_bo[i]),
sys/dev/pci/drm/radeon/r600_cs.c
468
ib[track->cb_color_size_idx[i]] = tmp;
sys/dev/pci/drm/radeon/r600_cs.c
471
switch (G_0280A0_TILE_MODE(track->cb_color_info[i])) {
sys/dev/pci/drm/radeon/r600_cs.c
475
if (track->nsamples > 1) {
sys/dev/pci/drm/radeon/r600_cs.c
476
uint32_t tile_max = G_028100_FMASK_TILE_MAX(track->cb_color_mask[i]);
sys/dev/pci/drm/radeon/r600_cs.c
479
uint32_t bytes = track->nsamples * track->log_nsamples * 8 * (tile_max + 1);
sys/dev/pci/drm/radeon/r600_cs.c
481
if (bytes + track->cb_color_frag_offset[i] >
sys/dev/pci/drm/radeon/r600_cs.c
482
radeon_bo_size(track->cb_color_frag_bo[i])) {
sys/dev/pci/drm/radeon/r600_cs.c
486
track->cb_color_frag_offset[i],
sys/dev/pci/drm/radeon/r600_cs.c
487
radeon_bo_size(track->cb_color_frag_bo[i]));
sys/dev/pci/drm/radeon/r600_cs.c
494
uint32_t block_max = G_028100_CMASK_BLOCK_MAX(track->cb_color_mask[i]);
sys/dev/pci/drm/radeon/r600_cs.c
499
if (bytes + track->cb_color_tile_offset[i] >
sys/dev/pci/drm/radeon/r600_cs.c
500
radeon_bo_size(track->cb_color_tile_bo[i])) {
sys/dev/pci/drm/radeon/r600_cs.c
504
track->cb_color_tile_offset[i],
sys/dev/pci/drm/radeon/r600_cs.c
505
radeon_bo_size(track->cb_color_tile_bo[i]));
sys/dev/pci/drm/radeon/r600_cs.c
519
struct r600_cs_track *track = p->track;
sys/dev/pci/drm/radeon/r600_cs.c
530
if (track->db_bo == NULL) {
sys/dev/pci/drm/radeon/r600_cs.c
534
switch (G_028010_FORMAT(track->db_depth_info)) {
sys/dev/pci/drm/radeon/r600_cs.c
551
G_028010_FORMAT(track->db_depth_info));
sys/dev/pci/drm/radeon/r600_cs.c
554
if ((track->db_depth_size & 0xFFFFFC00) == 0xFFFFFC00) {
sys/dev/pci/drm/radeon/r600_cs.c
555
if (!track->db_depth_size_idx) {
sys/dev/pci/drm/radeon/r600_cs.c
559
tmp = radeon_bo_size(track->db_bo) - track->db_offset;
sys/dev/pci/drm/radeon/r600_cs.c
563
track->db_depth_size, bpe, track->db_offset,
sys/dev/pci/drm/radeon/r600_cs.c
564
radeon_bo_size(track->db_bo));
sys/dev/pci/drm/radeon/r600_cs.c
567
ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF);
sys/dev/pci/drm/radeon/r600_cs.c
570
pitch = (G_028000_PITCH_TILE_MAX(track->db_depth_size) + 1) * 8;
sys/dev/pci/drm/radeon/r600_cs.c
571
slice_tile_max = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1;
sys/dev/pci/drm/radeon/r600_cs.c
576
base_offset = track->db_bo_mc + track->db_offset;
sys/dev/pci/drm/radeon/r600_cs.c
577
array_mode = G_028010_ARRAY_MODE(track->db_depth_info);
sys/dev/pci/drm/radeon/r600_cs.c
579
array_check.group_size = track->group_size;
sys/dev/pci/drm/radeon/r600_cs.c
580
array_check.nbanks = track->nbanks;
sys/dev/pci/drm/radeon/r600_cs.c
581
array_check.npipes = track->npipes;
sys/dev/pci/drm/radeon/r600_cs.c
582
array_check.nsamples = track->nsamples;
sys/dev/pci/drm/radeon/r600_cs.c
587
G_028010_ARRAY_MODE(track->db_depth_info),
sys/dev/pci/drm/radeon/r600_cs.c
588
track->db_depth_info);
sys/dev/pci/drm/radeon/r600_cs.c
600
G_028010_ARRAY_MODE(track->db_depth_info),
sys/dev/pci/drm/radeon/r600_cs.c
601
track->db_depth_info);
sys/dev/pci/drm/radeon/r600_cs.c
621
ntiles = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1;
sys/dev/pci/drm/radeon/r600_cs.c
622
nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1;
sys/dev/pci/drm/radeon/r600_cs.c
623
tmp = ntiles * bpe * 64 * nviews * track->nsamples;
sys/dev/pci/drm/radeon/r600_cs.c
624
if ((tmp + track->db_offset) > radeon_bo_size(track->db_bo)) {
sys/dev/pci/drm/radeon/r600_cs.c
628
track->db_depth_size, ntiles, nviews, bpe, tmp + track->db_offset,
sys/dev/pci/drm/radeon/r600_cs.c
629
radeon_bo_size(track->db_bo));
sys/dev/pci/drm/radeon/r600_cs.c
635
if (G_028010_TILE_SURFACE_ENABLE(track->db_depth_info)) {
sys/dev/pci/drm/radeon/r600_cs.c
639
if (track->htile_bo == NULL) {
sys/dev/pci/drm/radeon/r600_cs.c
641
__func__, __LINE__, track->db_depth_info);
sys/dev/pci/drm/radeon/r600_cs.c
644
if ((track->db_depth_size & 0xFFFFFC00) == 0xFFFFFC00) {
sys/dev/pci/drm/radeon/r600_cs.c
646
__func__, __LINE__, track->db_depth_size);
sys/dev/pci/drm/radeon/r600_cs.c
652
if (G_028D24_LINEAR(track->htile_surface)) {
sys/dev/pci/drm/radeon/r600_cs.c
656
nby = round_up(nby, track->npipes * 8);
sys/dev/pci/drm/radeon/r600_cs.c
662
switch (track->npipes) {
sys/dev/pci/drm/radeon/r600_cs.c
685
__func__, __LINE__, track->npipes);
sys/dev/pci/drm/radeon/r600_cs.c
693
size = roundup(nbx * nby * 4, track->npipes * (2 << 10));
sys/dev/pci/drm/radeon/r600_cs.c
694
size += track->htile_offset;
sys/dev/pci/drm/radeon/r600_cs.c
696
if (size > radeon_bo_size(track->htile_bo)) {
sys/dev/pci/drm/radeon/r600_cs.c
698
__func__, __LINE__, radeon_bo_size(track->htile_bo),
sys/dev/pci/drm/radeon/r600_cs.c
704
track->db_dirty = false;
sys/dev/pci/drm/radeon/r600_cs.c
710
struct r600_cs_track *track = p->track;
sys/dev/pci/drm/radeon/r600_cs.c
719
if (track->streamout_dirty && track->vgt_strmout_en) {
sys/dev/pci/drm/radeon/r600_cs.c
721
if (track->vgt_strmout_buffer_en & (1 << i)) {
sys/dev/pci/drm/radeon/r600_cs.c
722
if (track->vgt_strmout_bo[i]) {
sys/dev/pci/drm/radeon/r600_cs.c
723
u64 offset = (u64)track->vgt_strmout_bo_offset[i] +
sys/dev/pci/drm/radeon/r600_cs.c
724
(u64)track->vgt_strmout_size[i];
sys/dev/pci/drm/radeon/r600_cs.c
725
if (offset > radeon_bo_size(track->vgt_strmout_bo[i])) {
sys/dev/pci/drm/radeon/r600_cs.c
728
radeon_bo_size(track->vgt_strmout_bo[i]));
sys/dev/pci/drm/radeon/r600_cs.c
737
track->streamout_dirty = false;
sys/dev/pci/drm/radeon/r600_cs.c
740
if (track->sx_misc_kill_all_prims)
sys/dev/pci/drm/radeon/r600_cs.c
746
if (track->cb_dirty) {
sys/dev/pci/drm/radeon/r600_cs.c
747
tmp = track->cb_target_mask;
sys/dev/pci/drm/radeon/r600_cs.c
750
if (track->is_resolve) {
sys/dev/pci/drm/radeon/r600_cs.c
755
u32 format = G_0280A0_FORMAT(track->cb_color_info[i]);
sys/dev/pci/drm/radeon/r600_cs.c
760
if (track->cb_color_bo[i] == NULL) {
sys/dev/pci/drm/radeon/r600_cs.c
762
__func__, __LINE__, track->cb_target_mask, track->cb_shader_mask, i);
sys/dev/pci/drm/radeon/r600_cs.c
771
track->cb_dirty = false;
sys/dev/pci/drm/radeon/r600_cs.c
775
if (track->db_dirty &&
sys/dev/pci/drm/radeon/r600_cs.c
776
G_028010_FORMAT(track->db_depth_info) != V_028010_DEPTH_INVALID &&
sys/dev/pci/drm/radeon/r600_cs.c
777
(G_028800_STENCIL_ENABLE(track->db_depth_control) ||
sys/dev/pci/drm/radeon/r600_cs.c
778
G_028800_Z_ENABLE(track->db_depth_control))) {
sys/dev/pci/drm/radeon/r600_cs.c
973
struct r600_cs_track *track = (struct r600_cs_track *)p->track;
sys/dev/pci/drm/radeon/radeon.h
1052
void *track;
sys/dev/pci/drm/radeon/radeon_cs.c
458
kfree(parser->track);
sys/dev/wscons/wsmouseinput.h
126
int track;
sys/dev/wscons/wstpad.c
1337
input->intv.track = 0;
sys/dev/wscons/wstpad.c
1340
if (input->intv.track) {
sys/dev/wscons/wstpad.c
1363
input->intv.track = 1;
sys/scsi/cd.c
1505
cd_read_subchannel(struct cd_softc *sc, int mode, int format, int track,
sys/scsi/cd.c
1526
cmd->track = track;
sys/scsi/cd.c
857
args->data_format, args->track, data, len);
sys/scsi/cd.c
972
*(int *)addr = (toc->header.len >= 10 && cte->track > 1) ?
sys/scsi/cd.h
115
u_int8_t track;
sys/scsi/cd.h
135
u_int8_t track;
sys/scsi/cd.h
52
u_int8_t track[2];
sys/sys/cdio.h
168
u_char track;
sys/sys/cdio.h
33
u_char track;
usr.bin/cdio/cdio.c
1242
printf("%5d ", toc_buffer[i].track);
usr.bin/cdio/cdio.c
1245
printf("%5d ", toc_buffer[n].track);
usr.bin/cdio/cdio.c
1278
printf("%5d ", toc_buffer[i].track);
usr.bin/cdio/cdio.c
1281
printf("%5d ", toc_buffer[n].track);
usr.bin/cdio/cdio.c
1710
toc2msf(u_int track, u_char *m, u_char *s, u_char *f)
usr.bin/cdio/cdio.c
1714
ctep = &toc_buffer[track - 1];
usr.bin/cdio/mmc.c
391
int r, track = 0;
usr.bin/cdio/mmc.c
402
track++;
usr.bin/cdio/mmc.c
426
writetrack(tr, track);
usr.bin/cdio/mmc.c
435
writetrack(struct track_info *tr, int track)
usr.bin/cdio/mmc.c
508
track, tr->type,
usr.bin/cdio/rip.c
102
int read_track(struct track *);
usr.bin/cdio/rip.c
104
int rip_next_track(struct track *);
usr.bin/cdio/rip.c
105
int play_next_track(struct track *);
usr.bin/cdio/rip.c
108
int (*next_track)(struct track *));
usr.bin/cdio/rip.c
110
int rip_tracks(char *arg, int (*next_track)(struct track *),
usr.bin/cdio/rip.c
365
read_track(struct track *ti)
usr.bin/cdio/rip.c
386
ti->track,
usr.bin/cdio/rip.c
423
ti->track,
usr.bin/cdio/rip.c
429
rip_next_track(struct track *info)
usr.bin/cdio/rip.c
460
play_next_track(struct track *info)
usr.bin/cdio/rip.c
519
int (*next_track)(struct track *))
usr.bin/cdio/rip.c
521
struct track info;
usr.bin/cdio/rip.c
535
if (trk == toc_buffer[i].track)
usr.bin/cdio/rip.c
541
info.track = toc_buffer[i].track;
usr.bin/cdio/rip.c
544
toc_buffer[i].track,
usr.bin/cdio/rip.c
573
toc_buffer[i].track);
usr.bin/cdio/rip.c
593
rip_tracks(char *arg, int (*next_track)(struct track *), int issorted)
usr.bin/cdio/rip.c
95
u_int track; /* track number */
usr.sbin/fdformat/fdformat.c
121
if (lseek (fd, (off_t) track*tracksize, SEEK_SET) == -1)
usr.sbin/fdformat/fdformat.c
167
int fd, c, track, error, tracks_per_dot, bytes_per_track, errs;
usr.sbin/fdformat/fdformat.c
310
for (track = 0; track < fdt.tracks * fdt.heads; track++) {
usr.sbin/fdformat/fdformat.c
311
if (!((track + 1) % tracks_per_dot))
usr.sbin/fdformat/fdformat.c
321
for (track = 0; track < fdt.tracks * fdt.heads; track++) {
usr.sbin/fdformat/fdformat.c
323
format_track(fd, track / fdt.heads, fdt.sectrac,
usr.sbin/fdformat/fdformat.c
324
track % fdt.heads, fdt.rate, fdt.gap2,
usr.sbin/fdformat/fdformat.c
327
if (!quiet && !((track + 1) % tracks_per_dot)) {
usr.sbin/fdformat/fdformat.c
333
if (verify_track(fd, track, bytes_per_track) < 0)
usr.sbin/fdformat/fdformat.c
335
if (!quiet && !((track + 1) % tracks_per_dot)) {
usr.sbin/fdformat/fdformat.c
96
verify_track(int fd, int track, int tracksize)