sys/dev/pci/drm/i915/display/intel_display_rps.c
107
gen5_rps_irq_handler(&to_gt(i915)->rps);
sys/dev/pci/drm/i915/display/intel_display_rps.c
85
intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
sys/dev/pci/drm/i915/display/intel_dpt.c
262
if (IS_ERR(dpt_obj) && i915_ggtt_has_aperture(to_gt(i915)->ggtt))
sys/dev/pci/drm/i915/display/intel_dpt.c
289
vm->gt = to_gt(i915);
sys/dev/pci/drm/i915/display/intel_fbc.c
268
return intel_gt_support_legacy_fencing(to_gt(i915));
sys/dev/pci/drm/i915/display/intel_fbdev_fb.c
88
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/display/intel_overlay.c
1411
engine = to_gt(dev_priv)->engine[RCS0];
sys/dev/pci/drm/i915/display/intel_plane_initial.c
202
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/display/intel_plane_initial.c
217
vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL);
sys/dev/pci/drm/i915/display/intel_plane_initial.c
74
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gem/i915_gem_context.c
1615
if (!intel_has_reset_engine(to_gt(ctx->i915)))
sys/dev/pci/drm/i915/gem/i915_gem_context.c
1653
ppgtt = i915_ppgtt_create(to_gt(i915), 0);
sys/dev/pci/drm/i915/gem/i915_gem_context.c
1852
ppgtt = i915_ppgtt_create(to_gt(i915), 0);
sys/dev/pci/drm/i915/gem/i915_gem_context.c
2409
ret = intel_gt_terminally_wedged(to_gt(i915));
sys/dev/pci/drm/i915/gem/i915_gem_context.c
251
if (!intel_has_reset_engine(to_gt(i915)))
sys/dev/pci/drm/i915/gem/i915_gem_context.c
610
if (!intel_uc_uses_guc_submission(&to_gt(i915)->uc) &&
sys/dev/pci/drm/i915/gem/i915_gem_context.c
877
ret = i915_gem_user_to_context_sseu(to_gt(i915), &user_sseu, sseu);
sys/dev/pci/drm/i915/gem/i915_gem_context.c
917
if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))
sys/dev/pci/drm/i915/gem/i915_gem_context.h
176
vm = &to_gt(ctx->i915)->ggtt->vm;
sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c
1132
return to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c
2710
eb->wakeref_gt0 = intel_gt_pm_get(to_gt(gt->i915));
sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c
2750
intel_gt_pm_put(to_gt(gt->i915), eb->wakeref_gt0);
sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c
2770
intel_gt_pm_put(to_gt(eb->gt->i915), eb->wakeref_gt0);
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
1001
mutex_unlock(&to_gt(i915)->ggtt->vm.mutex);
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
1140
err = intel_gt_retire_requests_timeout(to_gt(i915), MAX_SCHEDULE_TIMEOUT,
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
1234
else if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
1282
if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
1583
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
381
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
504
mutex_lock(&to_gt(i915)->ggtt->vm.mutex);
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
506
list_add(&obj->userfault_link, &to_gt(i915)->ggtt->userfault_list);
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
507
mutex_unlock(&to_gt(i915)->ggtt->vm.mutex);
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
755
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
877
mutex_lock(&to_gt(i915)->ggtt->vm.mutex);
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
879
list_add(&obj->userfault_link, &to_gt(i915)->ggtt->userfault_list);
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
880
mutex_unlock(&to_gt(i915)->ggtt->vm.mutex);
sys/dev/pci/drm/i915/gem/i915_gem_mman.c
983
mutex_lock(&to_gt(i915)->ggtt->vm.mutex);
sys/dev/pci/drm/i915/gem/i915_gem_phys.c
114
intel_gt_chipset_flush(to_gt(i915));
sys/dev/pci/drm/i915/gem/i915_gem_phys.c
233
intel_gt_chipset_flush(to_gt(i915));
sys/dev/pci/drm/i915/gem/i915_gem_region.c
133
!i915_ggtt_has_aperture(to_gt(mem->i915)->ggtt))
sys/dev/pci/drm/i915/gem/i915_gem_stolen.c
658
dbg_poison(to_gt(i915)->ggtt,
sys/dev/pci/drm/i915/gem/i915_gem_stolen.c
674
dbg_poison(to_gt(i915)->ggtt,
sys/dev/pci/drm/i915/gem/i915_gem_stolen.c
87
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gem/i915_gem_stolen.c
962
lmem_range = intel_gt_mcr_read_any(to_gt(i915), XEHP_TILE0_ADDR_RANGE) & 0xFFFF;
sys/dev/pci/drm/i915/gem/i915_gem_throttle.c
47
ret = intel_gt_terminally_wedged(to_gt(i915));
sys/dev/pci/drm/i915/gem/i915_gem_tiling.c
186
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gem/i915_gem_tiling.c
225
return to_gt(i915)->ggtt->bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&
sys/dev/pci/drm/i915/gem/i915_gem_tiling.c
350
if (!to_gt(i915)->ggtt->num_fences)
sys/dev/pci/drm/i915/gem/i915_gem_tiling.c
376
args->swizzle_mode = to_gt(i915)->ggtt->bit_6_swizzle_x;
sys/dev/pci/drm/i915/gem/i915_gem_tiling.c
378
args->swizzle_mode = to_gt(i915)->ggtt->bit_6_swizzle_y;
sys/dev/pci/drm/i915/gem/i915_gem_tiling.c
433
if (!to_gt(i915)->ggtt->num_fences)
sys/dev/pci/drm/i915/gem/i915_gem_tiling.c
449
args->swizzle_mode = to_gt(i915)->ggtt->bit_6_swizzle_x;
sys/dev/pci/drm/i915/gem/i915_gem_tiling.c
452
args->swizzle_mode = to_gt(i915)->ggtt->bit_6_swizzle_y;
sys/dev/pci/drm/i915/gem/i915_gem_ttm_move.c
202
if (!to_gt(i915)->migrate.context || intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gem/i915_gem_ttm_move.c
215
intel_engine_pm_get(to_gt(i915)->migrate.context->engine);
sys/dev/pci/drm/i915/gem/i915_gem_ttm_move.c
216
ret = intel_context_migrate_clear(to_gt(i915)->migrate.context, deps,
sys/dev/pci/drm/i915/gem/i915_gem_ttm_move.c
229
intel_engine_pm_get(to_gt(i915)->migrate.context->engine);
sys/dev/pci/drm/i915/gem/i915_gem_ttm_move.c
230
ret = intel_context_migrate_copy(to_gt(i915)->migrate.context,
sys/dev/pci/drm/i915/gem/i915_gem_ttm_move.c
242
intel_engine_pm_put(to_gt(i915)->migrate.context->engine);
sys/dev/pci/drm/i915/gem/i915_gem_userptr.c
506
if (!to_gt(i915)->vm->has_read_only)
sys/dev/pci/drm/i915/gem/selftests/huge_pages.c
1984
ppgtt = i915_ppgtt_create(to_gt(i915), 0);
sys/dev/pci/drm/i915/gem/selftests/huge_pages.c
2030
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c
691
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c
740
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c
1252
igt_global_reset_lock(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c
1335
igt_global_reset_unlock(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c
1403
vm = ctx->vm ?: &to_gt(i915)->ggtt->alias->vm;
sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c
1911
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gem/selftests/i915_gem_dmabuf.c
199
mode = intel_gt_coherent_map_type(to_gt(i915), native_obj, false);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_migrate.c
527
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
1217
err = intel_context_migrate_clear(to_gt(i915)->migrate.context, NULL,
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
1460
intel_gt_flush_ggtt_writes(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
1476
intel_gt_flush_ggtt_writes(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
155
intel_gt_flush_ggtt_writes(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
1579
intel_gt_flush_ggtt_writes(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
251
intel_gt_flush_ggtt_writes(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
324
if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
337
(1 + next_prime_number(to_gt(i915)->ggtt->vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
383
tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_x;
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
386
tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_y;
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
457
if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
474
(1 + next_prime_number(to_gt(i915)->ggtt->vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
503
tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_x;
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
506
tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_y;
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
633
intel_gt_pm_get_untracked(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
634
cancel_delayed_work_sync(&to_gt(i915)->requests.retire_work);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
640
intel_gt_pm_put_untracked(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
668
GEM_BUG_ON(!to_gt(i915)->awake);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
669
intel_gt_retire_requests(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
745
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
882
!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
962
intel_gt_flush_ggtt_writes(to_gt(i915));
sys/dev/pci/drm/i915/gem/selftests/i915_gem_object.c
46
to_gt(i915)->ggtt->vm.total + PAGE_SIZE);
sys/dev/pci/drm/i915/gt/intel_ggtt.c
1094
ret = init_ggtt(to_gt(i915)->ggtt);
sys/dev/pci/drm/i915/gt/intel_ggtt.c
1099
ret = init_aliasing_ppgtt(to_gt(i915)->ggtt);
sys/dev/pci/drm/i915/gt/intel_ggtt.c
1101
cleanup_init_ggtt(to_gt(i915)->ggtt);
sys/dev/pci/drm/i915/gt/intel_ggtt.c
1156
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gt/intel_ggtt.c
1171
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/gt/intel_ggtt.c
130
ret = ggtt_init_hw(to_gt(i915)->ggtt);
sys/dev/pci/drm/i915/gt/intel_ggtt.c
1715
ret = ggtt_probe_hw(to_gt(i915)->ggtt, to_gt(i915));
sys/dev/pci/drm/i915/gt/intel_ggtt_fencing.c
738
to_gt(i915)->ggtt->bit_6_swizzle_x = swizzle_x;
sys/dev/pci/drm/i915/gt/intel_ggtt_fencing.c
739
to_gt(i915)->ggtt->bit_6_swizzle_y = swizzle_y;
sys/dev/pci/drm/i915/gt/intel_ggtt_fencing.c
905
to_gt(i915)->ggtt->bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
sys/dev/pci/drm/i915/gt/intel_gt.c
119
gt->ggtt = to_gt(gt->i915)->ggtt;
sys/dev/pci/drm/i915/gt/intel_gt.c
900
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/intel_gt.c
986
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/intel_gt_sysfs.c
45
return to_gt(i915);
sys/dev/pci/drm/i915/gt/intel_mocs.c
460
if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 74))) {
sys/dev/pci/drm/i915/gt/intel_region_lmem.c
263
lmem_range = intel_gt_mcr_read_any(to_gt(i915), XEHP_TILE0_ADDR_RANGE) & 0xFFFF;
sys/dev/pci/drm/i915/gt/intel_rps.c
1153
intel_uncore_read(to_gt(i915)->uncore,
sys/dev/pci/drm/i915/gt/intel_rps.c
2812
struct intel_ips *ips = &to_gt(i915)->rps.ips;
sys/dev/pci/drm/i915/gt/intel_rps.c
2839
rps = &to_gt(i915)->rps;
sys/dev/pci/drm/i915/gt/intel_rps.c
2866
rps = &to_gt(i915)->rps;
sys/dev/pci/drm/i915/gt/intel_rps.c
2892
ret = to_gt(i915)->awake;
sys/dev/pci/drm/i915/gt/intel_rps.c
2915
rps = &to_gt(i915)->rps;
sys/dev/pci/drm/i915/gt/intel_rps.c
2919
ret = !__gen5_rps_set(&to_gt(i915)->rps, rps->min_freq);
sys/dev/pci/drm/i915/gt/intel_sa_media.c
24
gt->irq_lock = to_gt(i915)->irq_lock;
sys/dev/pci/drm/i915/gt/intel_workarounds.c
1142
const struct sseu_dev_info *sseu = &to_gt(i915)->info.sseu;
sys/dev/pci/drm/i915/gt/mock_engine.c
348
GEM_BUG_ON(!to_gt(i915)->uncore);
sys/dev/pci/drm/i915/gt/mock_engine.c
356
engine->base.gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/mock_engine.c
357
engine->base.uncore = to_gt(i915)->uncore;
sys/dev/pci/drm/i915/gt/mock_engine.c
380
to_gt(i915)->engine[id] = &engine->base;
sys/dev/pci/drm/i915/gt/mock_engine.c
381
to_gt(i915)->engine_class[0][id] = &engine->base;
sys/dev/pci/drm/i915/gt/selftest_engine_heartbeat.c
271
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gt/selftest_engine_heartbeat.c
277
err = intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/selftest_execlists.c
4498
if (to_gt(i915)->submission_method != INTEL_SUBMISSION_ELSP)
sys/dev/pci/drm/i915/gt/selftest_execlists.c
4501
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gt/selftest_execlists.c
4504
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/selftest_gt_pm.c
192
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gt/selftest_gt_pm.c
195
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/selftest_gt_pm.c
209
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gt/selftest_gt_pm.c
212
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
2019
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/selftest_lrc.c
1993
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/selftest_migrate.c
1023
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/selftest_migrate.c
565
if (igt_spinner_init(&st.spin, to_gt(i915)))
sys/dev/pci/drm/i915/gt/selftest_migrate.c
802
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/selftest_mocs.c
452
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/selftest_reset.c
385
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/selftest_ring_submission.c
294
if (to_gt(i915)->submission_method > INTEL_SUBMISSION_RING)
sys/dev/pci/drm/i915/gt/selftest_ring_submission.c
297
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/selftest_timeline.c
1429
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gt/selftest_timeline.c
1432
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/selftest_timeline.c
164
state.gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/selftest_workarounds.c
1375
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/gt/selftest_workarounds.c
1378
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/gt/uc/selftest_guc.c
410
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/uc/selftest_guc_hangcheck.c
153
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gt/uc/selftest_guc_multi_lrc.c
175
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/gvt/dmabuf.c
78
gtt_entries = (gen8_pte_t __iomem *)to_gt(dev_priv)->ggtt->gsm +
sys/dev/pci/drm/i915/gvt/kvmgt.c
1870
gvt->gt = to_gt(i915);
sys/dev/pci/drm/i915/gvt/scheduler.c
1392
ppgtt = i915_ppgtt_create(to_gt(i915), I915_BO_ALLOC_PM_EARLY);
sys/dev/pci/drm/i915/i915_debugfs.c
145
if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 74))) {
sys/dev/pci/drm/i915/i915_debugfs.c
289
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/i915_debugfs.c
328
swizzle_string(to_gt(dev_priv)->ggtt->bit_6_swizzle_x));
sys/dev/pci/drm/i915/i915_debugfs.c
330
swizzle_string(to_gt(dev_priv)->ggtt->bit_6_swizzle_y));
sys/dev/pci/drm/i915/i915_debugfs.c
377
struct intel_rps *rps = &to_gt(dev_priv)->rps;
sys/dev/pci/drm/i915/i915_debugfs.c
383
seq_printf(m, "GPU busy? %s\n", str_yes_no(to_gt(dev_priv)->awake));
sys/dev/pci/drm/i915/i915_debugfs.c
413
seq_printf(m, "GPU idle: %s\n", str_yes_no(!to_gt(dev_priv)->awake));
sys/dev/pci/drm/i915/i915_debugfs.c
445
str_yes_no(to_gt(i915)->awake),
sys/dev/pci/drm/i915/i915_debugfs.c
446
atomic_read(&to_gt(i915)->wakeref.count),
sys/dev/pci/drm/i915/i915_debugfs.c
447
ktime_to_ms(intel_gt_get_awake_time(to_gt(i915))));
sys/dev/pci/drm/i915/i915_debugfs.c
449
to_gt(i915)->clock_frequency,
sys/dev/pci/drm/i915/i915_debugfs.c
450
to_gt(i915)->clock_period_ns);
sys/dev/pci/drm/i915/i915_debugfs.c
456
intel_gt_show_timelines(to_gt(i915), &p, i915_request_show_with_schedule);
sys/dev/pci/drm/i915/i915_debugfs.c
539
if (intel_gt_ns_to_clock_interval(to_gt(i915), val) > U32_MAX)
sys/dev/pci/drm/i915/i915_debugfs.c
668
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/i915_debugfs.c
72
intel_gt_info_print(&to_gt(i915)->info, &p);
sys/dev/pci/drm/i915/i915_driver.c
1106
i915_ggtt_suspend(to_gt(dev_priv)->ggtt);
sys/dev/pci/drm/i915/i915_driver.c
1217
i915_ggtt_resume(to_gt(dev_priv)->ggtt);
sys/dev/pci/drm/i915/i915_driver.c
201
if (!intel_gt_gpu_reset_clobbers_display(to_gt(i915))) {
sys/dev/pci/drm/i915/i915_gem.c
1236
i915_ggtt_resume(to_gt(dev_priv)->ggtt);
sys/dev/pci/drm/i915/i915_gem.c
306
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/i915_gem.c
367
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/i915_gem.c
383
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/i915_gem.c
546
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/i915_gem.c
854
&to_gt(i915)->ggtt->userfault_list, userfault_link)
sys/dev/pci/drm/i915/i915_gem.c
866
for (i = 0; i < to_gt(i915)->ggtt->num_fences; i++) {
sys/dev/pci/drm/i915/i915_gem.c
867
struct i915_fence_reg *reg = &to_gt(i915)->ggtt->fence_regs[i];
sys/dev/pci/drm/i915/i915_gem.c
908
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/i915_gem.c
93
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/i915_gem_gtt.c
114
GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm);
sys/dev/pci/drm/i915/i915_gem_gtt.c
214
GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm);
sys/dev/pci/drm/i915/i915_gem_gtt.c
63
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/i915_getparam.c
108
value = intel_huc_check_status(&to_gt(i915)->uc.huc);
sys/dev/pci/drm/i915/i915_getparam.c
160
if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))
sys/dev/pci/drm/i915/i915_getparam.c
188
value = to_gt(i915)->clock_frequency;
sys/dev/pci/drm/i915/i915_getparam.c
21
const struct sseu_dev_info *sseu = &to_gt(i915)->info.sseu;
sys/dev/pci/drm/i915/i915_getparam.c
39
value = to_gt(i915)->ggtt->num_fences;
sys/dev/pci/drm/i915/i915_getparam.c
90
intel_has_gpu_reset(to_gt(i915));
sys/dev/pci/drm/i915/i915_getparam.c
91
if (value && intel_has_reset_engine(to_gt(i915)))
sys/dev/pci/drm/i915/i915_gpu_error.c
2159
error->uptime = ktime_sub(ktime_get(), to_gt(i915)->last_init_time);
sys/dev/pci/drm/i915/i915_gpu_error.c
2558
gpu = i915_gpu_coredump(to_gt(i915), ALL_ENGINES, CORE_DUMP_FLAG_NONE);
sys/dev/pci/drm/i915/i915_irq.c
1092
intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0],
sys/dev/pci/drm/i915/i915_irq.c
1096
intel_engine_cs_irq(to_gt(dev_priv)->engine[VCS0],
sys/dev/pci/drm/i915/i915_irq.c
1132
to_gt(dev_priv)->pm_guc_events = GUC_INTR_GUC2HOST << 16;
sys/dev/pci/drm/i915/i915_irq.c
160
struct intel_gt *gt = to_gt(dev_priv);
sys/dev/pci/drm/i915/i915_irq.c
299
gen6_gt_irq_handler(to_gt(dev_priv), gt_iir);
sys/dev/pci/drm/i915/i915_irq.c
301
gen6_rps_irq_handler(&to_gt(dev_priv)->rps, pm_iir);
sys/dev/pci/drm/i915/i915_irq.c
362
gen8_gt_irq_handler(to_gt(dev_priv), master_ctl);
sys/dev/pci/drm/i915/i915_irq.c
447
gen6_gt_irq_handler(to_gt(i915), gt_iir);
sys/dev/pci/drm/i915/i915_irq.c
449
gen5_gt_irq_handler(to_gt(i915), gt_iir);
sys/dev/pci/drm/i915/i915_irq.c
467
gen6_rps_irq_handler(&to_gt(i915)->rps, pm_iir);
sys/dev/pci/drm/i915/i915_irq.c
519
gen8_gt_irq_handler(to_gt(dev_priv), master_ctl);
sys/dev/pci/drm/i915/i915_irq.c
558
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/i915_irq.c
615
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/i915_irq.c
672
gen5_gt_irq_reset(to_gt(dev_priv));
sys/dev/pci/drm/i915/i915_irq.c
684
gen5_gt_irq_reset(to_gt(dev_priv));
sys/dev/pci/drm/i915/i915_irq.c
696
gen8_gt_irq_reset(to_gt(dev_priv));
sys/dev/pci/drm/i915/i915_irq.c
704
struct intel_gt *gt = to_gt(dev_priv);
sys/dev/pci/drm/i915/i915_irq.c
744
gen8_gt_irq_reset(to_gt(dev_priv));
sys/dev/pci/drm/i915/i915_irq.c
755
gen5_gt_irq_postinstall(to_gt(dev_priv));
sys/dev/pci/drm/i915/i915_irq.c
764
gen5_gt_irq_postinstall(to_gt(dev_priv));
sys/dev/pci/drm/i915/i915_irq.c
776
gen8_gt_irq_postinstall(to_gt(dev_priv));
sys/dev/pci/drm/i915/i915_irq.c
785
struct intel_gt *gt = to_gt(dev_priv);
sys/dev/pci/drm/i915/i915_irq.c
821
gen8_gt_irq_postinstall(to_gt(dev_priv));
sys/dev/pci/drm/i915/i915_irq.c
975
intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir);
sys/dev/pci/drm/i915/i915_perf.c
1962
intel_gt_ns_to_clock_interval(to_gt(stream->perf->i915),
sys/dev/pci/drm/i915/i915_perf.c
3224
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/i915_perf.c
3231
with_intel_runtime_pm(to_gt(i915)->uncore->rpm, wakeref)
sys/dev/pci/drm/i915/i915_perf.c
3232
reg = intel_uncore_read(to_gt(i915)->uncore, RPM_CONFIG0);
sys/dev/pci/drm/i915/i915_perf.c
3237
return to_gt(i915)->clock_frequency << (3 - shift);
sys/dev/pci/drm/i915/i915_perf.c
3240
return to_gt(i915)->clock_frequency;
sys/dev/pci/drm/i915/i915_perf.c
4307
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/i915_perf.c
5192
oa_sample_rate_hard_limit = to_gt(i915)->clock_frequency / 2;
sys/dev/pci/drm/i915/i915_pmu.c
571
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/i915_pmu.c
706
val = ktime_to_ns(intel_gt_get_awake_time(to_gt(i915)));
sys/dev/pci/drm/i915/i915_query.c
546
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/i915_query.c
572
struct intel_guc *guc = &to_gt(i915)->uc.guc;
sys/dev/pci/drm/i915/i915_query.c
576
if (!intel_uc_uses_guc_submission(&to_gt(i915)->uc))
sys/dev/pci/drm/i915/i915_query.c
93
const struct sseu_dev_info *sseu = &to_gt(dev_priv)->info.sseu;
sys/dev/pci/drm/i915/intel_clock_gating.c
337
val = intel_gt_mcr_read_any(to_gt(i915), GEN8_L3SQCREG1);
sys/dev/pci/drm/i915/intel_clock_gating.c
341
intel_gt_mcr_multicast_write(to_gt(i915), GEN8_L3SQCREG1, val);
sys/dev/pci/drm/i915/intel_clock_gating.c
347
intel_gt_mcr_read_any(to_gt(i915), GEN8_L3SQCREG1);
sys/dev/pci/drm/i915/intel_gvt.c
168
if (intel_uc_wants_guc_submission(&to_gt(dev_priv)->uc)) {
sys/dev/pci/drm/i915/intel_gvt.c
89
*mmio = intel_uncore_read_notrace(to_gt(dev_priv)->uncore,
sys/dev/pci/drm/i915/intel_gvt_mmio_table.c
55
if (HAS_ENGINE(to_gt(iter->i915), VCS1)) \
sys/dev/pci/drm/i915/pxp/intel_pxp.c
165
intel_huc_is_loaded_by_gsc(&to_gt(i915)->uc.huc) && intel_uc_uses_huc(&to_gt(i915)->uc))
sys/dev/pci/drm/i915/pxp/intel_pxp.c
166
return to_gt(i915);
sys/dev/pci/drm/i915/pxp/intel_pxp.c
191
if (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && !i915->media_gt && VDBOX_MASK(to_gt(i915)))
sys/dev/pci/drm/i915/pxp/intel_pxp.c
192
return to_gt(i915);
sys/dev/pci/drm/i915/pxp/intel_pxp.c
202
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/i915_active.c
258
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/i915_gem.c
107
i915_ggtt_suspend(to_gt(i915)->ggtt);
sys/dev/pci/drm/i915/selftests/i915_gem.c
117
i915_ggtt_suspend(to_gt(i915)->ggtt);
sys/dev/pci/drm/i915/selftests/i915_gem.c
133
i915_ggtt_resume(to_gt(i915)->ggtt);
sys/dev/pci/drm/i915/selftests/i915_gem.c
135
setup_private_pat(to_gt(i915));
sys/dev/pci/drm/i915/selftests/i915_gem.c
258
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/i915_gem.c
45
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/selftests/i915_gem_evict.c
555
err = i915_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/selftests/i915_gem_evict.c
567
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/i915_gem_evict.c
570
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c
1210
ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0);
sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c
1284
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c
1349
struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c
166
ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0);
sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c
1936
err = intel_gt_assign_ggtt(to_gt(i915));
sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c
1940
gt = to_gt(i915);
sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c
1976
GEM_BUG_ON(offset_in_page(to_gt(i915)->ggtt->vm.total));
sys/dev/pci/drm/i915/selftests/i915_perf.c
433
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/i915_request.c
1882
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/i915_request.c
3299
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/i915_selftest.c
163
struct intel_huc *huc = &to_gt(i915)->uc.huc;
sys/dev/pci/drm/i915/selftests/i915_selftest.c
271
if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 00), IP_VER(12, 74))) {
sys/dev/pci/drm/i915/selftests/i915_selftest.c
379
if (intel_gt_pm_wait_for_idle(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/i915_selftest.c
382
return intel_gt_terminally_wedged(to_gt(i915));
sys/dev/pci/drm/i915/selftests/i915_vma.c
939
err = intel_gt_assign_ggtt(to_gt(i915));
sys/dev/pci/drm/i915/selftests/i915_vma.c
943
gt = to_gt(i915);
sys/dev/pci/drm/i915/selftests/i915_vma.c
993
if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
sys/dev/pci/drm/i915/selftests/intel_memory_region.c
1389
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/intel_memory_region.c
1401
if (intel_gt_is_wedged(to_gt(i915)))
sys/dev/pci/drm/i915/selftests/intel_uncore.c
354
return intel_gt_live_subtests(tests, to_gt(i915));
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
212
atomic_inc(&to_gt(i915)->wakeref.count); /* disable; no hw support */
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
213
to_gt(i915)->awake = INTEL_WAKEREF_MOCK_GT;
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
231
ret = intel_gt_assign_ggtt(to_gt(i915));
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
235
mock_init_ggtt(to_gt(i915));
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
236
to_gt(i915)->vm = i915_vm_get(&to_gt(i915)->ggtt->vm);
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
238
to_gt(i915)->info.engine_mask = BIT(0);
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
240
to_gt(i915)->engine[RCS0] = mock_engine(i915, "mock", RCS0);
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
241
if (!to_gt(i915)->engine[RCS0])
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
244
if (mock_engine_init(to_gt(i915)->engine[RCS0]))
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
247
__clear_bit(I915_WEDGED, &to_gt(i915)->reset.flags);
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
256
intel_gt_driver_remove(to_gt(i915));
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
50
struct intel_gt *gt = to_gt(i915);
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
69
intel_gt_driver_remove(to_gt(i915));
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
73
mock_fini_ggtt(to_gt(i915)->ggtt);
sys/dev/pci/drm/i915/selftests/mock_gtt.c
73
ppgtt->vm.gt = to_gt(i915);
sys/dev/pci/drm/i915/selftests/mock_uncore.c
45
intel_uncore_init_early(uncore, to_gt(i915));