sys/dev/pci/drm/i915/display/intel_ddi.c

1830

if ((tmp & DDI_CLK_SEL_MASK) == DDI_CLK_SEL_NONE)

sys/dev/pci/drm/i915/display/intel_ddi.c

1883

if ((tmp & DDI_CLK_SEL_MASK) == DDI_CLK_SEL_NONE)

sys/dev/pci/drm/i915/display/intel_ddi.c

1901

switch (tmp & DDI_CLK_SEL_MASK) {

sys/dev/pci/drm/i915/display/intel_ddi.c

388

u32 val = intel_de_read(display, DDI_CLK_SEL(port)) & DDI_CLK_SEL_MASK;

sys/dev/pci/drm/i915/display/intel_display_regs.h

2439

#define DDI_CLK_SEL_NONE REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0x0)

sys/dev/pci/drm/i915/display/intel_display_regs.h

2440

#define DDI_CLK_SEL_MG REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0x8)

sys/dev/pci/drm/i915/display/intel_display_regs.h

2441

#define DDI_CLK_SEL_TBT_162 REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0xC)

sys/dev/pci/drm/i915/display/intel_display_regs.h

2442

#define DDI_CLK_SEL_TBT_270 REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0xD)

sys/dev/pci/drm/i915/display/intel_display_regs.h

2443

#define DDI_CLK_SEL_TBT_540 REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0xE)

sys/dev/pci/drm/i915/display/intel_display_regs.h

2444

#define DDI_CLK_SEL_TBT_810 REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0xF)