Symbol: DC_VALIDATE_MODE_AND_PROGRAMMING
sys/dev/pci/drm/amd/display/dc/core/dc.c
2408
res = dc_validate_with_context(dc, set, params->stream_count, context, DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/core/dc.c
3566
if (dc->res_pool->funcs->validate_bandwidth(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING) != DC_OK) {
sys/dev/pci/drm/amd/display/dc/core/dc.c
4674
DC_VALIDATE_MODE_AND_PROGRAMMING) == DC_OK) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1122
if (v->voltage_level != number_of_states_plus_one && validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1289
} else if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
2052
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
2097
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
2101
voltage_supported = dcn20_validate_bandwidth_internal(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING, pipes);
sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
2114
voltage_supported = dcn20_validate_bandwidth_internal(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING, pipes);
sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
2348
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
343
DC_VALIDATE_MODE_AND_PROGRAMMING, true);
sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
635
DC_VALIDATE_MODE_AND_PROGRAMMING, true);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
1521
DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
1565
DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2177
if (validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2183
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING ||
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2200
context->bw_ctx.dml.validate_max_state = (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2348
dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2395
DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2417
DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
293
dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
303
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING)
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c
566
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING)
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2492
if (dc->res_pool->funcs->validate_bandwidth(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING) != DC_OK)
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2407
if (dc->res_pool->funcs->validate_bandwidth(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING) != DC_OK)
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1658
if (validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING || !allow_self_refresh_only) {
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1672
(validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING || vlevel == context->bw_ctx.dml.soc.num_states ||
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1681
context->bw_ctx.dml.validate_max_state = (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING);
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
2069
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
1786
validate_mode = DC_VALIDATE_MODE_AND_PROGRAMMING;
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
1793
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
1725
validate_mode = DC_VALIDATE_MODE_AND_PROGRAMMING;
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
1732
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1782
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1838
if (validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING && status == DC_OK && dc_state_is_subvp_in_use(context)) {
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1853
if (validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING && status == DC_FAIL_HW_CURSOR_SUPPORT) {
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1967
if (validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING) {
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1745
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING)
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1725
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING)
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1726
if (validate_mode != DC_VALIDATE_MODE_AND_PROGRAMMING)
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1659
if (validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING && status == DC_OK && dc_state_is_subvp_in_use(context)) {
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1674
if (validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING && status == DC_FAIL_HW_CURSOR_SUPPORT) {