sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1413

struct test_pattern_params *params;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1433

params = &opp_heads[i]->stream_res.test_pattern_params;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1535

new_pipe->stream_res.test_pattern_params.width != 0 &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1536

new_pipe->stream_res.test_pattern_params.height != 0)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1673

if (memcmp(&old_pipe->stream_res.test_pattern_params,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1674

&new_pipe->stream_res.test_pattern_params, sizeof(struct test_pattern_params))) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2034

pipe_ctx->stream_res.test_pattern_params.test_pattern,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2035

pipe_ctx->stream_res.test_pattern_params.color_space,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2036

pipe_ctx->stream_res.test_pattern_params.color_depth,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2038

pipe_ctx->stream_res.test_pattern_params.width,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2039

pipe_ctx->stream_res.test_pattern_params.height,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2040

pipe_ctx->stream_res.test_pattern_params.offset);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2088

pipe_ctx->stream_res.test_pattern_params.test_pattern,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2089

pipe_ctx->stream_res.test_pattern_params.color_space,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2090

pipe_ctx->stream_res.test_pattern_params.color_depth,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2092

pipe_ctx->stream_res.test_pattern_params.width,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2093

pipe_ctx->stream_res.test_pattern_params.height,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2094

pipe_ctx->stream_res.test_pattern_params.offset);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2505

new_pipe->stream_res.test_pattern_params.width != 0 &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2506

new_pipe->stream_res.test_pattern_params.height != 0)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2643

if (memcmp(&old_pipe->stream_res.test_pattern_params,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2644

&new_pipe->stream_res.test_pattern_params, sizeof(struct test_pattern_params))) {

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

363

struct test_pattern_params test_pattern_params;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

491

struct test_pattern_params *tp_params;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

497

controller_test_pattern = pipe_ctx->stream_res.test_pattern_params.test_pattern;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

516

controller_color_space = pipe_ctx->stream_res.test_pattern_params.color_space;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

525

tp_params = &odm_pipe->stream_res.test_pattern_params;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

557

tp_params = &odm_pipe->stream_res.test_pattern_params;