sys/dev/pci/drm/i915/display/intel_display_power.c

1003

mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6;

sys/dev/pci/drm/i915/display/intel_display_power.c

1009

mask |= DC_STATE_EN_UPTO_DC6;

sys/dev/pci/drm/i915/display/intel_display_power.c

1038

sanitize_target_dc_state(display, DC_STATE_EN_UPTO_DC6);

sys/dev/pci/drm/i915/display/intel_display_power.c

2318

if (power_domains->allowed_dc_mask & DC_STATE_EN_UPTO_DC6)

sys/dev/pci/drm/i915/display/intel_display_power.c

267

DC_STATE_EN_UPTO_DC6,

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1024

old_state == DC_STATE_EN_UPTO_DC6)

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1065

case DC_STATE_EN_UPTO_DC6:

sys/dev/pci/drm/i915/display/intel_display_power_well.c

720

mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6

sys/dev/pci/drm/i915/display/intel_display_power_well.c

723

mask |= DC_STATE_EN_UPTO_DC6 | DC_STATE_EN_DC9;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

727

mask |= DC_STATE_EN_UPTO_DC6;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

798

enable_dc6 = state & DC_STATE_EN_UPTO_DC6;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

799

dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

880

DC_STATE_EN_UPTO_DC6),

sys/dev/pci/drm/i915/display/intel_display_power_well.c

897

intel_dmc_wl_enable(display, DC_STATE_EN_UPTO_DC6);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

899

gen9_set_dc_state(display, DC_STATE_EN_UPTO_DC6);

sys/dev/pci/drm/i915/display/intel_dmc.c

1574

dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

268

case DC_STATE_EN_UPTO_DC6:

sys/dev/pci/drm/i915/display/intel_psr.c

1163

intel_display_power_set_target_dc_state(display, DC_STATE_EN_UPTO_DC6);

sys/dev/pci/drm/i915/display/intel_psr.c

3969

DC_STATE_EN_UPTO_DC6);

sys/dev/pci/drm/i915/display/intel_psr.c

905

current_dc_state != DC_STATE_EN_UPTO_DC6) ||