Symbol: DC_IRQ_SOURCE_HPD1
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4275
int_params.irq_source < DC_IRQ_SOURCE_HPD1 ||
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
494
for (src = DC_IRQ_SOURCE_HPD1; src <= DC_IRQ_SOURCE_HPD6RX; src++) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
552
for (src = DC_IRQ_SOURCE_HPD1; src <= DC_IRQ_SOURCE_HPD6; src++) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
674
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
898
for (i = DC_IRQ_SOURCE_HPD1; i <= DC_IRQ_SOURCE_HPD6RX; i++) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
924
irq_type = dc_link->irq_source_hpd - DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
979
irq_type = dc_link->irq_source_hpd - DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/gpio/gpio_service.c
390
return (enum dc_irq_source)(DC_IRQ_SOURCE_HPD1 +
sys/dev/pci/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
373
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
90
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
91
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dce60/irq_service_dce60.c
308
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
188
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
99
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
100
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
193
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
140
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
66
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
101
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
215
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
111
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
224
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
211
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
96
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
135
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
63
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
210
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
98
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
100
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
212
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
105
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
217
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
221
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
99
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
209
IRQ_REG_ENTRY(DC_IRQ_SOURCE_HPD1, HPD, reg_num,\
sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
212
REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].funcs = &hpd_irq_info_funcs;\
sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
213
REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num);\
sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
97
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
188
IRQ_REG_ENTRY(DC_IRQ_SOURCE_HPD1, HPD, reg_num,\
sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
191
REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].funcs = &hpd_irq_info_funcs;\
sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
192
REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num);\
sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
76
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
187
IRQ_REG_ENTRY(DC_IRQ_SOURCE_HPD1, HPD, reg_num,\
sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
190
REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].funcs = &hpd_irq_info_funcs;\
sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
191
REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num);\
sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
75
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
201
[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
79
return DC_IRQ_SOURCE_HPD1;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_hpd.c
147
case DC_IRQ_SOURCE_HPD1: