sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1016

(min_refresh >= subvp_high_refresh_list.min_refresh &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1017

max_refresh <= subvp_high_refresh_list.max_refresh)))

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3437

uint32_t subvp_min_refresh = subvp_high_refresh_list.min_refresh;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3438

uint32_t subvp_max_refresh = subvp_high_refresh_list.max_refresh;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3466

uint32_t width = subvp_high_refresh_list.res[i].width;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3467

uint32_t height = subvp_high_refresh_list.res[i].height;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

39

static const struct subvp_high_refresh_list subvp_high_refresh_list = {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

991

uint32_t min_refresh = subvp_high_refresh_list.min_refresh, max_refresh = 0;