bin/chio/parse.y

207

if ((c = getc(file->stream)) == EOF) {

bin/chio/parse.y

217

while ((c = getc(file->stream)) == '\\') {

bin/chio/parse.y

218

next = getc(file->stream);

bin/chio/parse.y

230

c = getc(file->stream);

bin/chio/parse.y

40

FILE *stream;

bin/chio/parse.y

404

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

bin/chio/parse.y

423

fclose(file->stream);

games/adventure/hdr.h

148

null, entrnc, dprssn, enter, stream, pour, say, lock, throw,

games/adventure/main.c

101

null, entrnc, dprssn, enter, stream, pour, say, lock, throw,

lib/libcrypto/bio/bio.h

531

BIO *BIO_new_fp(FILE *stream, int close_flag);

lib/libcrypto/bio/bss_file.c

143

BIO_new_fp(FILE *stream, int close_flag)

lib/libcrypto/bio/bss_file.c

150

BIO_set_fp(ret, stream, close_flag);

lib/libcrypto/modes/ccm128.c

358

size_t len, ccm128_f stream)

lib/libcrypto/modes/ccm128.c

391

(*stream)(inp, out, n, key, ctx->nonce.c, ctx->cmac.c);

lib/libcrypto/modes/ccm128.c

425

size_t len, ccm128_f stream)

lib/libcrypto/modes/ccm128.c

453

(*stream)(inp, out, n, key, ctx->nonce.c, ctx->cmac.c);

lib/libcrypto/modes/gcm128.c

433

unsigned char *out, size_t len, ctr128_f stream)

lib/libcrypto/modes/gcm128.c

466

stream(in, out, j, ctx->key, ctx->Yi.c);

lib/libcrypto/modes/gcm128.c

491

unsigned char *out, size_t len, ctr128_f stream)

lib/libcrypto/modes/gcm128.c

528

stream(in, out, j, ctx->key, ctx->Yi.c);

lib/libcrypto/modes/modes.h

105

ccm128_f stream);

lib/libcrypto/modes/modes.h

108

ccm128_f stream);

lib/libcrypto/modes/modes.h

82

size_t len, ctr128_f stream);

lib/libcrypto/modes/modes.h

85

size_t len, ctr128_f stream);

lib/libcurses/tinfo/lib_setup.c

74

# include <sys/stream.h>

lib/libz/compress.c

24

z_stream stream;

lib/libz/compress.c

36

stream.zalloc = (alloc_func)0;

lib/libz/compress.c

37

stream.zfree = (free_func)0;

lib/libz/compress.c

38

stream.opaque = (voidpf)0;

lib/libz/compress.c

40

err = deflateInit(&stream, level);

lib/libz/compress.c

43

stream.next_out = dest;

lib/libz/compress.c

44

stream.avail_out = 0;

lib/libz/compress.c

45

stream.next_in = (z_const Bytef *)source;

lib/libz/compress.c

46

stream.avail_in = 0;

lib/libz/compress.c

49

if (stream.avail_out == 0) {

lib/libz/compress.c

50

stream.avail_out = left > (z_size_t)max ? max : (uInt)left;

lib/libz/compress.c

51

left -= stream.avail_out;

lib/libz/compress.c

53

if (stream.avail_in == 0) {

lib/libz/compress.c

54

stream.avail_in = sourceLen > (z_size_t)max ? max :

lib/libz/compress.c

56

sourceLen -= stream.avail_in;

lib/libz/compress.c

58

err = deflate(&stream, sourceLen ? Z_NO_FLUSH : Z_FINISH);

lib/libz/compress.c

61

*destLen = (z_size_t)(stream.next_out - dest);

lib/libz/compress.c

62

deflateEnd(&stream);

lib/libz/uncompr.c

29

z_stream stream;

lib/libz/uncompr.c

41

dest = (Bytef *)&stream.reserved; /* next_out cannot be NULL */

lib/libz/uncompr.c

43

stream.next_in = (z_const Bytef *)source;

lib/libz/uncompr.c

44

stream.avail_in = 0;

lib/libz/uncompr.c

45

stream.zalloc = (alloc_func)0;

lib/libz/uncompr.c

46

stream.zfree = (free_func)0;

lib/libz/uncompr.c

47

stream.opaque = (voidpf)0;

lib/libz/uncompr.c

49

err = inflateInit(&stream);

lib/libz/uncompr.c

52

stream.next_out = dest;

lib/libz/uncompr.c

53

stream.avail_out = 0;

lib/libz/uncompr.c

56

if (stream.avail_out == 0) {

lib/libz/uncompr.c

57

stream.avail_out = left > (z_size_t)max ? max : (uInt)left;

lib/libz/uncompr.c

58

left -= stream.avail_out;

lib/libz/uncompr.c

60

if (stream.avail_in == 0) {

lib/libz/uncompr.c

61

stream.avail_in = len > (z_size_t)max ? max : (uInt)len;

lib/libz/uncompr.c

62

len -= stream.avail_in;

lib/libz/uncompr.c

64

err = inflate(&stream, Z_NO_FLUSH);

lib/libz/uncompr.c

70

len += stream.avail_in;

lib/libz/uncompr.c

71

left += stream.avail_out;

lib/libz/uncompr.c

75

inflateEnd(&stream);

regress/lib/libssl/handshake/handshake_table.c

189

void fprint_entry(FILE *stream,

regress/lib/libssl/handshake/handshake_table.c

192

void fprint_flags(FILE *stream, uint8_t flags);

regress/lib/libssl/handshake/handshake_table.c

298

fprint_flags(FILE *stream, uint8_t flags)

regress/lib/libssl/handshake/handshake_table.c

303

fprintf(stream, "%s", flag2str(flags));

regress/lib/libssl/handshake/handshake_table.c

311

fprintf(stream, "%s%s", first ? "" : " | ",

regress/lib/libssl/handshake/handshake_table.c

319

fprint_entry(FILE *stream,

regress/lib/libssl/handshake/handshake_table.c

324

fprintf(stream, "\t[");

regress/lib/libssl/handshake/handshake_table.c

325

fprint_flags(stream, flags);

regress/lib/libssl/handshake/handshake_table.c

326

fprintf(stream, "] = {\n");

regress/lib/libssl/handshake/handshake_table.c

331

fprintf(stream, "\t\t%s,\n", mt2str(path[i]));

regress/lib/libssl/handshake/handshake_table.c

333

fprintf(stream, "\t},\n");

regress/lib/libz/utils_unittest.cc

139

z_stream stream;

regress/lib/libz/utils_unittest.cc

140

stream.zalloc = Z_NULL;

regress/lib/libz/utils_unittest.cc

141

stream.zfree = Z_NULL;

regress/lib/libz/utils_unittest.cc

145

int ret = deflateInit2(&stream, /*comp level*/ 2, /*method*/ Z_DEFLATED,

regress/lib/libz/utils_unittest.cc

150

stream.next_out = compressed.data();

regress/lib/libz/utils_unittest.cc

151

stream.avail_out = compressed.size();

regress/lib/libz/utils_unittest.cc

152

stream.next_in = src.data();

regress/lib/libz/utils_unittest.cc

153

stream.avail_in = src.size();

regress/lib/libz/utils_unittest.cc

154

ret = deflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

156

compressed.resize(compressed.size() - stream.avail_out);

regress/lib/libz/utils_unittest.cc

157

deflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

159

ret = inflateInit2(&stream, /*windowbits*/ -15);

regress/lib/libz/utils_unittest.cc

162

stream.next_in = compressed.data();

regress/lib/libz/utils_unittest.cc

163

stream.avail_in = compressed.size();

regress/lib/libz/utils_unittest.cc

164

stream.next_out = decompressed.data();

regress/lib/libz/utils_unittest.cc

1643

z_stream stream;

regress/lib/libz/utils_unittest.cc

1644

stream.zalloc = Z_NULL;

regress/lib/libz/utils_unittest.cc

1645

stream.zfree = Z_NULL;

regress/lib/libz/utils_unittest.cc

165

stream.avail_out = decompressed.size();

regress/lib/libz/utils_unittest.cc

1653

deflateInit2(&stream, level, Z_DEFLATED, windowBits, memLevel, strategy);

regress/lib/libz/utils_unittest.cc

1656

deflateBound(&stream, strlen(zDefaultCorruptionData)));

regress/lib/libz/utils_unittest.cc

1657

stream.next_out = compressed.data();

regress/lib/libz/utils_unittest.cc

1658

stream.avail_out = compressed.size();

regress/lib/libz/utils_unittest.cc

1659

stream.next_in = (uint8_t*)zDefaultCorruptionData;

regress/lib/libz/utils_unittest.cc

166

ret = inflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

1660

stream.avail_in = strlen(zDefaultCorruptionData);

regress/lib/libz/utils_unittest.cc

1661

ret = deflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

1663

size_t compressed_sz = compressed.size() - stream.avail_out;

regress/lib/libz/utils_unittest.cc

1664

deflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

1667

ret = inflateInit2(&stream, windowBits);

regress/lib/libz/utils_unittest.cc

1669

stream.next_in = compressed.data();

regress/lib/libz/utils_unittest.cc

1670

stream.avail_in = compressed_sz;

regress/lib/libz/utils_unittest.cc

1671

stream.next_out = decompressed.data();

regress/lib/libz/utils_unittest.cc

1672

stream.avail_out = decompressed.size();

regress/lib/libz/utils_unittest.cc

1673

ret = inflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

1675

inflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

168

EXPECT_EQ(0U, stream.avail_out);

regress/lib/libz/utils_unittest.cc

169

inflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

213

z_stream stream;

regress/lib/libz/utils_unittest.cc

214

stream.zalloc = Z_NULL;

regress/lib/libz/utils_unittest.cc

215

stream.zfree = Z_NULL;

regress/lib/libz/utils_unittest.cc

217

int ret = deflateInit2(&stream, /*comp level*/ 5, /*method*/ Z_DEFLATED,

regress/lib/libz/utils_unittest.cc

222

stream.next_out = compressed.data();

regress/lib/libz/utils_unittest.cc

223

stream.avail_out = compressed.size();

regress/lib/libz/utils_unittest.cc

224

stream.next_in = src.data();

regress/lib/libz/utils_unittest.cc

225

stream.avail_in = src.size();

regress/lib/libz/utils_unittest.cc

226

ret = deflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

228

compressed.resize(compressed.size() - stream.avail_out);

regress/lib/libz/utils_unittest.cc

229

deflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

231

ret = inflateInit2(&stream, /*windowbits*/ -15);

regress/lib/libz/utils_unittest.cc

234

stream.next_in = compressed.data();

regress/lib/libz/utils_unittest.cc

235

stream.avail_in = compressed.size();

regress/lib/libz/utils_unittest.cc

236

stream.next_out = decompressed.data();

regress/lib/libz/utils_unittest.cc

237

stream.avail_out = decompressed.size();

regress/lib/libz/utils_unittest.cc

238

ret = inflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

240

EXPECT_EQ(0U, stream.avail_out);

regress/lib/libz/utils_unittest.cc

241

inflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

340

z_stream stream;

regress/lib/libz/utils_unittest.cc

341

stream.zalloc = Z_NULL;

regress/lib/libz/utils_unittest.cc

342

stream.zfree = Z_NULL;

regress/lib/libz/utils_unittest.cc

345

int ret = deflateInit2(&stream, /*comp level*/ 5, /*method*/ Z_DEFLATED,

regress/lib/libz/utils_unittest.cc

351

stream.next_out = compressed;

regress/lib/libz/utils_unittest.cc

352

stream.avail_out = sizeof(compressed);

regress/lib/libz/utils_unittest.cc

355

ASSERT_GT(stream.avail_out, 0U);

regress/lib/libz/utils_unittest.cc

356

stream.next_in = (uint8_t*)&checkMatchCrashData[i];

regress/lib/libz/utils_unittest.cc

357

stream.avail_in = 1;

regress/lib/libz/utils_unittest.cc

358

ret = deflate(&stream, Z_NO_FLUSH);

regress/lib/libz/utils_unittest.cc

362

stream.next_in = NULL;

regress/lib/libz/utils_unittest.cc

363

stream.avail_in = 0;

regress/lib/libz/utils_unittest.cc

364

ASSERT_GT(stream.avail_out, 0U);

regress/lib/libz/utils_unittest.cc

365

ret = deflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

367

size_t compressed_sz = sizeof(compressed) - stream.avail_out;

regress/lib/libz/utils_unittest.cc

368

deflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

371

ret = inflateInit2(&stream, -15);

regress/lib/libz/utils_unittest.cc

373

stream.next_in = compressed;

regress/lib/libz/utils_unittest.cc

374

stream.avail_in = compressed_sz;

regress/lib/libz/utils_unittest.cc

375

stream.next_out = decompressed;

regress/lib/libz/utils_unittest.cc

376

stream.avail_out = sizeof(decompressed);

regress/lib/libz/utils_unittest.cc

377

ret = inflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

379

inflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

465

z_stream stream;

regress/lib/libz/utils_unittest.cc

466

stream.zalloc = Z_NULL;

regress/lib/libz/utils_unittest.cc

467

stream.zfree = Z_NULL;

regress/lib/libz/utils_unittest.cc

471

deflateInit2(&stream, level, Z_DEFLATED, windowBits, memLevel, strategy);

regress/lib/libz/utils_unittest.cc

474

stream.next_out = compressed.data();

regress/lib/libz/utils_unittest.cc

475

stream.avail_out = compressed.size();

regress/lib/libz/utils_unittest.cc

478

stream.next_in = &b;

regress/lib/libz/utils_unittest.cc

479

stream.avail_in = 1;

regress/lib/libz/utils_unittest.cc

480

ret = deflate(&stream, Z_NO_FLUSH);

regress/lib/libz/utils_unittest.cc

483

stream.next_in = Z_NULL;

regress/lib/libz/utils_unittest.cc

484

stream.avail_in = 0;

regress/lib/libz/utils_unittest.cc

485

ret = deflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

487

deflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

942

z_stream stream;

regress/lib/libz/utils_unittest.cc

943

stream.zalloc = Z_NULL;

regress/lib/libz/utils_unittest.cc

944

stream.zfree = Z_NULL;

regress/lib/libz/utils_unittest.cc

952

deflateInit2(&stream, level, Z_DEFLATED, windowBits, memLevel, strategy);

regress/lib/libz/utils_unittest.cc

955

deflateBound(&stream, strlen(zFixedCorruptionData)));

regress/lib/libz/utils_unittest.cc

956

stream.next_out = compressed.data();

regress/lib/libz/utils_unittest.cc

957

stream.avail_out = compressed.size();

regress/lib/libz/utils_unittest.cc

958

stream.next_in = (uint8_t*)zFixedCorruptionData;

regress/lib/libz/utils_unittest.cc

959

stream.avail_in = strlen(zFixedCorruptionData);

regress/lib/libz/utils_unittest.cc

960

ret = deflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

962

size_t compressed_sz = compressed.size() - stream.avail_out;

regress/lib/libz/utils_unittest.cc

963

deflateEnd(&stream);

regress/lib/libz/utils_unittest.cc

966

ret = inflateInit2(&stream, windowBits);

regress/lib/libz/utils_unittest.cc

968

stream.next_in = compressed.data();

regress/lib/libz/utils_unittest.cc

969

stream.avail_in = compressed_sz;

regress/lib/libz/utils_unittest.cc

970

stream.next_out = decompressed.data();

regress/lib/libz/utils_unittest.cc

971

stream.avail_out = decompressed.size();

regress/lib/libz/utils_unittest.cc

972

ret = inflate(&stream, Z_FINISH);

regress/lib/libz/utils_unittest.cc

974

inflateEnd(&stream);

sbin/dhcp6leased/dhcp6leased.h

277

FILE *stream;

sbin/dhcp6leased/parse.y

276

c = getc(file->stream);

sbin/dhcp6leased/parse.y

556

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

sbin/dhcp6leased/parse.y

562

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

sbin/dhcp6leased/parse.y

563

fclose(nfile->stream);

sbin/dhcp6leased/parse.y

573

fclose(nfile->stream);

sbin/dhcp6leased/parse.y

591

fclose(file->stream);

sbin/dhcpleased/parse.y

404

c = getc(file->stream);

sbin/dhcpleased/parse.y

58

FILE *stream;

sbin/dhcpleased/parse.y

684

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

sbin/dhcpleased/parse.y

689

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

sbin/dhcpleased/parse.y

690

fclose(nfile->stream);

sbin/dhcpleased/parse.y

700

fclose(nfile->stream);

sbin/dhcpleased/parse.y

718

fclose(file->stream);

sbin/iked/parse.y

1675

c = getc(file->stream);

sbin/iked/parse.y

1956

nfile->stream = stdin;

sbin/iked/parse.y

1963

} else if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

sbin/iked/parse.y

1969

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

sbin/iked/parse.y

1970

fclose(nfile->stream);

sbin/iked/parse.y

1980

fclose(nfile->stream);

sbin/iked/parse.y

1998

fclose(file->stream);

sbin/iked/parse.y

61

FILE *stream;

sbin/ipsecctl/parse.y

1140

if ((c = getc(file->stream)) == EOF) {

sbin/ipsecctl/parse.y

1149

while ((c = getc(file->stream)) == '\\') {

sbin/ipsecctl/parse.y

1150

next = getc(file->stream);

sbin/ipsecctl/parse.y

1162

c = getc(file->stream);

sbin/ipsecctl/parse.y

1391

nfile->stream = stdin;

sbin/ipsecctl/parse.y

1398

} else if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

sbin/ipsecctl/parse.y

1404

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

sbin/ipsecctl/parse.y

1405

fclose(nfile->stream);

sbin/ipsecctl/parse.y

1424

fclose(file->stream);

sbin/ipsecctl/parse.y

52

FILE *stream;

sbin/pfctl/parse.y

5643

c = getc(file->stream);

sbin/pfctl/parse.y

5944

nfile->stream = stdin;

sbin/pfctl/parse.y

5951

} else if ((nfile->stream = pfctl_fopen(nfile->name, "r")) == NULL) {

sbin/pfctl/parse.y

5957

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

sbin/pfctl/parse.y

5958

fclose(nfile->stream);

sbin/pfctl/parse.y

5968

fclose(nfile->stream);

sbin/pfctl/parse.y

5986

fclose(file->stream);

sbin/pfctl/parse.y

74

FILE *stream;

sbin/unwind/libunbound/services/listen_dnsport.c

3614

struct doq_stream* stream;

sbin/unwind/libunbound/services/listen_dnsport.c

3617

stream = (struct doq_stream*)node;

sbin/unwind/libunbound/services/listen_dnsport.c

3618

if(stream->in)

sbin/unwind/libunbound/services/listen_dnsport.c

3619

doq_table_quic_size_subtract(table, stream->inlen);

sbin/unwind/libunbound/services/listen_dnsport.c

3620

if(stream->out)

sbin/unwind/libunbound/services/listen_dnsport.c

3621

doq_table_quic_size_subtract(table, stream->outlen);

sbin/unwind/libunbound/services/listen_dnsport.c

3622

doq_table_quic_size_subtract(table, sizeof(*stream));

sbin/unwind/libunbound/services/listen_dnsport.c

3623

doq_stream_delete(stream);

sbin/unwind/libunbound/services/listen_dnsport.c

3840

doq_conn_add_stream(struct doq_conn* conn, struct doq_stream* stream)

sbin/unwind/libunbound/services/listen_dnsport.c

3842

(void)rbtree_insert(&conn->stream_tree, &stream->node);

sbin/unwind/libunbound/services/listen_dnsport.c

3847

doq_conn_del_stream(struct doq_conn* conn, struct doq_stream* stream)

sbin/unwind/libunbound/services/listen_dnsport.c

3849

(void)rbtree_delete(&conn->stream_tree, &stream->node);

sbin/unwind/libunbound/services/listen_dnsport.c

3856

struct doq_stream* stream = calloc(1, sizeof(*stream));

sbin/unwind/libunbound/services/listen_dnsport.c

3857

if(!stream)

sbin/unwind/libunbound/services/listen_dnsport.c

3859

stream->node.key = stream;

sbin/unwind/libunbound/services/listen_dnsport.c

3860

stream->stream_id = stream_id;

sbin/unwind/libunbound/services/listen_dnsport.c

3861

return stream;

sbin/unwind/libunbound/services/listen_dnsport.c

3864

void doq_stream_delete(struct doq_stream* stream)

sbin/unwind/libunbound/services/listen_dnsport.c

3866

if(!stream)

sbin/unwind/libunbound/services/listen_dnsport.c

3868

free(stream->in);

sbin/unwind/libunbound/services/listen_dnsport.c

3869

free(stream->out);

sbin/unwind/libunbound/services/listen_dnsport.c

3870

free(stream);

sbin/unwind/libunbound/services/listen_dnsport.c

3888

doq_stream_on_write_list(struct doq_conn* conn, struct doq_stream* stream)

sbin/unwind/libunbound/services/listen_dnsport.c

3890

if(stream->on_write_list)

sbin/unwind/libunbound/services/listen_dnsport.c

3892

stream->write_prev = conn->stream_write_last;

sbin/unwind/libunbound/services/listen_dnsport.c

3894

conn->stream_write_last->write_next = stream;

sbin/unwind/libunbound/services/listen_dnsport.c

3896

conn->stream_write_first = stream;

sbin/unwind/libunbound/services/listen_dnsport.c

3897

conn->stream_write_last = stream;

sbin/unwind/libunbound/services/listen_dnsport.c

3898

stream->write_next = NULL;

sbin/unwind/libunbound/services/listen_dnsport.c

3899

stream->on_write_list = 1;

sbin/unwind/libunbound/services/listen_dnsport.c

3904

doq_stream_off_write_list(struct doq_conn* conn, struct doq_stream* stream)

sbin/unwind/libunbound/services/listen_dnsport.c

3906

if(!stream->on_write_list)

sbin/unwind/libunbound/services/listen_dnsport.c

3908

if(stream->write_next)

sbin/unwind/libunbound/services/listen_dnsport.c

3909

stream->write_next->write_prev = stream->write_prev;

sbin/unwind/libunbound/services/listen_dnsport.c

3910

else conn->stream_write_last = stream->write_prev;

sbin/unwind/libunbound/services/listen_dnsport.c

3911

if(stream->write_prev)

sbin/unwind/libunbound/services/listen_dnsport.c

3912

stream->write_prev->write_next = stream->write_next;

sbin/unwind/libunbound/services/listen_dnsport.c

3913

else conn->stream_write_first = stream->write_next;

sbin/unwind/libunbound/services/listen_dnsport.c

3914

stream->write_prev = NULL;

sbin/unwind/libunbound/services/listen_dnsport.c

3915

stream->write_next = NULL;

sbin/unwind/libunbound/services/listen_dnsport.c

3916

stream->on_write_list = 0;

sbin/unwind/libunbound/services/listen_dnsport.c

3921

doq_stream_remove_in_buffer(struct doq_stream* stream, struct doq_table* table)

sbin/unwind/libunbound/services/listen_dnsport.c

3923

if(stream->in) {

sbin/unwind/libunbound/services/listen_dnsport.c

3924

doq_table_quic_size_subtract(table, stream->inlen);

sbin/unwind/libunbound/services/listen_dnsport.c

3925

free(stream->in);

sbin/unwind/libunbound/services/listen_dnsport.c

3926

stream->in = NULL;

sbin/unwind/libunbound/services/listen_dnsport.c

3927

stream->inlen = 0;

sbin/unwind/libunbound/services/listen_dnsport.c

3933

doq_stream_remove_out_buffer(struct doq_stream* stream,

sbin/unwind/libunbound/services/listen_dnsport.c

3936

if(stream->out) {

sbin/unwind/libunbound/services/listen_dnsport.c

3937

doq_table_quic_size_subtract(table, stream->outlen);

sbin/unwind/libunbound/services/listen_dnsport.c

3938

free(stream->out);

sbin/unwind/libunbound/services/listen_dnsport.c

3939

stream->out = NULL;

sbin/unwind/libunbound/services/listen_dnsport.c

3940

stream->outlen = 0;

sbin/unwind/libunbound/services/listen_dnsport.c

3945

doq_stream_close(struct doq_conn* conn, struct doq_stream* stream,

sbin/unwind/libunbound/services/listen_dnsport.c

3949

if(stream->is_closed)

sbin/unwind/libunbound/services/listen_dnsport.c

3951

stream->is_closed = 1;

sbin/unwind/libunbound/services/listen_dnsport.c

3952

doq_stream_off_write_list(conn, stream);

sbin/unwind/libunbound/services/listen_dnsport.c

3955

(int)stream->stream_id, (int)DOQ_APP_ERROR_CODE);

sbin/unwind/libunbound/services/listen_dnsport.c

3960

stream->stream_id, DOQ_APP_ERROR_CODE);

sbin/unwind/libunbound/services/listen_dnsport.c

3963

(int)stream->stream_id, ngtcp2_strerror(ret));

sbin/unwind/libunbound/services/listen_dnsport.c

3971

doq_stream_remove_in_buffer(stream, conn->doq_socket->table);

sbin/unwind/libunbound/services/listen_dnsport.c

3972

doq_stream_remove_out_buffer(stream, conn->doq_socket->table);

sbin/unwind/libunbound/services/listen_dnsport.c

3973

doq_table_quic_size_subtract(conn->doq_socket->table, sizeof(*stream));

sbin/unwind/libunbound/services/listen_dnsport.c

3974

doq_conn_del_stream(conn, stream);

sbin/unwind/libunbound/services/listen_dnsport.c

3975

doq_stream_delete(stream);

sbin/unwind/libunbound/services/listen_dnsport.c

3981

doq_stream_pickup_answer(struct doq_stream* stream, struct sldns_buffer* buf)

sbin/unwind/libunbound/services/listen_dnsport.c

3983

stream->is_answer_available = 1;

sbin/unwind/libunbound/services/listen_dnsport.c

3984

if(stream->out) {

sbin/unwind/libunbound/services/listen_dnsport.c

3985

free(stream->out);

sbin/unwind/libunbound/services/listen_dnsport.c

3986

stream->out = NULL;

sbin/unwind/libunbound/services/listen_dnsport.c

3987

stream->outlen = 0;

sbin/unwind/libunbound/services/listen_dnsport.c

3989

stream->nwrite = 0;

sbin/unwind/libunbound/services/listen_dnsport.c

3990

stream->outlen = sldns_buffer_limit(buf);

sbin/unwind/libunbound/services/listen_dnsport.c

3994

stream->outlen_wire = htons(stream->outlen);

sbin/unwind/libunbound/services/listen_dnsport.c

3995

stream->out = memdup(sldns_buffer_begin(buf), sldns_buffer_limit(buf));

sbin/unwind/libunbound/services/listen_dnsport.c

3996

if(!stream->out) {

sbin/unwind/libunbound/services/listen_dnsport.c

4004

doq_stream_send_reply(struct doq_conn* conn, struct doq_stream* stream,

sbin/unwind/libunbound/services/listen_dnsport.c

4011

(int)stream->stream_id, (s?s:"null"));

sbin/unwind/libunbound/services/listen_dnsport.c

4014

if(stream->out)

sbin/unwind/libunbound/services/listen_dnsport.c

4016

stream->outlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4017

if(!doq_stream_pickup_answer(stream, buf))

sbin/unwind/libunbound/services/listen_dnsport.c

4019

doq_table_quic_size_add(conn->doq_socket->table, stream->outlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4020

doq_stream_on_write_list(conn, stream);

sbin/unwind/libunbound/services/listen_dnsport.c

4028

doq_stream_datalen_complete(struct doq_stream* stream, struct doq_table* table)

sbin/unwind/libunbound/services/listen_dnsport.c

4030

if(stream->inlen > 1024*1024) {

sbin/unwind/libunbound/services/listen_dnsport.c

4032

(int)stream->inlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4035

stream->in = calloc(1, stream->inlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4036

if(!stream->in) {

sbin/unwind/libunbound/services/listen_dnsport.c

4041

doq_table_quic_size_add(table, stream->inlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4047

doq_stream_data_complete(struct doq_conn* conn, struct doq_stream* stream)

sbin/unwind/libunbound/services/listen_dnsport.c

4051

char* s = sldns_wire2str_pkt(stream->in, stream->inlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4056

a, (int)stream->stream_id, (s?s:"null"));

sbin/unwind/libunbound/services/listen_dnsport.c

4059

stream->is_query_complete = 1;

sbin/unwind/libunbound/services/listen_dnsport.c

4061

if(!stream->in) {

sbin/unwind/libunbound/services/listen_dnsport.c

4065

if(stream->inlen > sldns_buffer_capacity(c->buffer)) {

sbin/unwind/libunbound/services/listen_dnsport.c

4070

sldns_buffer_write(c->buffer, stream->in, stream->inlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4078

c->repinfo.doq_streamid = stream->stream_id;

sbin/unwind/libunbound/services/listen_dnsport.c

4083

if(!doq_stream_send_reply(conn, stream, c->buffer)) {

sbin/unwind/libunbound/services/listen_dnsport.c

4095

doq_stream_recv_data(struct doq_stream* stream, const uint8_t* data,

sbin/unwind/libunbound/services/listen_dnsport.c

4100

if(stream->nread < 2) {

sbin/unwind/libunbound/services/listen_dnsport.c

4102

size_t todolen = 2 - stream->nread;

sbin/unwind/libunbound/services/listen_dnsport.c

4104

if(stream->nread > 0) {

sbin/unwind/libunbound/services/listen_dnsport.c

4106

tcplen = stream->inlen;

sbin/unwind/libunbound/services/listen_dnsport.c

4110

memmove(((uint8_t*)&tcplen)+stream->nread, data, todolen);

sbin/unwind/libunbound/services/listen_dnsport.c

4111

stream->nread += todolen;

sbin/unwind/libunbound/services/listen_dnsport.c

4114

if(stream->nread == 2) {

sbin/unwind/libunbound/services/listen_dnsport.c

4116

stream->inlen = ntohs(tcplen);

sbin/unwind/libunbound/services/listen_dnsport.c

4117

if(!doq_stream_datalen_complete(stream, table))

sbin/unwind/libunbound/services/listen_dnsport.c

4121

stream->inlen = tcplen;

sbin/unwind/libunbound/services/listen_dnsport.c

4128

if(stream->nread-2 > stream->inlen) {

sbin/unwind/libunbound/services/listen_dnsport.c

4132

if(datalen > stream->inlen - (stream->nread-2))

sbin/unwind/libunbound/services/listen_dnsport.c

4133

to_write = stream->inlen - (stream->nread-2);

sbin/unwind/libunbound/services/listen_dnsport.c

4135

if(!stream->in) {

sbin/unwind/libunbound/services/listen_dnsport.c

4140

memmove(stream->in+(stream->nread-2), data, to_write);

sbin/unwind/libunbound/services/listen_dnsport.c

4141

stream->nread += to_write;

sbin/unwind/libunbound/services/listen_dnsport.c

4154

if(got_data && stream->nread >= stream->inlen+2) {

sbin/unwind/libunbound/services/listen_dnsport.c

4155

if(!stream->in) {

sbin/unwind/libunbound/services/listen_dnsport.c

4167

doq_stream_recv_fin(struct doq_conn* conn, struct doq_stream* stream, int

sbin/unwind/libunbound/services/listen_dnsport.c

4170

if(!stream->is_query_complete && !recv_done) {

sbin/unwind/libunbound/services/listen_dnsport.c

4173

((int)stream->nread)-2, (int)stream->inlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4174

if(!doq_stream_close(conn, stream, 1))

sbin/unwind/libunbound/services/listen_dnsport.c

4328

struct doq_stream* stream;

sbin/unwind/libunbound/services/listen_dnsport.c

4336

doq_conn->doq_socket->cfg, sizeof(*stream)

sbin/unwind/libunbound/services/listen_dnsport.c

4354

stream = doq_stream_create(stream_id);

sbin/unwind/libunbound/services/listen_dnsport.c

4355

if(!stream) {

sbin/unwind/libunbound/services/listen_dnsport.c

4359

doq_table_quic_size_add(doq_conn->doq_socket->table, sizeof(*stream));

sbin/unwind/libunbound/services/listen_dnsport.c

4360

doq_conn_add_stream(doq_conn, stream);

sbin/unwind/libunbound/services/listen_dnsport.c

4372

struct doq_stream* stream;

sbin/unwind/libunbound/services/listen_dnsport.c

4382

stream = doq_stream_find(doq_conn, stream_id);

sbin/unwind/libunbound/services/listen_dnsport.c

4383

if(!stream) {

sbin/unwind/libunbound/services/listen_dnsport.c

4388

if(stream->is_closed) {

sbin/unwind/libunbound/services/listen_dnsport.c

4393

if(!doq_stream_recv_data(stream, data, datalen, &recv_done,

sbin/unwind/libunbound/services/listen_dnsport.c

4398

if(!doq_stream_recv_fin(doq_conn, stream, recv_done))

sbin/unwind/libunbound/services/listen_dnsport.c

4405

if(!doq_stream_data_complete(doq_conn, stream))

sbin/unwind/libunbound/services/listen_dnsport.c

4418

struct doq_stream* stream;

sbin/unwind/libunbound/services/listen_dnsport.c

4429

stream = doq_stream_find(doq_conn, stream_id);

sbin/unwind/libunbound/services/listen_dnsport.c

4430

if(!stream) {

sbin/unwind/libunbound/services/listen_dnsport.c

4435

if(!doq_stream_close(doq_conn, stream, 0))

sbin/unwind/libunbound/services/listen_dnsport.c

4447

struct doq_stream* stream;

sbin/unwind/libunbound/services/listen_dnsport.c

4452

stream = doq_stream_find(doq_conn, stream_id);

sbin/unwind/libunbound/services/listen_dnsport.c

4453

if(!stream) {

sbin/unwind/libunbound/services/listen_dnsport.c

4458

if(!doq_stream_close(doq_conn, stream, 0))

sbin/unwind/libunbound/services/listen_dnsport.c

4470

struct doq_stream* stream;

sbin/unwind/libunbound/services/listen_dnsport.c

4474

stream = doq_stream_find(doq_conn, stream_id);

sbin/unwind/libunbound/services/listen_dnsport.c

4475

if(!stream) {

sbin/unwind/libunbound/services/listen_dnsport.c

4481

if(stream->is_closed)

sbin/unwind/libunbound/services/listen_dnsport.c

4483

if(offset+datalen >= stream->outlen) {

sbin/unwind/libunbound/services/listen_dnsport.c

4484

doq_stream_remove_in_buffer(stream,

sbin/unwind/libunbound/services/listen_dnsport.c

4486

doq_stream_remove_out_buffer(stream,

sbin/unwind/libunbound/services/listen_dnsport.c

5338

doq_stream_write_is_done(struct doq_conn* conn, struct doq_stream* stream)

sbin/unwind/libunbound/services/listen_dnsport.c

5341

doq_stream_off_write_list(conn, stream);

sbin/unwind/libunbound/services/listen_dnsport.c

5348

struct doq_stream* stream = conn->stream_write_first;

sbin/unwind/libunbound/services/listen_dnsport.c

5363

if(stream) {

sbin/unwind/libunbound/services/listen_dnsport.c

5366

(int)stream->stream_id);

sbin/unwind/libunbound/services/listen_dnsport.c

5367

stream_id = stream->stream_id;

sbin/unwind/libunbound/services/listen_dnsport.c

5369

if(stream->nwrite < 2) {

sbin/unwind/libunbound/services/listen_dnsport.c

5370

datav[0].base = ((uint8_t*)&stream->

sbin/unwind/libunbound/services/listen_dnsport.c

5371

outlen_wire) + stream->nwrite;

sbin/unwind/libunbound/services/listen_dnsport.c

5372

datav[0].len = 2 - stream->nwrite;

sbin/unwind/libunbound/services/listen_dnsport.c

5373

datav[1].base = stream->out;

sbin/unwind/libunbound/services/listen_dnsport.c

5374

datav[1].len = stream->outlen;

sbin/unwind/libunbound/services/listen_dnsport.c

5377

datav[0].base = stream->out +

sbin/unwind/libunbound/services/listen_dnsport.c

5378

(stream->nwrite-2);

sbin/unwind/libunbound/services/listen_dnsport.c

5379

datav[0].len = stream->outlen -

sbin/unwind/libunbound/services/listen_dnsport.c

5380

(stream->nwrite-2);

sbin/unwind/libunbound/services/listen_dnsport.c

5394

if(stream && stream->write_next)

sbin/unwind/libunbound/services/listen_dnsport.c

5407

if(stream) {

sbin/unwind/libunbound/services/listen_dnsport.c

5409

stream->nwrite += ndatalen;

sbin/unwind/libunbound/services/listen_dnsport.c

5410

if(stream->nwrite >= stream->outlen+2)

sbin/unwind/libunbound/services/listen_dnsport.c

5412

conn, stream);

sbin/unwind/libunbound/services/listen_dnsport.c

5413

stream = stream->write_next;

sbin/unwind/libunbound/services/listen_dnsport.c

5467

if(ndatalen >= 0 && stream) {

sbin/unwind/libunbound/services/listen_dnsport.c

5468

stream->nwrite += ndatalen;

sbin/unwind/libunbound/services/listen_dnsport.c

5469

if(stream->nwrite >= stream->outlen+2)

sbin/unwind/libunbound/services/listen_dnsport.c

5470

doq_stream_write_is_done(conn, stream);

sbin/unwind/libunbound/services/listen_dnsport.c

5486

if(stream)

sbin/unwind/libunbound/services/listen_dnsport.c

5487

stream = stream->write_next;

sbin/unwind/libunbound/services/listen_dnsport.h

777

void doq_stream_delete(struct doq_stream* stream);

sbin/unwind/libunbound/services/listen_dnsport.h

788

int doq_stream_close(struct doq_conn* conn, struct doq_stream* stream,

sbin/unwind/libunbound/services/listen_dnsport.h

792

int doq_stream_send_reply(struct doq_conn* conn, struct doq_stream* stream,

sbin/unwind/libunbound/util/netevent.c

2825

struct doq_conn** conn, struct doq_stream** stream)

sbin/unwind/libunbound/util/netevent.c

2841

*stream = NULL;

sbin/unwind/libunbound/util/netevent.c

2844

*stream = doq_stream_find(*conn, repinfo->doq_streamid);

sbin/unwind/libunbound/util/netevent.c

2845

if(!*stream) {

sbin/unwind/libunbound/util/netevent.c

2853

if((*stream)->is_closed) {

sbin/unwind/libunbound/util/netevent.c

2870

struct doq_stream* stream;

sbin/unwind/libunbound/util/netevent.c

2872

if(!doq_lookup_conn_stream(repinfo, repinfo->c, &conn, &stream)) {

sbin/unwind/libunbound/util/netevent.c

2879

if(!doq_stream_send_reply(conn, stream, repinfo->c->buffer))

sbin/unwind/libunbound/util/netevent.c

2880

doq_stream_close(conn, stream, 1);

sbin/unwind/libunbound/util/netevent.c

2901

struct doq_stream* stream;

sbin/unwind/libunbound/util/netevent.c

2903

if(!doq_lookup_conn_stream(repinfo, repinfo->c, &conn, &stream)) {

sbin/unwind/libunbound/util/netevent.c

2909

doq_stream_close(conn, stream, 1);

sbin/unwind/libunbound/util/netevent.c

928

int stream) {

sbin/unwind/libunbound/util/netevent.c

982

if(!stream) {

sbin/unwind/libunbound/util/proxy_protocol.c

112

(stream?PP2_PROT_STREAM:PP2_PROT_DGRAM);

sbin/unwind/libunbound/util/proxy_protocol.c

136

(stream?PP2_PROT_STREAM:PP2_PROT_DGRAM);

sbin/unwind/libunbound/util/proxy_protocol.c

92

int stream)

sbin/unwind/libunbound/util/proxy_protocol.h

165

int stream);

sbin/unwind/parse.y

468

c = getc(file->stream);

sbin/unwind/parse.y

48

FILE *stream;

sbin/unwind/parse.y

748

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

sbin/unwind/parse.y

753

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

sbin/unwind/parse.y

754

fclose(nfile->stream);

sbin/unwind/parse.y

764

fclose(nfile->stream);

sbin/unwind/parse.y

782

fclose(file->stream);

sys/ddb/db_ctf.c

657

z_stream stream;

sys/ddb/db_ctf.c

665

memset(&stream, 0, sizeof(stream));

sys/ddb/db_ctf.c

666

stream.next_in = (void *)buf;

sys/ddb/db_ctf.c

667

stream.avail_in = size;

sys/ddb/db_ctf.c

668

stream.next_out = data;

sys/ddb/db_ctf.c

669

stream.avail_out = len;

sys/ddb/db_ctf.c

671

if ((error = inflateInit(&stream)) != Z_OK) {

sys/ddb/db_ctf.c

676

if ((error = inflate(&stream, Z_FINISH)) != Z_STREAM_END) {

sys/ddb/db_ctf.c

678

inflateEnd(&stream);

sys/ddb/db_ctf.c

682

if ((error = inflateEnd(&stream)) != Z_OK) {

sys/ddb/db_ctf.c

687

if (stream.total_out != len) {

sys/ddb/db_ctf.c

689

stream.total_out, len);

sys/dev/pci/azalia.c

4122

stream_t *stream;

sys/dev/pci/azalia.c

4126

stream = dir == AUMODE_PLAY ? &az->pstream : &az->rstream;

sys/dev/pci/azalia.c

4127

err = azalia_alloc_dmamem(az, size, 128, &stream->buffer);

sys/dev/pci/azalia.c

4132

return stream->buffer.addr;

sys/dev/pci/azalia.c

4139

stream_t *stream;

sys/dev/pci/azalia.c

4143

stream = &az->pstream;

sys/dev/pci/azalia.c

4145

stream = &az->rstream;

sys/dev/pci/azalia.c

4149

azalia_free_dmamem(az, &stream->buffer);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10007

&acrtc_state->stream->gamut_remap_matrix;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10009

&acrtc_state->stream->csc_color_matrix;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10011

&acrtc_state->stream->out_transfer_func;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10013

(struct dc_3dlut *) acrtc_state->stream->lut3d_func;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10015

(struct dc_transfer_func *) acrtc_state->stream->func_shaper;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10018

acrtc_state->stream->abm_level = acrtc_state->abm_level;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10024

if (acrtc_state->stream->link->replay_settings.replay_allow_active)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10025

amdgpu_dm_replay_disable(acrtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10026

if (acrtc_state->stream->link->psr_settings.psr_allow_active)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10027

amdgpu_dm_psr_disable(acrtc_state->stream, true);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10039

dm->dc, acrtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10047

acrtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10147

if (!new_dm_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10150

status = dc_stream_get_status(new_dm_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10185

dc_stream_remove_writeback(dm->dc, crtc_state->stream, 0);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10241

dc_stream_release(dm_old_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10271

dc_stream_program_cursor_position(dm_old_crtc_state->stream, &position);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10276

if (dm_new_crtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10278

dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10285

if (amdgpu_dm_crtc_modeset_required(new_crtc_state, dm_new_crtc_state->stream, dm_old_crtc_state->stream)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10291

if (!dm_new_crtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10313

if (dm_old_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10314

remove_stream(adev, acrtc, dm_old_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10328

if (dm_old_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10329

remove_stream(adev, acrtc, dm_old_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10359

if (dm_new_crtc_state->stream != NULL) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10361

dc_stream_get_status(dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10365

dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10369

dm_new_crtc_state->stream, acrtc);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10425

if (dm->dc->current_state->res_ctx.pipe_ctx[i].stream == crtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10483

dc_stream_add_writeback(dm->dc, crtc_state->stream, wb_info);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10556

if (dm_new_crtc_state && dm_new_crtc_state->stream == NULL &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10624

if (dm_new_crtc_state->base.active && dm_new_crtc_state->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10706

(dm_old_crtc_state->stream->output_color_space !=

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10707

get_output_color_space(&dm_new_crtc_state->stream->timing, new_con_state)))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10719

stream_update.stream = dm_new_crtc_state->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10722

dm_new_con_state, dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10724

stream_update.src = dm_new_crtc_state->stream->src;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10725

stream_update.dst = dm_new_crtc_state->stream->dst;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10729

dm_new_crtc_state->stream->output_color_space

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10730

= get_output_color_space(&dm_new_crtc_state->stream->timing, new_con_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10732

stream_update.output_color_space = &dm_new_crtc_state->stream->output_color_space;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10736

dm_new_crtc_state->stream->abm_level = dm_new_crtc_state->abm_level;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10746

status = dc_stream_get_status(dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10774

dm_new_crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10812

dc_stream_retain(dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10813

acrtc->dm_irq_params.stream = dm_new_crtc_state->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10863

if (dm_new_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11034

if (!acrtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11042

if (acrtc_state->stream->sink != aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11117

new_crtc_state->stream->ignore_msa_timing_param = true;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11250

dm_old_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11290

dm_new_crtc_state->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11294

if (dm_new_crtc_state->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11295

dc_is_stream_unchanged(new_stream, dm_old_crtc_state->stream) &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11296

dc_is_stream_scaling_unchanged(new_stream, dm_old_crtc_state->stream)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11320

if (!dm_old_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11330

if (amdgpu_freesync_vid_mode && dm_new_crtc_state->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11331

dc_is_stream_unchanged(new_stream, dm_old_crtc_state->stream) &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11332

dc_is_stream_scaling_unchanged(new_stream, dm_old_crtc_state->stream) &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11364

dm_old_crtc_state->stream) != DC_OK) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11369

dc_stream_release(dm_old_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11370

dm_new_crtc_state->stream = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11389

dm_old_crtc_state->stream)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11391

WARN_ON(dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11397

dm_new_crtc_state->stream = new_stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11407

dm_new_crtc_state->stream) != DC_OK) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11435

BUG_ON(dm_new_crtc_state->stream == NULL);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11441

&new_crtc_state->mode, dm_new_conn_state, dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11810

if (!dm_old_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11822

dm_old_crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11848

if (!dm_new_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11894

dm_new_crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

274

if (!acrtc->dm_irq_params.stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

280

return dc_stream_get_vblank_counter(acrtc->dm_irq_params.stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

295

if (!acrtc->dm_irq_params.stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

308

dc_stream_get_scanoutpos(acrtc->dm_irq_params.stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3093

struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3095

del_streams[del_streams_count++] = stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3168

if (dm_new_crtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3169

WARN_ON(kref_read(&dm_new_crtc_state->stream->refcount) > 1);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3170

dc_stream_release(dm_new_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3171

dm_new_crtc_state->stream = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3367

bundle->stream_update.stream = dc_state->streams[k];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

367

if (new_state->stream->adjust.timing_adjust_pending)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

411

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

426

stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

478

!dc_stream_get_scanoutpos(amdgpu_crtc->dm_irq_params.stream, &v_blank_start,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

538

struct dc_stream_state *stream = work->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

542

dc_stream_adjust_vmin_vmax(adev->dm.dc, stream, adjust);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

545

dc_stream_release(stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

551

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

567

dc_stream_retain(stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

572

offload_work->stream = stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

615

if (vrr_active && acrtc->dm_irq_params.stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

616

bool replay_en = acrtc->dm_irq_params.stream->link->replay_settings.replay_feature_enabled;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

617

bool psr_en = acrtc->dm_irq_params.stream->link->psr_settings.psr_feature_enabled;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

628

acrtc->dm_irq_params.stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

633

acrtc->dm_irq_params.stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6373

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6387

dst.width = stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6388

dst.height = stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6407

dst.x = (stream->timing.h_addressable - dst.width) / 2;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6408

dst.y = (stream->timing.v_addressable - dst.height) / 2;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6418

stream->src = src;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6419

stream->dst = dst;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6610

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6617

struct dc_crtc_timing *timing_out = &stream->timing;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6636

&& stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6647

&& stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6672

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6713

stream->out_transfer_func.type = TF_TYPE_PREDEFINED;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6714

stream->out_transfer_func.tf = TRANSFER_FUNCTION_SRGB;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6715

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6724

stream->output_color_space = get_output_color_space(timing_out, connector_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6725

stream->content_type = get_output_content_type(connector_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

677

struct dc_stream_state *stream = acrtc->dm_irq_params.stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

679

v_total = stream->adjust.v_total_max ?

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

680

stream->adjust.v_total_max : stream->timing.v_total;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

681

refresh_hz = div_u64((uint64_t) stream->timing.pix_clk_100hz *

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

682

100LL, (v_total * stream->timing.h_total));

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6829

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6833

if (stream->triggered_crtc_reset.enabled) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6834

master = stream->triggered_crtc_reset.event_source;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6835

stream->triggered_crtc_reset.event =

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6838

stream->triggered_crtc_reset.delay = TRIGGER_DELAY_NEXT_PIXEL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6868

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

687

acrtc->dm_irq_params.stream, 0);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6885

stream = context->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6887

if (!stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6890

set_multisync_trigger_params(stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7009

struct dc_sink *sink, struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7012

stream->timing.flags.DSC = 0;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7027

struct dc_sink *sink, struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7042

verified_link_cap = dc_link_get_link_cap(stream->link);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7043

link_bw_in_kbps = dc_link_bandwidth_kbps(stream->link, verified_link_cap);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7057

&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7066

&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7069

stream->timing.dsc_cfg = dsc_cfg;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7070

stream->timing.flags.DSC = 1;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7071

stream->timing.dsc_cfg.bits_per_pixel = edp_max_bpp_x16;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7081

&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7084

stream->timing.dsc_cfg = dsc_cfg;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7085

stream->timing.flags.DSC = 1;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7090

struct dc_sink *sink, struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7116

apply_dsc_policy_for_edp(aconnector, sink, stream, dsc_caps, max_dsc_target_bpp_limit_override);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7124

&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7126

&stream->timing.dsc_cfg)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7127

stream->timing.flags.DSC = 1;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7132

timing_bw_in_kbps = dc_bandwidth_in_kbps_from_timing(&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7144

&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7146

&stream->timing.dsc_cfg)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7147

stream->timing.flags.DSC = 1;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7156

stream->timing.flags.DSC = 1;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7158

if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_num_slices_h)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7159

stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7161

if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_num_slices_v)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7162

stream->timing.dsc_cfg.num_slices_v = aconnector->dsc_settings.dsc_num_slices_v;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7164

if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_bits_per_pixel)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7165

stream->timing.dsc_cfg.bits_per_pixel = aconnector->dsc_settings.dsc_bits_per_pixel;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7180

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

721

if (acrtc->dm_irq_params.stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7215

return stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7222

stream = dc_create_stream_for_sink(sink);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7224

if (stream == NULL) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

723

bool replay_en = acrtc->dm_irq_params.stream->link->replay_settings.replay_feature_enabled;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7230

stream->dm_stream_context = aconnector;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7232

stream->timing.flags.LTE_340MCSC_SCRAMBLE =

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

724

bool psr_en = acrtc->dm_irq_params.stream->link->psr_settings.psr_feature_enabled;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

728

acrtc->dm_irq_params.stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7284

stream, &mode, connector, con_state, NULL,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7288

stream, &mode, connector, con_state, old_stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7298

stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7300

stream->timing = *aconnector->timing_requested;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7305

update_dsc_caps(aconnector, sink, stream, &dsc_caps);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7307

apply_dsc_policy_for_stream(aconnector, sink, stream, &dsc_caps);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7310

update_stream_scaling_settings(&mode, dm_state, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7313

&stream->audio_info,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7317

update_stream_signal(stream, sink);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7319

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7320

mod_build_hf_vsif_infopacket(stream, &stream->vsp_infopacket);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7322

if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT ||

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7323

stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST ||

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7324

stream->signal == SIGNAL_TYPE_EDP) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

733

schedule_dc_vmin_vmax(adev, acrtc->dm_irq_params.stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7337

stream->use_vsc_sdp_for_colorimetry = stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7338

stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7341

if (stream->out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7343

mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7350

return stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7827

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7833

if (!stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7845

dc_plane_state->src_rect.height = stream->src.height;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7846

dc_plane_state->src_rect.width = stream->src.width;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7847

dc_plane_state->dst_rect.height = stream->src.height;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7848

dc_plane_state->dst_rect.width = stream->src.width;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7849

dc_plane_state->clip_rect.height = stream->src.height;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7850

dc_plane_state->clip_rect.width = stream->src.width;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7851

dc_plane_state->plane_size.surface_pitch = ((stream->src.width + 255) / 256) * 256;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7852

dc_plane_state->plane_size.surface_size.height = stream->src.height;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7853

dc_plane_state->plane_size.surface_size.width = stream->src.width;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7854

dc_plane_state->plane_size.chroma_size.height = stream->src.height;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7855

dc_plane_state->plane_size.chroma_size.width = stream->src.width;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7862

dc_result = dc_validate_stream(dc, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7867

dc_result = dc_state_add_stream(dc, dc_state, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7871

stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7897

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7916

stream = create_stream_for_sink(connector, drm_mode,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7919

if (stream == NULL) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7924

dc_result = dc_validate_stream(adev->dm.dc, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7927

return stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7929

if (dc_result == DC_OK && stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7930

dc_result = dm_dp_mst_is_port_support_mode(aconnector, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7933

dc_result = dm_validate_stream_and_context(adev->dm.dc, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7940

dc_pixel_encoding_to_str(stream->timing.pixel_encoding),

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7941

dc_color_depth_to_str(stream->timing.display_color_depth),

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7944

dc_stream_release(stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7945

stream = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7949

} while (stream == NULL && requested_bpc >= bpc_limit);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7975

stream = create_validate_stream_for_sink(connector, drm_mode,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7988

return stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7998

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8030

stream = create_validate_stream_for_sink(connector, test_mode,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8034

if (stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8035

dc_stream_release(stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8303

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8327

stream = dc_state->streams[j];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8328

if (!stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8331

if ((struct amdgpu_dm_connector *)stream->dm_stream_context == aconnector)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8334

stream = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8337

if (!stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8340

pbn_div = dm_mst_get_pbn_divider(stream->link);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8354

if (stream->timing.flags.DSC != 1) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9105

timing = &acrtc_state->stream->timing;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9124

if (acrtc_state->stream->link->psr_settings.psr_version <

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9338

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9410

new_crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9464

struct dc_stream_state *new_stream = new_crtc_state->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9598

if (crtc_state && crtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9599

dc_stream_set_cursor_position(crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9601

update->cursor_position = &crtc_state->stream->cursor_position;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9628

if (crtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9629

if (!dc_stream_set_cursor_attributes(crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9633

update->cursor_attributes = &crtc_state->stream->cursor_attributes;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9635

if (!dc_stream_set_cursor_position(crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9639

update->cursor_position = &crtc_state->stream->cursor_position;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9647

struct psr_settings *psr = &acrtc_state->stream->link->psr_settings;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9648

struct replay_settings *pr = &acrtc_state->stream->link->replay_settings;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9650

(struct amdgpu_dm_connector *)acrtc_state->stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9655

amdgpu_dm_link_setup_replay(acrtc_state->stream->link, aconn);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9659

amdgpu_dm_link_setup_psr(acrtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9685

amdgpu_dm_replay_enable(acrtc_state->stream, true);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9688

amdgpu_dm_psr_enable(acrtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9746

if (!dc_stream_set_cursor_position(acrtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9751

&acrtc_state->stream->cursor_position;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9832

if (acrtc_state->stream->link->psr_settings.psr_feature_enabled ||

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9833

acrtc_state->stream->link->replay_settings.replay_feature_enabled) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9837

acrtc_state->stream->link->psr_settings.psr_version ==

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9847

if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9854

acrtc_state->stream->link->psr_settings.psr_dirty_rects_change_timestamp_ns =

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9856

if (acrtc_state->stream->link->psr_settings.psr_allow_active)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9857

amdgpu_dm_psr_disable(acrtc_state->stream, true);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9897

acrtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9970

if (acrtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9973

&acrtc_state->stream->vrr_infopacket;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9987

acrtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9995

bundle->stream_update.stream = acrtc_state->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9997

bundle->stream_update.src = acrtc_state->stream->src;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9998

bundle->stream_update.dst = acrtc_state->stream->dst;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h

142

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h

170

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h

954

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1017

struct dc_stream_state *stream = crtc->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1038

__drm_ctm_to_dc_matrix(ctm, stream->gamut_remap_matrix.matrix);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1040

stream->gamut_remap_matrix.enable_remap = true;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1041

stream->csc_color_matrix.enable_adjustment = false;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1044

stream->gamut_remap_matrix.enable_remap = false;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1045

stream->csc_color_matrix.enable_adjustment = false;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

910

struct dc_stream_state *stream = crtc->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

947

out_tf = &stream->out_transfer_func;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

295

static void amdgpu_dm_set_crc_window_default(struct drm_crtc *crtc, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

325

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

329

dc_stream_forward_multiple_crc_window(stream, NULL, phy_id, true);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

331

dc_stream_forward_crc_window(stream, NULL, phy_id, true);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

344

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

368

stream = to_amdgpu_crtc(crtc)->dm_irq_params.stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

369

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

426

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

439

stream = to_amdgpu_crtc(crtc)->dm_irq_params.stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

440

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

459

dc_stream_forward_multiple_crc_window(stream, roi_cpy,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

462

dc_stream_forward_crc_window(stream, &roi_cpy[0].rect,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

502

struct dc_stream_state *stream_state = dm_crtc_state->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

666

amdgpu_dm_set_crc_window_default(crtc, crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

737

stream_state = crtc_state->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

795

stream_state = to_dm_crtc_state(crtc->state)->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

131

struct dc_link *link = vblank_work->stream->link;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

144

amdgpu_dm_replay_enable(vblank_work->stream, true);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

147

amdgpu_dm_psr_disable(vblank_work->stream, false);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

152

(struct amdgpu_dm_connector *) vblank_work->stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

157

amdgpu_dm_psr_enable(vblank_work->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

272

if (vblank_work->stream && vblank_work->stream->link && vblank_work->acrtc) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

285

dc_stream_release(vblank_work->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

312

struct psr_settings *psr = &acrtc_state->stream->link->psr_settings;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

313

struct replay_settings *pr = &acrtc_state->stream->link->replay_settings;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

404

if (acrtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

405

dc_stream_retain(acrtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

406

work->stream = acrtc_state->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

431

if (cur->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

432

dc_stream_release(cur->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

456

if (cur->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

457

state->stream = cur->stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

458

dc_stream_retain(state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

638

if (!dm_new_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

666

if (WARN_ON(unlikely(!dm_crtc_state->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

667

amdgpu_dm_crtc_modeset_required(crtc_state, NULL, dm_crtc_state->stream)))) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

705

if (!dm_crtc_state->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

708

if (dc_validate_stream(dc, dm_crtc_state->stream) == DC_OK)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1101

if (dm_crtc_state->stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1104

switch (dm_crtc_state->stream->timing.display_color_depth) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1152

if (dm_crtc_state->stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1155

switch (dm_crtc_state->stream->output_color_space) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1297

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1298

pipe_ctx->stream->link == link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1348

dc_stream_send_dp_sdp(acrtc_state->stream, data, write_size);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1573

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1574

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1575

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1576

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1675

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1676

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1677

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1678

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1682

if (!pipe_ctx->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1701

if (dm_crtc_state->stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1759

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1760

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1761

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1762

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1859

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1860

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1861

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1862

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1866

if (!pipe_ctx->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1885

if (dm_crtc_state->stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1890

pipe_ctx->stream->timing.h_addressable,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1943

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1944

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1945

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1946

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2043

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2044

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2045

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2046

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2050

if (!pipe_ctx->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2069

if (dm_crtc_state->stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2074

pipe_ctx->stream->timing.v_addressable,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2123

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2124

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2125

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2126

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2220

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2221

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2222

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2223

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2227

if (!pipe_ctx->stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2246

if (dm_crtc_state->stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2298

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2299

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2300

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2301

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2352

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2353

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2354

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2355

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2421

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2422

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2423

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2424

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2490

if (pipe_ctx->stream &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2491

pipe_ctx->stream->link == aconnector->dc_link &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2492

pipe_ctx->stream->sink &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2493

pipe_ctx->stream->sink == aconnector->dc_sink)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3730

amdgpu_dm_psr_disable(acrtc->dm_irq_params.stream, true);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1186

void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1189

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1203

(stream->ignore_msa_timing_param) ? 1 : 0;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1231

if (pipes[i].stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1234

if (pipes[i].stream->link == link && !pipes[i].top_pipe &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1302

&& pipe_ctx->stream->timing.display_color_depth != requestColorDepth)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1304

&& pipe_ctx->stream->timing.pixel_encoding != requestPixelEncoding)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1307

pipe_ctx->stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1308

pipe_ctx->stream->timing.pixel_encoding,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1311

pipe_ctx->stream->timing.display_color_depth = requestColorDepth;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1312

pipe_ctx->stream->timing.pixel_encoding = requestPixelEncoding;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1319

*aconnector->timing_requested = pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1325

pipe_ctx->stream->test_pattern.type = test_pattern;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1326

pipe_ctx->stream->test_pattern.color_space = test_pattern_color_space;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1408

bool dm_helpers_is_fullscreen(struct dc_context *ctx, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1414

bool dm_helpers_is_hdr_on(struct dc_context *ctx, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

268

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

277

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

310

fill_dc_mst_payload_table_from_drm(stream->link, enable, target_payload, proposed_table);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

337

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

343

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

363

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

373

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

397

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

406

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

791

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

804

if (!stream->link->link_status.link_active &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

805

memcmp(stream->link->dpcd_caps.branch_dev_name,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

817

if (!stream->link->link_status.link_active) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

828

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

836

(struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

843

if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

851

aconnector->dsc_aux, stream, enable_dsc);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

892

if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT || stream->signal == SIGNAL_TYPE_EDP) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

893

if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

894

ret = dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

898

} else if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

899

ret = dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

909

bool dm_helpers_dp_write_hblank_reduction(struct dc_context *ctx, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h

35

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1193

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1213

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1215

if (stream->link != dc_link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1218

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1229

__func__, __LINE__, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1233

stream->timing.flags.DSC = 0;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1235

params[count].timing = &stream->timing;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1236

params[count].sink = stream->sink;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1245

params[count].compression_possible = stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1246

dc_dsc_get_policy_for_timing(params[count].timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link));

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1248

stream->sink->ctx->dc->res_pool->dscs[0],

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1249

stream->sink->ctx->dc->debug.dsc_min_slice_height_override,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1252

&stream->sink->dsc_caps.dsc_dec_caps,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1253

&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1256

params[count].bw_range.stream_kbps = dc_bandwidth_in_kbps_from_timing(&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1260

count, stream, params[count].bw_range.max_kbps, params[count].bw_range.min_kbps,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1360

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1383

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1384

if (!stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1387

DRM_DEBUG_DRIVER("%s:%d MST_DSC checking #%d stream 0x%p\n", __func__, __LINE__, i, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1390

if (stream->link != dc_link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1393

aconnector = (struct amdgpu_dm_connector *) stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1403

__func__, __LINE__, stream, aconnector);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1416

__func__, __LINE__, stream, aconnector);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1428

__func__, __LINE__, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1449

stream = dc->current_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1451

if (stream->link != dc_link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1454

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1469

__func__, __LINE__, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1487

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1499

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1500

res_pool = stream->ctx->dc->res_pool;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1502

if (stream->signal != SIGNAL_TYPE_DISPLAY_PORT_MST)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1505

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1508

__func__, stream, aconnector);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1520

res_pool->funcs->remove_stream_from_ctx(stream->ctx->dc, dc_state, stream) != DC_OK)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1523

if (!is_dsc_need_re_compute(state, dc_state, stream->link))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1527

ret = compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars, mst_mgr,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1533

if (dc_state->streams[j]->link == stream->link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1539

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1541

if (stream->timing.flags.DSC == 1)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1542

if (dc_stream_add_dsc_to_resource(stream->ctx->dc, dc_state, stream) != DC_OK) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1544

__func__, __LINE__, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1557

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1568

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1570

if (stream->signal != SIGNAL_TYPE_DISPLAY_PORT_MST)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1573

aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1576

i, stream, aconnector);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1587

if (!is_dsc_need_re_compute(state, dc_state, stream->link))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1591

ret = compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars, mst_mgr,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1597

if (dc_state->streams[j]->link == stream->link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1606

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1615

if (dm_state->stream == stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1650

if (dm_crtc_state->stream && dm_crtc_state->stream->link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1651

if (is_link_to_dschub(dm_crtc_state->stream->link))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1689

struct dc_stream_state *stream = dm_state->context->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1690

int ind = find_crtc_index_in_state_by_stream(state, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1714

dm_old_crtc_state->stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1738

struct dc_stream_state *stream = dm_state->context->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1741

dc_is_timing_changed(stream, local_dc_state->streams[i])) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1744

int ind = find_crtc_index_in_state_by_stream(state, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1750

__func__, __LINE__, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1757

struct dc_stream_state *stream = dm_state->context->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1759

if (local_dc_state->streams[i] != stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1780

static bool is_dsc_common_config_possible(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1786

dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link));

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1787

is_dsc_possible = dc_dsc_compute_bandwidth_range(stream->sink->ctx->dc->res_pool->dscs[0],

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1788

stream->sink->ctx->dc->debug.dsc_min_slice_height_override,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1791

&stream->sink->dsc_caps.dsc_dec_caps,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1792

&stream->timing, dc_link_get_highest_encoding_format(stream->link), bw_range);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1858

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1874

dc_bandwidth_in_kbps_from_timing(&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1875

dc_link_get_highest_encoding_format(stream->link));

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1876

cur_link_settings = stream->link->verified_link_cap;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1892

if (is_dsc_common_config_possible(stream, &bw_range)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1946

dc_dsc_get_default_config_option(stream->link->dc, &dsc_options);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1948

if (dc_dsc_compute_config(stream->sink->ctx->dc->res_pool->dscs[0],

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1949

&stream->sink->dsc_caps.dsc_dec_caps,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1952

&stream->timing,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1953

dc_link_get_highest_encoding_format(stream->link),

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1954

&stream->timing.dsc_cfg)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1955

stream->timing.flags.DSC = 1;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1963

switch (stream->timing.pixel_encoding) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1979

((stream->timing.pix_clk_100hz / 10) > branch_max_throughput_mps * 1000)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h

95

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1365

if (crtc_state && crtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1367

dc_stream_program_cursor_position(crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1396

if (crtc_state->stream) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1398

if (!dc_stream_program_cursor_attributes(crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1402

if (!dc_stream_program_cursor_position(crtc_state->stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

106

if (stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

109

link = stream->link;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

113

mod_power_calc_psr_configs(&psr_config, link, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

118

mod_power_only_edp(dc->current_state, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

123

if (!psr_su_set_dsc_slice_height(dc, link, stream, &psr_config))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

127

ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

140

void amdgpu_dm_psr_enable(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

142

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

156

stream->timing.pix_clk_100hz * (uint64_t)100),

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

157

stream->timing.v_total),

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

158

stream->timing.h_total);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

176

&stream, 1,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

199

bool amdgpu_dm_psr_disable(struct dc_stream_state *stream, bool wait)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

205

return dc_link_set_psr_allow_active(stream->link, &psr_enable, wait, false, NULL);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

234

struct dc_stream_state *stream = dm->dc->current_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

236

link = stream->link;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

257

bool amdgpu_dm_psr_wait_disable(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

260

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

98

bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h

36

void amdgpu_dm_psr_enable(struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h

37

bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h

38

bool amdgpu_dm_psr_disable(struct dc_stream_state *stream, bool wait);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h

41

bool amdgpu_dm_psr_wait_disable(struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

153

bool amdgpu_dm_replay_enable(struct dc_stream_state *stream, bool wait)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

158

if (stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

161

link = stream->link;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

164

link->dc->link_srv->edp_setup_replay(link, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

165

link->dc->link_srv->edp_set_coasting_vtotal(link, stream->timing.v_total);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

180

bool amdgpu_dm_replay_disable(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

185

if (stream == NULL)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

188

link = stream->link;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

192

link->dc->link_srv->edp_set_replay_allow_active(stream->link, &replay_active, true, false, NULL);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.h

43

bool amdgpu_dm_replay_enable(struct dc_stream_state *stream, bool enable);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.h

46

bool amdgpu_dm_replay_disable(struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

386

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

389

TP_ARGS(pipe_idx, plane_state, stream, plane_res, update_flags),

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

393

__field(const void *, stream)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

425

__entry->stream = stream;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

426

__entry->stream_w = stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

427

__entry->stream_h = stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

459

__entry->stream,

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2803

if (!pipe[i].stream || !pipe[i].bottom_pipe)

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2822

data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2823

data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2824

data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->timing.pix_clk_100hz, 10000);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2915

if (!pipe[i].stream || pipe[i].bottom_pipe)

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2921

data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2922

data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2923

pixel_clock_100hz = pipe[i].stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2924

if (pipe[i].stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2976

} else if (pipe[i].stream->dst.width != 0 &&

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2977

pipe[i].stream->dst.height != 0 &&

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2978

pipe[i].stream->src.width != 0 &&

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2979

pipe[i].stream->src.height != 0) {

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2980

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->src.width);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2982

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->src.height);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2983

data->h_taps[num_displays + 4] = pipe[i].stream->src.width == pipe[i].stream->dst.width ? bw_int_to_fixed(1) : bw_int_to_fixed(2);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2984

data->v_taps[num_displays + 4] = pipe[i].stream->src.height == pipe[i].stream->dst.height ? bw_int_to_fixed(1) : bw_int_to_fixed(2);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2985

data->h_scale_ratio[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->src.width, pipe[i].stream->dst.width);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2986

data->v_scale_ratio[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->src.height, pipe[i].stream->dst.height);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2990

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_addressable);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

2992

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_addressable);

sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c

3027

active_pipes[0]->stream, active_pipes[i]->stream)) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/clk_mgr.c

61

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/clk_mgr.c

67

if (dc_state_get_stream_subvp_type(context, stream) == SUBVP_PHANTOM)

sys/dev/pci/drm/amd/display/dc/clk_mgr/clk_mgr.c

70

if (!stream->dpms_off || dc->is_switch_in_progress_dest || (stream_status && stream_status->plane_count))

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

173

if (pipe_ctx->stream == NULL)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

186

if (dc_is_dp_signal(pipe_ctx->stream->signal) &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

101

uint32_t vertical_total_min = stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

102

struct dc_crtc_timing_adjust adjust = stream->adjust;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

106

vertical_blank_in_pixels = stream->timing.h_total *

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

108

- stream->timing.v_addressable);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

110

* 10000 / stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

135

const struct dc_stream_state *stream = context->streams[j];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

141

if (stream == context->res_ctx.pipe_ctx[k].stream) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

149

if (stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

153

cfg->signal = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

155

cfg->src_height = stream->src.height;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

156

cfg->src_width = stream->src.width;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

158

stream->link->ddi_channel_mapping.raw;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

160

stream->link->link_enc->transmitter;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

162

stream->link->cur_link_settings.lane_count;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

164

stream->link->cur_link_settings.link_rate;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

166

stream->link->cur_link_settings.link_spread;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

167

cfg->pixel_clock = stream->phy_pix_clk;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

169

cfg->v_refresh = stream->timing.pix_clk_100hz * 100;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

170

cfg->v_refresh /= stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

171

cfg->v_refresh = (cfg->v_refresh + stream->timing.v_total / 2)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

172

/ stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

98

struct dc_stream_state *stream = context->streams[j];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

62

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

64

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

65

stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

66

stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

71

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

73

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

74

stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

75

stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

124

if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

85

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

87

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

88

stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

89

stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

93

if (dc_is_dp_signal(stream->signal) && !stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

182

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

184

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

185

stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

186

stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

190

if (dc_is_dp_signal(stream->signal) && !stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

224

if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

110

if (pipe->stream && (pipe->stream->dpms_off || pipe->plane_state == NULL ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

111

dc_is_virtual_signal(pipe->stream->signal))) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

66

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

68

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

69

stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

70

stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

94

if (pipe->stream->link->link_enc && pipe->stream->link->link_enc->funcs->is_dig_enabled &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

95

pipe->stream->link->link_enc->funcs->is_dig_enabled(pipe->stream->link->link_enc))

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

115

if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

116

!pipe->stream->link_enc)) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

78

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

80

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

81

stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

82

stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

496

if (pipe->stream->timing.h_addressable == width &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

497

pipe->stream->timing.v_addressable == height &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

520

if (pipe_ctx->stream && dc_state_get_pipe_subvp_type(context, pipe_ctx) != SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

575

pix_clk_list[i] = curr_pipe_ctx->stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

578

refresh_rate = (curr_pipe_ctx->stream->timing.pix_clk_100hz * (uint64_t)100 +

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

579

curr_pipe_ctx->stream->timing.v_total * (uint64_t)curr_pipe_ctx->stream->timing.h_total - (uint64_t)1);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

580

refresh_rate = div_u64(refresh_rate, curr_pipe_ctx->stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

581

refresh_rate = div_u64(refresh_rate, curr_pipe_ctx->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

165

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

167

if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

168

stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

169

stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

215

if (new_pipe->stream)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

216

new_pipe_link_enc = new_pipe->stream->link_enc;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

217

if (pipe->stream)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

218

pipe_link_enc = pipe->stream->link_enc;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

221

stream_changed_otg_dig_on = old_pipe->stream && new_pipe->stream &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

222

old_pipe->stream != new_pipe->stream &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

224

new_pipe_link_enc && !new_pipe->stream->dpms_off &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

232

if (old_pipe->stream && new_pipe->stream && old_pipe->stream == new_pipe->stream) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

238

if (!has_active_hpo && !stream_changed_otg_dig_on && pipe->stream &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

239

(pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) || !pipe_link_enc) &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

349

const struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

350

const struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

365

&stream->timing, dc_link_get_highest_encoding_format(link));

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

401

if (pipe->stream->timing.h_addressable == width &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

402

pipe->stream->timing.v_addressable == height &&

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

424

if (pipe_ctx->stream && dc_state_get_pipe_subvp_type(context, pipe_ctx) != SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

477

pix_clk_list[i] = curr_pipe_ctx->stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

480

refresh_rate = (curr_pipe_ctx->stream->timing.pix_clk_100hz * (uint64_t)100 +

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

481

curr_pipe_ctx->stream->timing.v_total

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

482

* (uint64_t) curr_pipe_ctx->stream->timing.h_total - (uint64_t)1);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

483

refresh_rate = div_u64(refresh_rate, curr_pipe_ctx->stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

484

refresh_rate = div_u64(refresh_rate, curr_pipe_ctx->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/core/dc.c

1192

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

1197

for (i = 0; i < stream->num_wb_info; i++)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1198

stream->writeback_info[i].wb_enabled = false;

sys/dev/pci/drm/amd/display/dc/core/dc.c

1203

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

1217

if (stream == pipe_ctx->stream) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

1250

dc, pipe_ctx->stream->output_color_space, &(pipe_ctx->visual_confirm_color));

sys/dev/pci/drm/amd/display/dc/core/dc.c

1325

dc->current_state->res_ctx.pipe_ctx[i].stream;

sys/dev/pci/drm/amd/display/dc/core/dc.c

1382

if (pipe->stream && pipe->plane_state) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

1428

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc.c

1433

stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/core/dc.c

1434

if (stream == NULL)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1437

if (stream->apply_seamless_boot_optimization)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1444

if (stream->link->local_sink &&

sys/dev/pci/drm/amd/display/dc/core/dc.c

1445

stream->link->local_sink->sink_signal == SIGNAL_TYPE_EDP) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

1446

link = stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc.c

1473

pipe->stream->dpms_off = false;

sys/dev/pci/drm/amd/display/dc/core/dc.c

1596

if (!ctx->res_ctx.pipe_ctx[i].stream ||

sys/dev/pci/drm/amd/display/dc/core/dc.c

1597

!ctx->res_ctx.pipe_ctx[i].stream->triggered_crtc_reset.enabled)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1599

if (ctx->res_ctx.pipe_ctx[i].stream == ctx->res_ctx.pipe_ctx[i].stream->triggered_crtc_reset.event_source)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1622

if (!ctx->res_ctx.pipe_ctx[i].stream

sys/dev/pci/drm/amd/display/dc/core/dc.c

1651

unsynced_pipes[j]->stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

1652

pipe_set[0]->stream)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

1660

unsynced_pipes[j]->stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

1661

pipe_set[0]->stream)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

1689

struct dc_stream_status *status = dc_state_get_stream_status(ctx, pipe_set[k]->stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

1989

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1991

return (pipe_ctx->stream && pipe_ctx->stream == stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

2045

if (context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

2260

context->streams[l] == pipe->stream &&

sys/dev/pci/drm/amd/display/dc/core/dc.c

2363

struct dc_stream_state *stream = params->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc.c

2364

struct dc_stream_status *status = dc_stream_get_status(stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

2365

struct dc_sink *sink = stream->sink;

sys/dev/pci/drm/amd/display/dc/core/dc.c

2369

res = dc_validate_stream(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

2375

dc_stream_log(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

2377

set[i].stream = stream;

sys/dev/pci/drm/amd/display/dc/core/dc.c

2467

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

2482

if (res_ctx->pipe_ctx[pipe_idx].stream == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

2565

if (context->res_ctx.pipe_ctx[i].stream == NULL ||

sys/dev/pci/drm/amd/display/dc/core/dc.c

2953

union stream_update_flags *su_flags = &stream_update->stream->update_flags;

sys/dev/pci/drm/amd/display/dc/core/dc.c

2981

if (stream_update->stream->freesync_on_desktop &&

sys/dev/pci/drm/amd/display/dc/core/dc.c

3034

stream_update->stream->update_flags.raw = 0;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3041

uint32_t dsc_changed = stream_update->stream->update_flags.bits.dsc_changed;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3042

stream_update->stream->update_flags.raw = 0xFFFFFFFF;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3043

stream_update->stream->update_flags.bits.dsc_changed = dsc_changed;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3065

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3070

if (stream == ctx->streams[i]) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

3224

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3229

if (update == NULL || stream == NULL)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3233

stream->src = update->src;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3236

stream->dst = update->dst;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3239

stream->out_transfer_func.sdr_ref_white_level =

sys/dev/pci/drm/amd/display/dc/core/dc.c

3241

stream->out_transfer_func.tf = update->out_transfer_func->tf;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3242

stream->out_transfer_func.type =

sys/dev/pci/drm/amd/display/dc/core/dc.c

3244

memcpy(&stream->out_transfer_func.tf_pts,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3250

stream->hdr_static_metadata = *update->hdr_static_metadata;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3253

stream->abm_level = *update->abm_level;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3256

stream->periodic_interrupt = *update->periodic_interrupt;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3259

stream->gamut_remap_matrix = *update->gamut_remap;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3266

stream->output_color_space = *update->output_color_space;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3269

stream->csc_color_matrix = *update->output_csc_transform;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3272

stream->vrr_infopacket = *update->vrr_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3275

stream->hw_cursor_req = *update->hw_cursor_req;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3278

stream->allow_freesync = *update->allow_freesync;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3281

stream->vrr_active_variable = *update->vrr_active_variable;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3284

stream->vrr_active_fixed = *update->vrr_active_fixed;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3287

if (stream->adjust.v_total_min != update->crtc_timing_adjust->v_total_min ||

sys/dev/pci/drm/amd/display/dc/core/dc.c

3288

stream->adjust.v_total_max != update->crtc_timing_adjust->v_total_max ||

sys/dev/pci/drm/amd/display/dc/core/dc.c

3289

stream->adjust.timing_adjust_pending)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3291

stream->adjust = *update->crtc_timing_adjust;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3296

stream->dpms_off = *update->dpms_off;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3299

stream->hfvsif_infopacket = *update->hfvsif_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3302

stream->vtem_infopacket = *update->vtem_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3305

stream->vsc_infopacket = *update->vsc_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3308

stream->vsp_infopacket = *update->vsp_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3311

stream->adaptive_sync_infopacket = *update->adaptive_sync_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3314

stream->avi_infopacket = *update->avi_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3317

stream->dither_option = *update->dither_option;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3320

stream->test_pattern = *update->pending_test_pattern;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3325

stream->num_wb_info = update->wb_update->num_wb_info;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3326

ASSERT(stream->num_wb_info <= MAX_DWB_PIPES);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3327

for (i = 0; i < stream->num_wb_info; i++)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3328

stream->writeback_info[i] =

sys/dev/pci/drm/amd/display/dc/core/dc.c

3332

struct dc_dsc_config old_dsc_cfg = stream->timing.dsc_cfg;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3333

uint32_t old_dsc_enabled = stream->timing.flags.DSC;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3341

stream->timing.dsc_cfg = *update->dsc_config;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3342

stream->timing.flags.DSC = enable_dsc;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3345

stream->timing.dsc_cfg = old_dsc_cfg;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3346

stream->timing.flags.DSC = old_dsc_enabled;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3357

stream->scaler_sharpener_update = *update->scaler_sharpener_update;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3359

stream->sharpening_required = *update->sharpening_required;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3364

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3367

struct dc_stream_status *status = dc_stream_get_status(stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3375

scratch->stream_state = *stream;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3380

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3383

struct dc_stream_status *status = dc_stream_get_status(stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3391

*stream = scratch->stream_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3411

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3413

if (get_seamless_boot_stream_count(context) > 0 && (surface_count > 0 || stream->dpms_off)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

3420

if (stream->apply_seamless_boot_optimization) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

3421

stream->apply_seamless_boot_optimization = false;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3453

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3464

stream_status = dc_stream_get_status(stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3482

backup_planes_and_stream_state(&dc->scratch.current_state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3485

copy_stream_update_to_stream(dc, context, stream, stream_update);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3533

if (!dc_state_rem_all_planes_for_stream(dc, stream, context)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

3540

if (!dc_state_add_all_planes_for_stream(dc, stream, new_planes, surface_count, context)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

3571

update_seamless_boot_flags(dc, context, surface_count, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3576

backup_planes_and_stream_state(&dc->scratch.new_state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3588

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3599

if (resource_is_pipe_type(pipe_ctx, OTG_MASTER) && pipe_ctx->stream == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

3604

if ((stream_update->hdr_static_metadata && !stream->use_dynamic_meta) ||

sys/dev/pci/drm/amd/display/dc/core/dc.c

3615

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/core/dc.c

3617

pipe_ctx->stream->link,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3622

stream->use_dynamic_meta &&

sys/dev/pci/drm/amd/display/dc/core/dc.c

3624

pipe_ctx->stream->dmdata_address.quad_part != 0)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3628

dc_stream_set_gamut_remap(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3631

dc_stream_program_csc_matrix(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3635

resource_build_bit_depth_reduction_params(pipe_ctx->stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3636

&pipe_ctx->stream->bit_depth_params);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3638

&stream->bit_depth_params,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3639

&stream->clamping);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3642

&stream->bit_depth_params,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3643

&stream->clamping);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3649

program_cursor_attributes(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3652

program_cursor_position(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3684

dc->link_srv->dp_set_test_pattern(stream->link,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3685

stream->test_pattern.type,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3686

stream->test_pattern.color_space,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3687

stream->test_pattern.p_link_settings,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3688

stream->test_pattern.p_custom_pattern,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3689

stream->test_pattern.cust_pattern_size);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3707

} else if (pipe_ctx->stream->link->wa_flags.blank_stream_on_ocs_change && stream_update->output_color_space

sys/dev/pci/drm/amd/display/dc/core/dc.c

3708

&& !stream->dpms_off && dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

3729

pipe_ctx->stream_res.abm, stream->abm_level);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3737

static bool dc_dmub_should_send_dirty_rect_cmd(struct dc *dc, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3739

if ((stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1

sys/dev/pci/drm/amd/display/dc/core/dc.c

3740

|| stream->link->psr_settings.psr_version == DC_PSR_VERSION_1)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3741

&& stream->ctx->dce_version >= DCN_VERSION_3_1)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3744

if (stream->link->replay_settings.config.replay_supported)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3747

if (stream->ctx->dce_version >= DCN_VERSION_3_5 && stream->abm_level)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3755

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3764

if (!dc_dmub_should_send_dirty_rect_cmd(dc, stream))

sys/dev/pci/drm/amd/display/dc/core/dc.c

3767

if (!dc_get_edp_link_panel_inst(dc, stream->link, &panel_inst))

sys/dev/pci/drm/amd/display/dc/core/dc.c

3794

if (pipe_ctx->stream != stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3809

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3820

if (!dc_dmub_should_send_dirty_rect_cmd(dc, stream))

sys/dev/pci/drm/amd/display/dc/core/dc.c

3823

if (!dc_get_edp_link_panel_inst(dc, stream->link, &panel_inst))

sys/dev/pci/drm/amd/display/dc/core/dc.c

3849

if (pipe_ctx->stream != stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3892

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3899

build_dmub_update_dirty_rect(dc, surface_count, stream, srf_updates, context, dc_dmub_cmd, dmub_cmd_count);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3905

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3911

dc_dmub_update_dirty_rect(dc, surface_count, stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3921

if (!should_update_pipe_for_stream(context, pipe_ctx, stream))

sys/dev/pci/drm/amd/display/dc/core/dc.c

3936

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3944

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3984

stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3992

if (pipe->stream && pipe->plane_state) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

4022

stream_status = dc_state_get_stream_status(context, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4028

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4034

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4056

if (top_pipe_to_program->stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4057

top_pipe_to_program->stream->update_flags.raw = 0;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4063

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4093

if (pipe->stream && pipe->plane_state) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

4119

stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

414

static bool set_long_vtotal(struct dc *dc, struct dc_stream_state *stream, struct dc_crtc_timing_adjust *adjust)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4140

if (stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

4149

if ((update_type != UPDATE_TYPE_FAST) && stream->update_flags.bits.dsc_changed)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4152

if (should_use_dmub_lock(stream->link)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

416

if (!dc || !stream || !adjust)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4197

dc_dmub_update_dirty_rect(dc, surface_count, stream, srf_updates, context);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4201

commit_planes_do_stream_update(dc, stream, stream_update, update_type, context);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4209

dc->hwss.apply_ctx_for_surface(dc, stream, 0, context);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4243

pipe_ctx->stream && pipe_ctx->plane_state) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

427

if (pipe->stream == stream && pipe->stream_res.tg) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

4285

should_update_pipe_for_stream(context, pipe_ctx, stream)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

4296

stream_get_status(context, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4300

dc, pipe_ctx->stream, stream_status->plane_count, context);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4337

if (cur_pipe->stream == NULL)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4358

if (!should_update_pipe_for_stream(context, pipe_ctx, stream))

sys/dev/pci/drm/amd/display/dc/core/dc.c

4377

if (!should_update_pipe_for_stream(context, pipe_ctx, stream))

sys/dev/pci/drm/amd/display/dc/core/dc.c

4409

if ((update_type != UPDATE_TYPE_FAST) && stream->update_flags.bits.dsc_changed)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4422

if (should_use_dmub_lock(stream->link)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

4487

!pipe_ctx->stream || !should_update_pipe_for_stream(context, pipe_ctx, stream) ||

sys/dev/pci/drm/amd/display/dc/core/dc.c

4524

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

453

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4530

struct dc_stream_status *cur_stream_status = stream_get_status(dc->current_state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

464

(stream->adjust.v_total_max != adjust->v_total_max ||

sys/dev/pci/drm/amd/display/dc/core/dc.c

465

stream->adjust.v_total_min != adjust->v_total_min)) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

466

stream->adjust.timing_adjust_pending = true;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4702

struct dc_state *new_context, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4723

if (pipe_ctx->plane_state && pipe_ctx->stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4729

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

473

stream->adjust.v_total_max = adjust->v_total_max;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4732

struct dc_stream_status *status = dc_stream_get_status(stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

474

stream->adjust.v_total_mid = adjust->v_total_mid;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4746

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

475

stream->adjust.v_total_mid_frame_num = adjust->v_total_mid_frame_num;

sys/dev/pci/drm/amd/display/dc/core/dc.c

476

stream->adjust.v_total_min = adjust->v_total_min;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4764

surface_count, stream, NULL,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4767

dc, intermediate_context, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

477

stream->adjust.allow_otg_v_count_halt = adjust->allow_otg_v_count_halt;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4778

struct dc_state *new_context, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4798

restore_planes_and_stream_state(&dc->scratch.current_state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

481

stream->adjust.timing_adjust_pending = false;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4811

stream, srf_updates);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4813

surface_count, stream, NULL,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4816

dc, intermediate_context, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4828

restore_planes_and_stream_state(&dc->scratch.new_state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

483

return set_long_vtotal(dc, stream, adjust);

sys/dev/pci/drm/amd/display/dc/core/dc.c

4853

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4858

dc, new_context, stream, srf_updates,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4862

new_context, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

491

if (pipe->stream == stream && pipe->stream_res.tg) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

4911

if (pipe->stream && dc_state_get_pipe_subvp_type(dc->current_state, pipe) == SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

495

stream->adjust.timing_adjust_pending = false;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5042

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

5102

if (stream) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

5103

stream_status = dc_stream_get_status(stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5121

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

5124

&& !full_update_required(dc, srf_updates, surface_count, stream_update, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5129

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5146

surface_count, stream_update, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5149

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

516

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5163

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5181

commit_minimal_transition_state_in_dc_update(dc, context, stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5188

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5204

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5210

swap_and_release_current_context(dc, context, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5216

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5226

stream_update, stream) &&

sys/dev/pci/drm/amd/display/dc/core/dc.c

5231

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5240

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5248

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5269

stream, srf_updates, surface_count);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5275

stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

528

if (pipe->stream == stream && pipe->stream_res.tg) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

5283

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5300

stream, stream_update, &update_type,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5306

srf_updates, surface_count, stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5310

srf_updates, surface_count, stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5312

swap_and_release_current_context(dc, new_context, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5319

int surface_count, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

5323

if (stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

5324

stream->update_flags.raw = 0;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5333

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5355

surface_count, stream, stream_update);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5358

surface_count, stream, stream_update);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5361

clear_update_flags(srf_updates, surface_count, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5369

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

5383

stream, stream_update);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5386

stream, stream_update);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5390

clear_update_flags(srf_updates, surface_count, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

5518

struct dc_stream_state *stream = dc->current_state->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc.c

5520

link = stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5548

struct dc_stream_state *stream = dc->current_state->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc.c

5550

link = stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5687

if (pipe->stream != NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

5707

if (pipe->stream != NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

581

dc_stream_forward_crc_window(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

589

struct dc *dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc.c

593

if (pipe->stream == stream && !pipe->top_pipe && !pipe->prev_odm_pipe)

sys/dev/pci/drm/amd/display/dc/core/dc.c

6125

void dc_notify_vsync_int_state(struct dc *dc, struct dc_stream_state *stream, bool enable)

sys/dev/pci/drm/amd/display/dc/core/dc.c

6130

struct dc_link *link = stream->sink->link;

sys/dev/pci/drm/amd/display/dc/core/dc.c

6144

if (pipe->stream == stream && pipe->stream_res.tg)

sys/dev/pci/drm/amd/display/dc/core/dc.c

6179

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

6185

struct dc_link *link = stream->sink->link;

sys/dev/pci/drm/amd/display/dc/core/dc.c

6195

if (pipe->stream == stream && pipe->stream_res.tg)

sys/dev/pci/drm/amd/display/dc/core/dc.c

648

dc_stream_forward_multiple_crc_window(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

655

struct dc *dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc.c

659

if (pipe->stream == stream && !pipe->top_pipe && !pipe->prev_odm_pipe)

sys/dev/pci/drm/amd/display/dc/core/dc.c

698

bool dc_stream_configure_crc(struct dc *dc, struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

707

&dc->current_state->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc.c

718

param.windowa_x_end = pipe->stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/core/dc.c

719

param.windowa_y_end = pipe->stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/core/dc.c

722

param.windowb_x_end = pipe->stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/core/dc.c

723

param.windowb_y_end = pipe->stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/core/dc.c

736

param.dsc_mode = pipe->stream->timing.flags.DSC ? 1:0;

sys/dev/pci/drm/amd/display/dc/core/dc.c

771

bool dc_stream_get_crc(struct dc *dc, struct dc_stream_state *stream, uint8_t idx,

sys/dev/pci/drm/amd/display/dc/core/dc.c

782

if (pipe->stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

797

void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

807

if (dc->current_state->res_ctx.pipe_ctx[i].stream

sys/dev/pci/drm/amd/display/dc/core/dc.c

808

== stream) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

814

stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/dc/core/dc.c

815

stream->signal);

sys/dev/pci/drm/amd/display/dc/core/dc.c

820

void dc_stream_set_dither_option(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc.c

824

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc.c

829

if (link->dc->current_state->res_ctx.pipe_ctx[i].stream ==

sys/dev/pci/drm/amd/display/dc/core/dc.c

830

stream) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

841

dc_exit_ips_for_hw_access(stream->ctx->dc);

sys/dev/pci/drm/amd/display/dc/core/dc.c

843

stream->dither_option = option;

sys/dev/pci/drm/amd/display/dc/core/dc.c

846

resource_build_bit_depth_reduction_params(stream, &params);

sys/dev/pci/drm/amd/display/dc/core/dc.c

847

stream->bit_depth_params = params;

sys/dev/pci/drm/amd/display/dc/core/dc.c

854

&stream->bit_depth_params);

sys/dev/pci/drm/amd/display/dc/core/dc.c

861

bool dc_stream_set_gamut_remap(struct dc *dc, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

870

if (dc->current_state->res_ctx.pipe_ctx[i].stream == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

880

bool dc_stream_program_csc_matrix(struct dc *dc, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

889

if (dc->current_state->res_ctx.pipe_ctx[i].stream

sys/dev/pci/drm/amd/display/dc/core/dc.c

890

== stream) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

895

stream->output_color_space,

sys/dev/pci/drm/amd/display/dc/core/dc.c

896

stream->csc_color_matrix.matrix,

sys/dev/pci/drm/amd/display/dc/core/dc.c

917

struct dc_stream_state *stream = streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc.c

920

if (dc->current_state->res_ctx.pipe_ctx[j].stream

sys/dev/pci/drm/amd/display/dc/core/dc.c

921

== stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

1229

if (!pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

397

if (top_pipe_ctx->stream->out_transfer_func.tf == TRANSFER_FUNCTION_PQ) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

400

} else if (top_pipe_ctx->stream->out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

408

if (top_pipe_ctx->stream->out_transfer_func.tf == TRANSFER_FUNCTION_PQ) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

411

} else if (top_pipe_ctx->stream->out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

464

if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

465

if (pipe_ctx->stream->link->connector_signal == SIGNAL_TYPE_EDP)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

466

edp_link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

572

if (pipe_ctx->stream && pipe_ctx->stream->cursor_position.enable) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

664

if (pipe->stream && dc_state_get_paired_subvp_stream(context, pipe->stream) &&

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

670

if (pipe_ctx->stream == pipe->stream)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

677

if (pipe_ctx->stream->allow_freesync == 1) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

690

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

699

if (stream)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

700

stream->adjust.timing_adjust_pending = false;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

733

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

741

if (!plane || !stream)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

839

if (hws->funcs.set_output_transfer_func && current_mpc_pipe->stream->update_flags.bits.out_tf) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

842

block_sequence[*num_steps].params.set_output_transfer_func_params.stream = current_mpc_pipe->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

854

if (current_mpc_pipe->stream->update_flags.bits.out_csc) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

861

if (current_mpc_pipe->stream->csc_color_matrix.enable_adjustment == true) {

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

864

block_sequence[*num_steps].params.set_output_csc_params.regval = current_mpc_pipe->stream->csc_color_matrix.matrix;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

871

block_sequence[*num_steps].params.set_ocsc_default_params.color_space = current_mpc_pipe->stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

911

current_mpc_pipe->stream && current_mpc_pipe->plane_state &&

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

977

params->set_output_transfer_func_params.stream);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

104

if (assignment.valid && assignment.stream == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

112

stream->link_enc = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

114

state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

115

dc_stream_release(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

124

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

137

if (stream == state->streams[i]) {

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

141

.link_id = stream->link->link_id,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

142

.ep_type = stream->link->ep_type},

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

144

.stream = stream};

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

145

dc_stream_retain(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

147

stream->link_enc = stream->ctx->dc->res_pool->link_encoders[eng_idx];

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

187

static bool is_avail_link_enc(struct dc_state *state, enum engine_id eng_id, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

204

if (stream_assigned && stream != stream_assigned && stream->link == stream_assigned->link)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

256

if (state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream != NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

257

dc_stream_release(state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

258

state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

308

struct dc_stream_state *stream = streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

311

if (stream->link->is_dig_mapping_flexible)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

315

if (!is_dig_link_enc_stream(stream))

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

319

eng_id = stream->link->eng_id;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

32

static bool is_dig_link_enc_stream(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

320

add_link_enc_assignment(state, stream, eng_id);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

330

struct dc_stream_state *stream = state->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

333

if (!stream->link->is_dig_mapping_flexible)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

337

if (!is_dig_link_enc_stream(stream))

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

343

if (stream == prev_stream && stream->link == prev_stream->link &&

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

347

if (is_avail_link_enc(state, eng_id, stream))

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

348

add_link_enc_assignment(state, stream, eng_id);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

358

struct dc_stream_state *stream = streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

362

if (!stream->link->is_dig_mapping_flexible)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

366

if (stream->link_enc)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

370

if (!is_dig_link_enc_stream(stream)) {

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

371

ASSERT(stream->link->is_dig_mapping_flexible != true);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

381

link_enc = get_link_enc_used_by_link(state, stream->link);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

384

if (stream->link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA &&

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

385

stream->link->dpia_preferred_eng_id != ENGINE_ID_UNKNOWN)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

386

eng_id_req = stream->link->dpia_preferred_eng_id;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

388

eng_id = find_first_avail_link_enc(stream->ctx, state, eng_id_req);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

39

if (stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

393

add_link_enc_assignment(state, stream, eng_id);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

40

for (i = 0; i < stream->ctx->dc->res_pool->res_cap->num_dig_link_enc; i++) {

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

41

link_enc = stream->ctx->dc->res_pool->link_encoders[i];

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

438

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

442

if (stream->link_enc)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

443

eng_id = stream->link_enc->preferred_engine;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

445

remove_link_enc_assignment(state, stream, eng_id);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

454

struct dc_stream_state *stream = link_enc_cfg_get_stream_using_link_enc(dc, eng_id);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

456

if (stream)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

457

is_mappable = stream->link->is_dig_mapping_flexible;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

46

if (link_enc && ((uint32_t)stream->link->connector_signal & link_enc->output_signals)) {

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

466

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

473

stream = assignment.stream;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

478

return stream;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

486

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

488

stream = link_enc_cfg_get_stream_using_link_enc(dc, eng_id);

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

490

if (stream)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

491

link = stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

572

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

579

.link_id = stream->link->link_id,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

580

.ep_type = stream->link->ep_type};

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

590

link_enc = stream->link->dc->res_pool->link_encoders[assignment.eng_id - ENGINE_ID_DIGA];

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

652

if (assignment.stream != state->streams[i])

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

706

struct dc_stream_state *stream = state->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

708

if (is_dig_link_enc_stream(stream) && stream->link_enc == NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

72

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

79

stream = state->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

84

return stream;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

89

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_link_exports.c

149

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc_link_exports.c

476

const struct dc_stream_state *stream, struct psr_config *psr_config,

sys/dev/pci/drm/amd/display/dc/core/dc_link_exports.c

479

return link->dc->link_srv->edp_setup_psr(link, stream, psr_config, psr_context);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1114

&pipe_ctx->stream->dst);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1141

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1143

const int in_w = stream->src.width;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1144

const int in_h = stream->src.height;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1145

const int out_w = stream->dst.width;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1146

const int out_h = stream->dst.height;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1160

if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1162

else if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1417

enum dc_color_depth color_depth = otg_master->stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1422

otg_master->stream->test_pattern.type);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1424

otg_master->stream->test_pattern.color_space);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1446

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1451

DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1468

pipe_ctx->stream->dst.x += timing->h_border_left;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1469

pipe_ctx->stream->dst.y += timing->v_border_top;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1478

if ((pipe_ctx->stream->ctx->dc->config.use_spl) && (!pipe_ctx->stream->ctx->dc->debug.disable_spl)) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1592

(pipe_ctx->stream->view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1593

pipe_ctx->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE));

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1594

if (pipe_ctx->stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1596

else if (pipe_ctx->stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1635

pipe_ctx->stream->dst.x -= timing->h_border_left;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1636

pipe_ctx->stream->dst.y -= timing->v_border_top;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1706

context->res_ctx.pipe_ctx[i].stream != NULL)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1752

if (res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1764

if (res_ctx->pipe_ctx[i].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1940

pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1942

return !pipe_ctx->top_pipe && pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1944

return pipe_ctx->plane_state && pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1946

return !pipe_ctx->plane_state && !pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1954

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1959

if (res_ctx->pipe_ctx[i].stream == stream &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1971

struct dc *dc = otg_master->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2143

if (!otg_master || !otg_master->stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2146

timing = &otg_master->stream->timing;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2174

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2184

odm_slice_dst.height = stream->timing.v_addressable +

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2185

stream->timing.v_border_bottom +

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2186

stream->timing.v_border_top;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2205

opp, pipe_ctx->stream->timing.pixel_encoding,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2229

if (pipe_a->stream && !pipe_b->stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2231

else if (!pipe_a->stream && pipe_b->stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2391

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2396

if (state->streams[i] == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2492

if (pipe->stream == otg_master->stream && pipe->plane_state)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2524

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2549

split_pipe->stream = stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2638

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2642

enc_index = find_acquired_hpo_dp_link_enc_for_link(res_ctx, stream->link);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2649

acquire_hpo_dp_link_enc(res_ctx, stream->link->link_index, enc_index);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2660

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2664

enc_index = find_acquired_hpo_dp_link_enc_for_link(res_ctx, stream->link);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2761

struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2762

struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2773

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2778

enc_index = find_acquired_dio_link_enc_for_link(res_ctx, stream->link);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2783

if (stream->link->is_dig_mapping_flexible)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2784

enc_index = find_free_dio_link_enc(res_ctx, stream->link, pool);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2788

enc_index = find_fixed_dio_link_enc(stream->link);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2793

if (enc_index >= 0 && is_dio_enc_acquired_by_other_link(stream->link, enc_index, &link_index)) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2804

acquire_dio_link_enc(res_ctx, stream->link->link_index, enc_index);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2815

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2819

if (stream->link)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2820

enc_index = find_acquired_dio_link_enc_for_link(res_ctx, stream->link);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2841

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2843

struct dc *dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2845

return dc->res_pool->funcs->add_stream_to_ctx(dc, new_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2850

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2853

&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2867

if (stream->ctx->dc->link_srv->dp_is_128b_132b_signal(otg_master)) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2873

&context->res_ctx, otg_master, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2876

if (stream->ctx->dc->config.unify_link_enc_assignment)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2877

remove_dio_link_enc_from_ctx(&context->res_ctx, otg_master, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2892

stream->ctx->dc, context, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3343

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3348

&new_ctx->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3455

struct dc_stream_state *old_stream, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3457

if (!old_stream || !stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3460

if (!are_stream_backends_same(old_stream, stream))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3463

if (old_stream->ignore_msa_timing_param != stream->ignore_msa_timing_param)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3467

if (memcmp(&old_stream->audio_info, &stream->audio_info, sizeof(stream->audio_info)) != 0)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3477

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3479

if (old_stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3482

if (old_stream == NULL || stream == NULL)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3486

&stream->src,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3491

&stream->dst,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3515

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3620

static void calculate_phy_pix_clks(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3623

if (dc_is_hdmi_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3624

stream->phy_pix_clk = get_norm_pix_clk(

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3625

&stream->timing) / 10;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3627

stream->phy_pix_clk =

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3628

stream->timing.pix_clk_100hz / 10;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3630

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3631

stream->phy_pix_clk *= 2;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3637

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3639

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3668

if (!res_ctx->pipe_ctx[tg_inst].stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3727

pipe_ctx->stream = stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3731

stream->apply_boot_odm_mode = dm_odm_combine_policy_2to1;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3737

stream->apply_boot_odm_mode = dm_odm_combine_mode_disabled;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3746

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3752

if (stream->apply_seamless_boot_optimization)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3758

if (dc_validate_boot_timing(dc, stream->sink, &stream->timing)) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3759

stream->apply_seamless_boot_optimization = true;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3784

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3852

pipe_ctx->stream = stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3854

pipe_idx = acquire_first_split_pipe(&new_ctx->res_ctx, pool, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3863

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3873

calculate_phy_pix_clks(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3875

mark_seamless_boot_stream(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3877

if (stream->apply_seamless_boot_optimization) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3881

stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3884

stream->apply_seamless_boot_optimization = false;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3892

context, pool, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3894

pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3901

&context->res_ctx, pool, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3914

if (dc_is_dp_signal(stream->signal) ||

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3915

dc_is_virtual_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3916

if (!dc->link_srv->dp_decide_link_settings(stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3920

dc->link_srv->dp_decide_tunnel_settings(stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3927

&context->res_ctx, pool, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3936

if (!add_hpo_dp_link_enc_to_ctx(&context->res_ctx, pool, pipe_ctx, stream))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3942

if (!add_dio_link_enc_to_ctx(dc, context, pool, pipe_ctx, stream))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3946

if (!stream->converter_disable_audio &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3947

dc_is_audio_capable_signal(pipe_ctx->stream->signal) &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3948

stream->audio_info.mode_count &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3949

(stream->audio_info.flags.all ||

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3950

(stream->sink && stream->sink->edid_caps.panel_patch.skip_audio_sab_check))) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3965

if (pipe_ctx->stream && dc_is_embedded_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3973

if (context->streams[i] == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3982

DC_ERROR("Stream %p not found in new ctx!\n", stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3995

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4003

if (context->streams[i] == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4015

if (set[i].stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4033

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4041

if (set[i].stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4045

dm_error("Stream %p not found in set!\n", stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4050

if (!dc_state_add_plane(dc, stream, set[i].plane_states[j], state))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4095

struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4098

if (stream == set[j].stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4105

del_streams[del_streams_count++] = stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4112

struct dc_stream_state *stream = set[i].stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4115

if (stream == context->streams[j]) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4122

add_streams[add_streams_count++] = stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4133

if (set[i].stream == del_streams[j]) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4142

if (set[i].stream == add_streams[j]) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4150

unchanged_streams[unchanged_streams_count++] = set[i].stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4284

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4289

stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4293

if (stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4294

pipe_ctx->dsc_padding_params.dsc_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4328

struct dc_stream_state *stream = new_ctx->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4333

if (pipe_ctx->stream != stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4352

if (dc_is_dp_signal(pipe_ctx->stream->signal) &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4353

!find_pll_sharable_stream(stream, new_ctx)) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4400

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4408

unsigned int vic = pipe_ctx->stream->timing.vic;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4409

unsigned int rid = pipe_ctx->stream->timing.rid;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4410

unsigned int fr_ind = pipe_ctx->stream->timing.fr_index;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4413

if (stream->avi_infopacket.valid) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4414

*info_packet = stream->avi_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4421

color_space = pipe_ctx->stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4423

color_space = (stream->timing.pixel_encoding == PIXEL_ENCODING_RGB) ?

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4438

switch (stream->timing.pixel_encoding) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4499

stream->out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4505

aspect = stream->timing.aspect_ratio;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4523

switch (stream->content_type) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4546

if (stream->qs_bit == 1) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4563

if (pipe_ctx->stream->timing.hdmi_vic != 0)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4565

format = stream->timing.timing_3d_format;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4569

switch (pipe_ctx->stream->timing.hdmi_vic) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4618

hdmi_info.bits.bar_top = stream->timing.v_border_top;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4619

hdmi_info.bits.bar_bottom = (stream->timing.v_total

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4620

- stream->timing.v_border_bottom + 1);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4621

hdmi_info.bits.bar_left = stream->timing.h_border_left;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4622

hdmi_info.bits.bar_right = (stream->timing.h_total

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4623

- stream->timing.h_border_right + 1);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4656

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4663

if (!stream->vsp_infopacket.valid)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4666

*info_packet = stream->vsp_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4671

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4678

if (!stream->vrr_infopacket.valid)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4681

*info_packet = stream->vrr_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4686

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4690

if (!stream->hdr_static_metadata.valid ||

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4691

stream->use_dynamic_meta)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4694

*info_packet = stream->hdr_static_metadata;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4699

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4701

if (!stream->vsc_infopacket.valid)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4704

*info_packet = stream->vsc_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4708

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4710

if (!stream->hfvsif_infopacket.valid)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4713

*info_packet = stream->hfvsif_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4746

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4750

if (!stream->adaptive_sync_infopacket.valid)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4754

&stream->timing,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4758

*info_packet = stream->adaptive_sync_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4763

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4765

if (!stream->vtem_infopacket.valid)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4768

*info_packet = stream->vtem_infopacket;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4801

signal = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4803

if (pipe_ctx->stream->ctx->dc->res_pool->funcs->get_vstartup_for_pipe)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4804

vstartup_start = pipe_ctx->stream->ctx->dc->res_pool->funcs->get_vstartup_for_pipe(pipe_ctx);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4810

set_vendor_info_packet(&info->vendor, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4811

set_hfvs_info_packet(&info->hfvsif, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4812

set_vtem_info_packet(&info->vtem, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4814

set_spd_info_packet(&info->spd, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4816

set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4819

set_vsc_info_packet(&info->vsc, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4821

set_spd_info_packet(&info->spd, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4823

set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4825

pipe_ctx->stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4836

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4841

&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4846

if (dc_is_dp_signal(pipe_ctx->stream->signal)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4847

|| pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4883

if (!pipe_ctx_old->stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4886

if (pipe_ctx_old->stream->sink != pipe_ctx->stream->sink)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4889

if (pipe_ctx_old->stream->signal != pipe_ctx->stream->signal)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4896

&& pipe_ctx_old->stream != pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4902

if (dc_is_timing_changed(pipe_ctx_old->stream, pipe_ctx->stream))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4905

if (pipe_ctx_old->stream->dpms_off != pipe_ctx->stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4908

if (false == pipe_ctx_old->stream->link->link_state_valid &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4909

false == pipe_ctx_old->stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4921

if (pipe_ctx_old->stream->ctx->dc->config.unify_link_enc_assignment) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4924

} else if (pipe_ctx_old->stream->ctx->dc->res_pool->funcs->link_encs_assign) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4926

struct dc *dc = pipe_ctx_old->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4928

link_enc_cfg_get_link_enc_used_by_stream_current(dc, pipe_ctx_old->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4930

if (link_enc_prev != pipe_ctx->stream->link_enc)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4939

void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4942

enum dc_dither_option option = stream->dither_option;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4944

stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4949

switch (stream->timing.display_color_depth) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5067

enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5069

if (dc == NULL || stream == NULL)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5072

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5076

calculate_phy_pix_clks(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5078

if (!tg->funcs->validate_timing(tg, &stream->timing))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5084

link->link_enc, stream))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5091

res = dc->link_srv->validate_mode_timing(stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5093

&stream->timing);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5269

if (!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5401

bool is_h_timing_divisible_by_2(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5407

if (stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5408

h_blank_start = stream->timing.h_total - stream->timing.h_front_porch;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5409

h_blank_end = h_blank_start - stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5415

divisible = (stream->timing.h_total % 2 == 0) &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5418

(stream->timing.h_sync_width % 2 == 0);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5472

if (sec_pipe->stream->timing.flags.DSC == 1) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5481

dcn20_build_mapped_resource(dc, state, sec_pipe->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5496

&context->res_ctx, dc->res_pool, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5508

if (!add_hpo_dp_link_enc_to_ctx(&context->res_ctx, dc->res_pool, pipe_ctx, pipe_ctx->stream))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5520

remove_hpo_dp_link_enc_from_ctx(&context->res_ctx, pipe_ctx, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5524

if (!add_dio_link_enc_to_ctx(dc, context, dc->res_pool, pipe_ctx, pipe_ctx->stream))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5590

if (!otg_master->stream)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

665

if (pipe_with_clk_src->stream->signal == SIGNAL_TYPE_VIRTUAL)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

668

if (dc_is_dp_signal(pipe_with_clk_src->stream->signal) ||

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

669

(dc_is_dp_signal(pipe->stream->signal) &&

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

670

!is_dp_and_hdmi_sharable(pipe_with_clk_src->stream,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

671

pipe->stream)))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

674

if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

675

&& dc_is_dual_link_signal(pipe->stream->signal))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

678

if (dc_is_hdmi_signal(pipe->stream->signal)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

679

&& dc_is_dual_link_signal(pipe_with_clk_src->stream->signal))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

683

pipe_with_clk_src->stream, pipe->stream))

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

874

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

878

temp = dc_fixpt_from_fraction(rec_in->x * (long long)stream->dst.width,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

879

stream->src.width);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

880

rec_out.x = stream->dst.x + dc_fixpt_round(temp);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

883

(rec_in->x + rec_in->width) * (long long)stream->dst.width,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

884

stream->src.width);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

885

rec_out.width = stream->dst.x + dc_fixpt_round(temp) - rec_out.x;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

887

temp = dc_fixpt_from_fraction(rec_in->y * (long long)stream->dst.height,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

888

stream->src.height);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

889

rec_out.y = stream->dst.y + dc_fixpt_round(temp);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

892

(rec_in->y + rec_in->height) * (long long)stream->dst.height,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

893

stream->src.height);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

894

rec_out.height = stream->dst.y + dc_fixpt_round(temp) - rec_out.y;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

903

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

914

stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE ||

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

917

if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

928

if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) {

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

938

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

945

*dpp_offset = pipe_ctx->stream->timing.v_addressable / VISUAL_CONFIRM_DPP_OFFSET_DENO;

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1001

bool dc_state_get_stream_subvp_cursor_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1008

stream_status = dc_state_get_stream_status(state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1017

void dc_state_set_stream_cursor_subvp_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1023

stream_status = dc_state_get_stream_status(state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1030

bool dc_state_get_stream_cursor_subvp_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1037

stream_status = dc_state_get_stream_status(state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1046

bool dc_state_can_clear_stream_cursor_subvp_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1053

stream_status = dc_state_get_stream_status(state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1056

can_clear_limit = dc_state_get_stream_cursor_subvp_limit(stream, state) &&

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1058

stream->hw_cursor_req ||

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1060

!stream->cursor_position.enable ||

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1061

dc_stream_check_cursor_attributes(stream, state, &stream->cursor_attributes));

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

376

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

383

DC_LOG_WARNING("Max streams reached, can't add stream %p !\n", stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

387

state->streams[state->stream_count] = stream;

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

388

dc_stream_retain(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

392

state, dc->res_pool, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

394

DC_LOG_WARNING("Adding stream %p to context failed with err %d!\n", stream, res);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

405

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

409

&state->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

412

dm_error("Pipe not found for stream %p !\n", stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

417

dc->current_state, dc->res_pool, stream, 1);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

419

state, dc->res_pool, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

422

if (state->streams[i] == stream)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

425

if (state->streams[i] != stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

426

dm_error("Context doesn't have stream %p !\n", stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

430

dc_stream_release_3dlut_for_stream(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

465

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

476

stream_status = dc_state_get_stream_status(state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

478

&state->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

509

dc->current_state, dc->res_pool, stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

533

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

545

if (state->streams[i] == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

594

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

602

if (state->streams[i] == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

608

dm_error("Existing stream %p not found!\n", stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

618

if (!dc_state_remove_plane(dc, stream, del_planes[i], state))

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

626

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

635

if (!dc_state_add_plane(dc, stream, plane_states[i], state)) {

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

655

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

663

if (stream == state->streams[i])

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

673

return dc_state_get_stream_subvp_type(state, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

677

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

684

if (state->streams[i] == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

694

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

701

if (state->streams[i] == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

927

if (pipe->plane_state && pipe->stream && dc_state_get_pipe_subvp_type(state, pipe) == SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

928

phantom_stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

960

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

965

stream = state->streams[i];

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

970

return stream;

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

988

void dc_state_set_stream_subvp_cursor_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

994

stream_status = dc_state_get_stream_status(state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1000

return dc_stream_get_brightness_millinits_linear_interpolation(stream, nearest_smallest_index - 1, nearest_smallest_index, refresh_hz);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1002

if (nearest_smallest_value == stream->lumin_data.refresh_rate_hz[nearest_smallest_index + 1])

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1003

return stream->lumin_data.luminance_millinits[nearest_smallest_index];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1005

return dc_stream_get_brightness_millinits_linear_interpolation(stream, nearest_smallest_index, nearest_smallest_index + 1, refresh_hz);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1013

static int dc_stream_calculate_flickerless_refresh_rate(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1019

int nearest_smallest_index = dc_stream_get_nearest_smallest_index(stream, starting_refresh_hz);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

102

stream->audio_info.port_id[0] = dc_container_id->portId[0];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1022

stream->lumin_data.flicker_criteria_milli_nits_GAMING :

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1023

stream->lumin_data.flicker_criteria_milli_nits_STATIC;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

103

stream->audio_info.port_id[1] = dc_container_id->portId[1];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1039

lumin_millinits_temp = stream->lumin_data.luminance_millinits[i + offset];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1043

if (stream->lumin_data.refresh_rate_hz[i + offset] == stream->lumin_data.refresh_rate_hz[i])

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1044

return stream->lumin_data.refresh_rate_hz[i];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1046

int target_brightness = (stream->lumin_data.luminance_millinits[i + offset] >= (current_brightness + flicker_criteria_millinits)) ?

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1056

refresh = dc_stream_get_refresh_hz_linear_interpolation(stream, i, i + offset, target_brightness);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1058

refresh = dc_stream_get_refresh_hz_linear_interpolation(stream, i + offset, i, target_brightness);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1060

if (refresh == stream->lumin_data.refresh_rate_hz[i + offset])

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1061

return stream->lumin_data.refresh_rate_hz[i + offset];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1068

return (int)div64_s64((long long)stream->timing.pix_clk_100hz*100, stream->timing.v_total*(long long)stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

107

stream->audio_info.port_id[0] = 0x5558859e;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1070

return stream->lumin_data.refresh_rate_hz[0];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1076

static int dc_stream_get_max_delta_lumin_millinits(struct dc_stream_state *stream, int hz1, int hz2, bool isGaming)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1078

int lower_refresh_brightness = dc_stream_get_brightness_millinits_from_refresh (stream, hz1);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1079

int higher_refresh_brightness = dc_stream_get_brightness_millinits_from_refresh (stream, hz2);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

108

stream->audio_info.port_id[1] = 0xd989449;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1097

int nearest_smallest_index = dc_stream_get_nearest_smallest_index(stream, hz1);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1100

stream->lumin_data.refresh_rate_hz[nearest_smallest_index + 1] <= hz2 ; nearest_smallest_index++) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1101

min = MIN(min, stream->lumin_data.luminance_millinits[nearest_smallest_index + 1]);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1102

max = MAX(max, stream->lumin_data.luminance_millinits[nearest_smallest_index + 1]);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1112

static unsigned int dc_stream_get_max_flickerless_instant_vtotal_delta(struct dc_stream_state *stream, bool is_gaming, bool increase)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1114

if (stream->timing.v_total * stream->timing.h_total == 0)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1117

int current_refresh_hz = (int)div64_s64((long long)stream->timing.pix_clk_100hz*100, stream->timing.v_total*(long long)stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1119

int safe_refresh_hz = dc_stream_calculate_flickerless_refresh_rate(stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

112

stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1120

dc_stream_get_brightness_millinits_from_refresh(stream, current_refresh_hz),

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1125

int safe_refresh_v_total = (int)div64_s64((long long)stream->timing.pix_clk_100hz*100, safe_refresh_hz*(long long)stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1128

return (((int) stream->timing.v_total - safe_refresh_v_total) >= 0) ? (stream->timing.v_total - safe_refresh_v_total) : 0;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1130

return ((safe_refresh_v_total - (int) stream->timing.v_total) >= 0) ? (safe_refresh_v_total - stream->timing.v_total) : 0;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1137

int dc_stream_calculate_max_flickerless_refresh_rate(struct dc_stream_state *stream, int starting_refresh_hz, bool is_gaming)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1139

if (!stream->lumin_data.is_valid)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

114

memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg));

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1142

int current_brightness = dc_stream_get_brightness_millinits_from_refresh(stream, starting_refresh_hz);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1144

return dc_stream_calculate_flickerless_refresh_rate(stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

115

stream->timing.dsc_cfg.num_slices_h = 0;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1155

int dc_stream_calculate_min_flickerless_refresh_rate(struct dc_stream_state *stream, int starting_refresh_hz, bool is_gaming)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1157

if (!stream->lumin_data.is_valid)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

116

stream->timing.dsc_cfg.num_slices_v = 0;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1160

int current_brightness = dc_stream_get_brightness_millinits_from_refresh(stream, starting_refresh_hz);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1162

return dc_stream_calculate_flickerless_refresh_rate(stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

117

stream->timing.dsc_cfg.bits_per_pixel = 128;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1172

bool dc_stream_is_refresh_rate_range_flickerless(struct dc_stream_state *stream, int hz1, int hz2, bool is_gaming)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1178

if (!stream->lumin_data.is_valid)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

118

stream->timing.dsc_cfg.block_pred_enable = 1;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1181

int dl = dc_stream_get_max_delta_lumin_millinits(stream, hz1, hz2, is_gaming);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1184

stream->lumin_data.flicker_criteria_milli_nits_GAMING :

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1185

stream->lumin_data.flicker_criteria_milli_nits_STATIC;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

119

stream->timing.dsc_cfg.linebuf_depth = 9;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1194

unsigned int dc_stream_get_max_flickerless_instant_vtotal_decrease(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1197

if (!stream->lumin_data.is_valid)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

120

stream->timing.dsc_cfg.version_minor = 2;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1200

return dc_stream_get_max_flickerless_instant_vtotal_delta(stream, is_gaming, true);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1207

unsigned int dc_stream_get_max_flickerless_instant_vtotal_increase(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

121

stream->timing.dsc_cfg.ycbcr422_simple = 0;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1210

if (!stream->lumin_data.is_valid)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1213

return dc_stream_get_max_flickerless_instant_vtotal_delta(stream, is_gaming, false);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1216

bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1221

is_limit_pending = dc_state_get_stream_cursor_subvp_limit(stream, dc->current_state);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1226

bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

123

update_stream_signal(stream, dc_sink_data);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1231

can_clear_limit = dc_state_get_stream_cursor_subvp_limit(stream, dc->current_state) &&

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1232

(stream->hw_cursor_req ||

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1233

!stream->cursor_position.enable ||

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1234

dc_stream_check_cursor_attributes(stream, dc->current_state, &stream->cursor_attributes));

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

125

stream->out_transfer_func.type = TF_TYPE_BYPASS;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

127

dc_stream_assign_stream_id(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

132

void dc_stream_destruct(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

134

dc_sink_release(stream->sink);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

137

void dc_stream_assign_stream_id(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

140

stream->stream_id = stream->ctx->dc_stream_id_count;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

141

stream->ctx->dc_stream_id_count++;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

144

void dc_stream_retain(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

146

kref_get(&stream->refcount);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

151

struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

153

dc_stream_destruct(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

154

kfree(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

157

void dc_stream_release(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

159

if (stream != NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

160

kref_put(&stream->refcount, dc_stream_free);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

167

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

172

stream = kzalloc(sizeof(struct dc_stream_state), GFP_ATOMIC);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

173

if (stream == NULL)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

176

if (dc_stream_construct(stream, sink) == false)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

179

kref_init(&stream->refcount);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

181

return stream;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

184

kfree(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

190

struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

194

new_stream = kmemdup(stream, sizeof(struct dc_stream_state), GFP_KERNEL);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

221

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

223

struct dc *dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

224

return dc_state_get_stream_status(dc->current_state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

229

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

235

if (!stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

243

if (pipe_ctx->stream != stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

271

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

279

if (NULL == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

293

dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

299

max_cursor_size = dc->res_pool->funcs->get_max_hw_cursor_size(dc, state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

314

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

319

if (!stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

322

if (dc_stream_check_cursor_attributes(stream, stream->ctx->dc->current_state, attributes)) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

323

stream->cursor_attributes = *attributes;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

331

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

337

if (!stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

340

dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

342

if (dc_stream_set_cursor_attributes(stream, attributes)) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

350

program_cursor_attributes(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

364

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

370

if (!stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

378

if (pipe_ctx->stream != stream ||

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

400

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

403

if (NULL == stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

413

stream->cursor_position = *position;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

420

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

427

if (!stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

430

old_position = &stream->cursor_position;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

431

dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

433

if (dc_stream_set_cursor_position(stream, position)) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

444

program_cursor_position(dc, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

458

if (stream == pipe_ctx->stream) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

476

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

48

void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

483

if (stream == NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

500

wb_info->dwb_params.out_transfer_func = &stream->out_transfer_func;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

507

for (i = 0; i < stream->num_wb_info; i++) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

509

if (stream->writeback_info[i].wb_enabled &&

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

51

stream->signal = stream->link->connector_signal;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

510

stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

511

stream->writeback_info[i] = *wb_info;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

517

ASSERT(stream->num_wb_info + 1 <= MAX_DWB_PIPES);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

518

stream->writeback_info[stream->num_wb_info++] = *wb_info;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

522

struct dc_stream_status *stream_status = dc_stream_get_status(stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

53

stream->signal = sink->sink_signal;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

55

if (dc_is_dvi_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

550

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

555

if (stream == NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

56

if (stream->ctx->dc->caps.dual_link_dvi &&

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

565

if (stream->num_wb_info > MAX_DWB_PIPES) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

57

(stream->timing.pix_clk_100hz / 10) > TMDS_MAX_PIXEL_CLOCK &&

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

587

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

59

stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

591

if (stream == NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

601

if (stream->num_wb_info > MAX_DWB_PIPES) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

607

for (i = 0, j = 0; i < stream->num_wb_info; i++) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

608

if (stream->writeback_info[i].wb_enabled) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

61

stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

610

if (stream->writeback_info[i].dwb_pipe_inst == dwb_pipe_inst)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

611

stream->writeback_info[i].wb_enabled = false;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

615

memcpy(&stream->writeback_info[j], &stream->writeback_info[i],

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

621

stream->num_wb_info = j;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

642

uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

645

struct dc *dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

65

bool dc_stream_construct(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

654

if (res_ctx->pipe_ctx[i].stream != stream || !tg)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

663

bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

671

if (stream == NULL) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

676

dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

684

if (pipe_ctx->stream != stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

70

stream->sink = dc_sink_data;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

700

bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

711

if (!stream->ctx)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

714

dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

722

if (res_ctx->pipe_ctx[i].stream != stream || !tg)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

73

stream->ctx = dc_sink_data->ctx;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

738

bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

74

stream->link = dc_sink_data->link;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

748

if (pipe->stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

75

stream->sink_patches = dc_sink_data->edid_caps.panel_patch;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

76

stream->converter_disable_audio = dc_sink_data->converter_disable_audio;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

761

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

769

if (!dc_is_hdmi_signal(stream->signal) && !dc_is_dp_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

77

stream->qs_bit = dc_sink_data->edid_caps.qs_bit;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

778

if (pipe_ctx->stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

78

stream->qy_bit = dc_sink_data->edid_caps.qy_bit;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

789

pipe_ctx->stream->dmdata_address = attr->address;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

796

pipe_ctx->stream->dmdata_address.quad_part != 0) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

805

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

808

return dc->res_pool->funcs->add_dsc_to_stream_resource(dc, state, stream);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

814

struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

819

struct pipe_ctx *pipe = &stream->ctx->dc->current_state->res_ctx.pipe_ctx[i];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

821

if (pipe->stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

828

void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

83

stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

832

stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

833

stream->src.x,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

834

stream->src.y,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

835

stream->src.width,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

836

stream->src.height,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

837

stream->dst.x,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

838

stream->dst.y,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

839

stream->dst.width,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

84

stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

840

stream->dst.height,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

841

stream->output_color_space);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

844

stream->timing.pix_clk_100hz / 10,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

845

stream->timing.h_total,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

846

stream->timing.v_total,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

847

dc_pixel_encoding_to_str(stream->timing.pixel_encoding),

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

848

dc_color_depth_to_str(stream->timing.display_color_depth));

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

85

stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

851

stream->link->link_index);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

855

stream->timing.flags.DSC,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

856

stream->timing.dsc_cfg.mst_pbn);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

858

if (stream->sink) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

859

if (stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

86

stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

860

stream->sink->sink_signal != SIGNAL_TYPE_NONE) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

864

stream->sink->edid_caps.display_name,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

865

stream->signal);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

88

stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

881

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

889

dc->res_pool->rmcm_3dlut[i].stream == stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

89

stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

90

stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

901

dc->res_pool->rmcm_3dlut[i].stream = stream;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

913

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

916

dc_stream_get_3dlut_for_stream(dc, stream, false);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

92

stream->audio_info.display_name,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

920

rmcm_3dlut->stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

932

dc->res_pool->rmcm_3dlut[i].stream = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

940

static int dc_stream_get_nearest_smallest_index(struct dc_stream_state *stream, int refresh)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

943

if ((stream->lumin_data.refresh_rate_hz[i] <= refresh) && (refresh < stream->lumin_data.refresh_rate_hz[i + 1])) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

95

stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

953

static int dc_stream_get_brightness_millinits_linear_interpolation (struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

959

if (stream->lumin_data.refresh_rate_hz[index2] != stream->lumin_data.refresh_rate_hz[index1]) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

96

stream->audio_info.product_id = dc_sink_data->edid_caps.product_id;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

960

slope = (stream->lumin_data.luminance_millinits[index2] - stream->lumin_data.luminance_millinits[index1]) /

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

961

(stream->lumin_data.refresh_rate_hz[index2] - stream->lumin_data.refresh_rate_hz[index1]);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

964

int y_intercept = stream->lumin_data.luminance_millinits[index2] - slope * stream->lumin_data.refresh_rate_hz[index2];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

97

stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

972

static int dc_stream_get_refresh_hz_linear_interpolation (struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

978

if (stream->lumin_data.refresh_rate_hz[index2] != stream->lumin_data.refresh_rate_hz[index1]) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

979

slope = (stream->lumin_data.luminance_millinits[index2] - stream->lumin_data.luminance_millinits[index1]) /

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

980

(stream->lumin_data.refresh_rate_hz[index2] - stream->lumin_data.refresh_rate_hz[index1]);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

983

int y_intercept = stream->lumin_data.luminance_millinits[index2] - slope * stream->lumin_data.refresh_rate_hz[index2];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

991

static int dc_stream_get_brightness_millinits_from_refresh (struct dc_stream_state *stream, int refresh_hz)

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

993

int nearest_smallest_index = dc_stream_get_nearest_smallest_index(stream, refresh_hz);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

994

int nearest_smallest_value = stream->lumin_data.refresh_rate_hz[nearest_smallest_index];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

997

return stream->lumin_data.luminance_millinits[nearest_smallest_index];

sys/dev/pci/drm/amd/display/dc/dc.h

1355

const struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/dc.h

1874

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/dc.h

1909

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc.h

1934

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc.h

2408

const struct dc_stream_state *stream, struct psr_config *psr_config,

sys/dev/pci/drm/amd/display/dc/dc.h

2617

void dc_notify_vsync_int_state(struct dc *dc, struct dc_stream_state *stream, bool enable);

sys/dev/pci/drm/amd/display/dc/dc.h

2682

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1015

if ((pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 ||

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1016

pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_1) &&

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1017

pipe_ctx->stream->ctx->dce_version >= DCN_VERSION_3_1)

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1020

if (pipe_ctx->stream->link->replay_settings.config.replay_supported)

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1034

pipe_ctx->stream->link, &panel_inst))

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1137

dc_wake_and_execute_dmub_cmd_list(pCtx->stream->ctx, 2, cmd, DM_DMUB_WAIT_TYPE_WAIT);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1213

struct dc_stream_state *stream = dc->current_state->streams[i];

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1215

if (stream && (!stream->dpms_off || dc->config.disable_ips_in_dpms_off))

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1842

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1851

struct dc_stream_status *stream_status = dc_stream_get_status(stream);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

406

static uint8_t dc_dmub_srv_get_pipes_for_stream(struct dc *dc, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

414

if (pipe->stream == stream && pipe->stream_res.tg)

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

431

if (split_pipe->stream == head_pipe->stream && (split_pipe->top_pipe || split_pipe->prev_odm_pipe)) {

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

463

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

470

stream_status = dc_state_get_stream_status(context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

485

stream_status = dc_state_get_stream_status(context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

488

uint8_t min_refresh_in_hz = (pipe->stream->timing.min_refresh_in_uhz + 999999) / 1000000;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

490

config_data->pipe_data[k].pix_clk_100hz = pipe->stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

493

config_data->pipe_data[k].pipes = dc_dmub_srv_get_pipes_for_stream(dc, pipe->stream);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

536

if (!dc_get_edp_link_panel_inst(dc, pipe_ctx->stream->link, &panel_inst) &&

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

581

struct dc_stream_state *phantom_stream = dc_state_get_paired_subvp_stream(context, subvp_pipe->stream);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

582

struct dc_crtc_timing *main_timing = &subvp_pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

584

struct dc_crtc_timing *drr_timing = &vblank_pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

681

pipe_data->pipe_config.vblank_data.pix_clk_100hz = vblank_pipe->stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

682

pipe_data->pipe_config.vblank_data.vblank_start = vblank_pipe->stream->timing.v_total -

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

683

vblank_pipe->stream->timing.v_front_porch;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

684

pipe_data->pipe_config.vblank_data.vtotal = vblank_pipe->stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

685

pipe_data->pipe_config.vblank_data.htotal = vblank_pipe->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

689

vblank_pipe->stream->timing.v_total - vblank_pipe->stream->timing.v_front_porch - vblank_pipe->stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

691

if (vblank_pipe->stream->ignore_msa_timing_param &&

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

692

(vblank_pipe->stream->allow_freesync || vblank_pipe->stream->vrr_active_variable || vblank_pipe->stream->vrr_active_fixed))

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

724

phantom_stream0 = dc_state_get_paired_subvp_stream(context, subvp_pipes[0]->stream);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

728

phantom_stream1 = dc_state_get_paired_subvp_stream(context, subvp_pipes[1]->stream);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

784

struct dc_stream_state *phantom_stream = dc_state_get_paired_subvp_stream(context, subvp_pipe->stream);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

785

struct dc_crtc_timing *main_timing = &subvp_pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

795

pipe_data->pipe_config.subvp_data.pix_clk_100hz = subvp_pipe->stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

796

pipe_data->pipe_config.subvp_data.htotal = subvp_pipe->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

797

pipe_data->pipe_config.subvp_data.vtotal = subvp_pipe->stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

804

pipe_data->pipe_config.subvp_data.is_drr = subvp_pipe->stream->ignore_msa_timing_param &&

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

805

(subvp_pipe->stream->allow_freesync || subvp_pipe->stream->vrr_active_variable || subvp_pipe->stream->vrr_active_fixed);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

813

reduce_fraction(subvp_pipe->stream->src.height, subvp_pipe->stream->dst.height,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

846

phantom_pipe->stream == dc_state_get_paired_subvp_stream(context, subvp_pipe->stream)) {

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

906

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h

209

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_hw_types.h

505

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

100

spl_in->basic_out.view_format = (enum spl_view_3d)stream->view_format;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

104

populate_splrect_from_rect(&spl_in->basic_out.src_rect, &stream->src);

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

106

populate_splrect_from_rect(&spl_in->basic_out.dst_rect, &stream->dst);

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

121

if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

131

stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right + pipe_ctx->dsc_padding_params.dsc_hactive_padding;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

134

stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.v_border_top;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

136

pipe_ctx->stream->ctx->dc->debug.max_downscale_src_width;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

137

spl_in->basic_out.always_scale = pipe_ctx->stream->ctx->dc->debug.always_scale;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

140

spl_in->basic_out.use_two_pixels_per_container = pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

144

spl_in->prefer_easf = pipe_ctx->stream->ctx->dc->config.prefer_easf;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

146

if (pipe_ctx->stream->ctx->dc->debug.force_easf == 1)

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

148

else if (pipe_ctx->stream->ctx->dc->debug.force_easf == 2)

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

151

unsigned int sharpness_setting = pipe_ctx->stream->ctx->dc->debug.force_sharpness;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

152

unsigned int force_sharpness_level = pipe_ctx->stream->ctx->dc->debug.force_sharpness_level;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

184

if (pipe_ctx->stream->ctx->dc->debug.force_lls > 0)

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

185

spl_in->lls_pref = pipe_ctx->stream->ctx->dc->debug.force_lls;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

189

if (pipe_ctx->stream->ctx->dc->debug.force_cositing)

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

190

spl_in->basic_in.cositing = pipe_ctx->stream->ctx->dc->debug.force_cositing - 1;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

202

(enum scale_to_sharpness_policy)pipe_ctx->stream->ctx->dc->debug.scale_to_sharpness_policy;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

207

spl_in->is_fullscreen = pipe_ctx->stream->sharpening_required;

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

208

spl_in->is_hdr_on = dm_helpers_is_hdr_on(pipe_ctx->stream->ctx, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

79

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/dc_state.h

43

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_state.h

48

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_state.h

52

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state.h

58

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state.h

64

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state.h

69

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state.h

76

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

109

void dc_state_set_stream_subvp_cursor_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

113

bool dc_state_get_stream_subvp_cursor_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

116

void dc_state_set_stream_cursor_subvp_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

120

bool dc_state_get_stream_cursor_subvp_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

123

bool dc_state_can_clear_stream_cursor_subvp_limit(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

40

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

44

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

323

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/dc_stream.h

370

struct dc_stream_state *old_stream, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

372

struct dc_stream_state *old_stream, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

406

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

412

void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

420

uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

425

bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

433

bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

440

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

444

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

448

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

453

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

455

bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

458

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

461

enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

488

struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

490

void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

505

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

509

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

512

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

517

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

521

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

525

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

529

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

534

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

538

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

542

bool dc_stream_forward_crc_window(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

547

bool dc_stream_forward_multiple_crc_window(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

554

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

562

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

569

struct dc_stream_state **stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

573

void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

576

void dc_stream_set_dither_option(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

580

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

583

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

587

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

592

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

596

struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

600

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

604

bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

605

bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream_priv.h

31

bool dc_stream_construct(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream_priv.h

33

void dc_stream_destruct(struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream_priv.h

35

void dc_stream_assign_stream_id(struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dc_stream_priv.h

41

int dc_stream_calculate_max_flickerless_refresh_rate(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream_priv.h

49

int dc_stream_calculate_min_flickerless_refresh_rate(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream_priv.h

56

bool dc_stream_is_refresh_rate_range_flickerless(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream_priv.h

65

unsigned int dc_stream_get_max_flickerless_instant_vtotal_decrease(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_stream_priv.h

72

unsigned int dc_stream_get_max_flickerless_instant_vtotal_increase(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dc_trace.h

31

pipe_ctx->stream, &pipe_ctx->plane_res, \

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

192

if (pipe_ctx->stream == NULL)

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

205

if (dc_is_dp_signal(pipe_ctx->stream->signal) &&

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

505

const struct dc_stream_state *stream = context->streams[j];

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

511

if (stream == context->res_ctx.pipe_ctx[k].stream) {

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

519

if (stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

523

cfg->signal = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

525

cfg->src_height = stream->src.height;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

526

cfg->src_width = stream->src.width;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

528

stream->link->ddi_channel_mapping.raw;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

530

stream->link->link_enc->transmitter;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

532

stream->link->cur_link_settings.lane_count;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

534

stream->link->cur_link_settings.link_rate;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

536

stream->link->cur_link_settings.link_spread;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

537

cfg->sym_clock = stream->phy_pix_clk;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

539

cfg->v_refresh = stream->timing.pix_clk_100hz * 100;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

540

cfg->v_refresh /= stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

541

cfg->v_refresh = (cfg->v_refresh + stream->timing.v_total / 2)

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

542

/ stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

554

struct dc_stream_state *stream = context->streams[j];

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

558

vertical_blank_in_pixels = stream->timing.h_total *

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

559

(stream->timing.v_total

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

560

- stream->timing.v_addressable);

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

563

* 10000 / stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

917

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

922

switch (stream->signal) {

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

927

stream->link->connector_signal,

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

928

stream->signal,

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

929

&stream->timing);

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

934

&stream->timing,

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

935

stream->phy_pix_clk);

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

940

enc110, &stream->timing);

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c

944

is_valid = stream->timing.pixel_encoding == PIXEL_ENCODING_RGB;

sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.h

232

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

140

static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream, uint8_t panel_inst)

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

145

if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED)

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

151

switch (stream->link->psr_settings.psr_version) {

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

306

if (res_ctx->pipe_ctx[i].stream &&

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

307

res_ctx->pipe_ctx[i].stream->link == link &&

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

308

res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) {

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

319

if (!dmub_psr_set_version(dmub, pipe_ctx->stream, panel_inst))

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

382

copy_settings_data->dsc_enable_status = (pipe_ctx->stream->timing.flags.DSC == 1);

sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c

130

res_ctx->pipe_ctx[i].stream &&

sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c

131

res_ctx->pipe_ctx[i].stream->link &&

sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c

132

res_ctx->pipe_ctx[i].stream->link == link &&

sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c

133

res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) {

sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c

178

copy_settings_data->flags.bitfields.dsc_enable_status = (pipe_ctx->stream->timing.flags.DSC == 1);

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

783

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

789

if (stream->sink->edid_caps.panel_patch.skip_scdc_overwrite &&

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

793

switch (stream->signal) {

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

798

stream->link->connector_signal,

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

799

stream->signal,

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

800

&stream->timing);

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

805

&stream->timing,

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

806

&stream->sink->edid_caps,

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

807

stream->phy_pix_clk * 10);

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

812

enc10, &stream->timing);

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

815

is_valid = stream->timing.pixel_encoding == PIXEL_ENCODING_RGB;

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

562

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c

53

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c

55

return dcn10_link_encoder_validate_output_with_stream(enc, stream);

sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.h

84

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

103

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

109

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

116

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

166

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

172

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

177

void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

226

bool dm_helpers_is_fullscreen(struct dc_context *ctx, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

227

bool dm_helpers_is_hdr_on(struct dc_context *ctx, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dm_helpers.h

80

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1030

v->output_format[input_idx] = pipe->stream->timing.pixel_encoding ==

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1032

v->output[input_idx] = pipe->stream->signal ==

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1036

switch (pipe->stream->timing.display_color_depth) {

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1203

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1214

pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1215

pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1216

vesa_sync_start = pipe->stream->timing.v_addressable +

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1217

pipe->stream->timing.v_border_bottom +

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1218

pipe->stream->timing.v_front_porch;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1220

asic_blank_end = (pipe->stream->timing.v_total -

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1222

pipe->stream->timing.v_border_top)

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1223

* (pipe->stream->timing.flags.INTERLACE ? 1 : 0);

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1226

(pipe->stream->timing.v_border_top +

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1227

pipe->stream->timing.v_addressable +

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1228

pipe->stream->timing.v_border_bottom)

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1229

* (pipe->stream->timing.flags.INTERLACE ? 1 : 0);

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1240

((pipe->stream->view_format ==

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1242

pipe->stream->view_format ==

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1244

(pipe->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1246

pipe->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1255

hsplit_pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1256

hsplit_pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1273

hsplit_pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

422

input->dest.vactive = pipe->stream->timing.v_addressable + pipe->stream->timing.v_border_top

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

423

+ pipe->stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

431

input->dest.htotal = pipe->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

432

input->dest.hblank_start = input->dest.htotal - pipe->stream->timing.h_front_porch;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

434

- pipe->stream->timing.h_addressable

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

435

- pipe->stream->timing.h_border_left

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

436

- pipe->stream->timing.h_border_right;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

438

input->dest.vtotal = pipe->stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

439

input->dest.vblank_start = input->dest.vtotal - pipe->stream->timing.v_front_porch;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

441

- pipe->stream->timing.v_addressable

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

442

- pipe->stream->timing.v_border_bottom

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

443

- pipe->stream->timing.v_border_top;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

444

input->dest.pixel_rate_mhz = pipe->stream->timing.pix_clk_100hz/10000.0;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

896

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

905

v->htotal[input_idx] = pipe->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

906

v->vtotal[input_idx] = pipe->stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

907

v->vactive[input_idx] = pipe->stream->timing.v_addressable +

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

908

pipe->stream->timing.v_border_top + pipe->stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

909

v->v_sync_plus_back_porch[input_idx] = pipe->stream->timing.v_total

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

911

- pipe->stream->timing.v_front_porch;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

912

v->pixel_clock[input_idx] = pipe->stream->timing.pix_clk_100hz/10000.0;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

913

if (pipe->stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

920

v->viewport_width[input_idx] = pipe->stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

921

v->viewport_height[input_idx] = pipe->stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1000

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1042

wb_arb_params->time_per_pixel = 16.0 * 1000 / (context->res_ctx.pipe_ctx[i].stream->phy_pix_clk / 1000); /* 4 bit fraction, ms */

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1049

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1180

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1204

context->res_ctx.pipe_ctx[i].stream->adaptive_sync_infopacket.valid)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1206

&context->res_ctx.pipe_ctx[i].stream->timing,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1227

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1326

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1334

if (res_ctx->pipe_ctx[pipe_cnt].stream == res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1339

res_ctx->pipe_ctx[pipe_cnt].stream,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1340

res_ctx->pipe_ctx[i].stream) &&

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1342

res_ctx->pipe_ctx[pipe_cnt].stream,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1343

res_ctx->pipe_ctx[i].stream))) {

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1350

struct dc_crtc_timing *timing = &res_ctx->pipe_ctx[i].stream->timing;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1356

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1371

pipes[pipe_cnt].dout.dsc_enable = res_ctx->pipe_ctx[i].stream->timing.flags.DSC;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1373

pipes[pipe_cnt].dout.dsc_slices = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.num_slices_h;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1374

if (res_ctx->pipe_ctx[i].stream->use_dynamic_meta) {

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1382

dc_is_dp_signal(res_ctx->pipe_ctx[i].stream->signal) ? 36 : 32;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1412

pipes[pipe_cnt].pipe.dest.vtotal_min = res_ctx->pipe_ctx[i].stream->adjust.v_total_min;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1413

pipes[pipe_cnt].pipe.dest.vtotal_max = res_ctx->pipe_ctx[i].stream->adjust.v_total_max;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1450

switch (res_ctx->pipe_ctx[i].stream->signal) {

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1472

switch (res_ctx->pipe_ctx[i].stream->timing.display_color_depth) {

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1502

switch (res_ctx->pipe_ctx[i].stream->timing.pixel_encoding) {

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1513

if (res_ctx->pipe_ctx[i].stream->timing.flags.DSC &&

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1514

!res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.ycbcr422_simple)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1525

if (res_ctx->pipe_ctx[i].stream->timing.flags.DSC)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1526

pipes[pipe_cnt].dout.output_bpp = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.bits_per_pixel / 16.0;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1531

get_audio_check(&res_ctx->pipe_ctx[i].stream->audio_info, &aud_check);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1742

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2252

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2486

struct dc_stream_state *stream = res_ctx->pipe_ctx[i].stream;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2488

if (!stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2495

for (j = 0; j < stream->num_wb_info; j++) {

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2496

struct dc_writeback_info *wb_info = &stream->writeback_info[j];

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

998

struct dc_writeback_info *wb_info = &res_ctx->pipe_ctx[i].stream->writeback_info[0];

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

192

struct dc_stream_state *stream = res_ctx->pipe_ctx[i].stream;

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

194

if (!stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

201

for (j = 0; j < stream->num_wb_info; j++) {

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

202

struct dc_writeback_info *wb_info = &stream->writeback_info[j];

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

479

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

468

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

538

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

573

if (context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

577

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

326

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

329

timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

333

if (pipe->stream->adjust.v_total_min != 0)

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

334

pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min;

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

418

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

421

if (pipe->stream->signal == SIGNAL_TYPE_EDP && dc->debug.seamless_boot_odm_combine &&

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

422

pipe->stream->apply_seamless_boot_optimization) {

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

424

if (pipe->stream->apply_boot_odm_mode == dm_odm_combine_policy_2to1) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1002

refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1003

pipe->stream->timing.v_total * (uint64_t)pipe->stream->timing.h_total - (uint64_t)1);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1004

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1005

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1052

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1112

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1127

struct dc_stream_state *stream, int diff)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1132

if (table->odm_combines[i].stream == stream) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1140

table->odm_combines[i].stream = stream;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1174

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1180

stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1182

&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1187

update_slice_table_for_stream(table, stream, count);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1241

update_slice_table_for_stream(table, pipe->stream, -1);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1256

table, pipe->stream, split[dc_pipe_idx] - 1);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1275

table->odm_combines[i].stream,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1304

struct dc_stream_state *stream = context->streams[0];

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1330

if (dc_is_hdmi_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1337

if (!is_h_timing_divisible_by_2(stream))

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1344

if (stream->timing.pix_clk_100hz * 100 <= DCN3_2_VMIN_DISPCLK_HZ)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1383

&stream->src, sizeof(struct rect)) != 0)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1386

if (stream->src.width >= 5120 &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1387

stream->src.width > stream->dst.width)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1605

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1701

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1741

if (context->res_ctx.pipe_ctx[i].stream && context->res_ctx.pipe_ctx[i].plane_state &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1749

if (context->res_ctx.pipe_ctx[i].stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1759

if (context->res_ctx.pipe_ctx[i].stream->adaptive_sync_infopacket.valid)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1761

&context->res_ctx.pipe_ctx[i].stream->timing,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1790

if (context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1796

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1817

if (old_index >= 0 && context->res_ctx.pipe_ctx[old_index].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1826

if (context->res_ctx.pipe_ctx[i].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1841

if (context->res_ctx.pipe_ctx[i].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1866

pri_pipe->stream->src.x + pri_pipe->stream->src.width/2) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1875

if (pri_pipe->plane_state->clip_rect.x >= pri_pipe->stream->src.x + pri_pipe->stream->src.width/2) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1916

if (sec_pipe->stream->timing.flags.DSC == 1) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2002

pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2022

pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2039

if (!pipe->stream || newly_split[i])

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2115

dcn20_build_mapped_resource(dc, context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2223

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2230

&pipe->stream->src,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2596

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3403

refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3404

(uint64_t)pipe->stream->timing.v_total * pipe->stream->timing.h_total - (uint64_t)1);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3405

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3406

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3449

if (!pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

345

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3451

refresh_rate = (pipe_ctx->stream->timing.pix_clk_100hz * 100 +

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3452

pipe_ctx->stream->timing.v_total * pipe_ctx->stream->timing.h_total - 1)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3453

/ (double)(pipe_ctx->stream->timing.v_total * pipe_ctx->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3459

if (!dc->debug.disable_subvp_high_refresh && min_refresh >= subvp_min_refresh && pipe->stream &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3460

pipe->plane_state && !(pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3461

refresh_rate = (pipe->stream->timing.pix_clk_100hz * 100 +

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3462

pipe->stream->timing.v_total * pipe->stream->timing.h_total - 1)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3463

/ (double)(pipe->stream->timing.v_total * pipe->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3470

if ((context->stream_count == 1 && !pipe->stream->allow_freesync) || context->stream_count > 1) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3539

if (!pipe->stream || !pipe->plane_state)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3543

*fpo_candidate_stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3570

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3574

if (fpo_candidate_stream && pipe->stream == fpo_candidate_stream) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3582

blank_us = ((pipe->stream->timing.v_total - pipe->stream->timing.v_addressable) * pipe->stream->timing.h_total /

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3583

(double)(pipe->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3585

pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed || blank_us >= dc->debug.fpo_vactive_max_blank_us) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

482

struct dc_stream_state *main_stream = ref_pipe->stream;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

490

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

502

(ref_pipe->stream->timing.pix_clk_100hz * 100) /

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

503

(double)ref_pipe->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

567

if (pipe->stream && !pipe->top_pipe) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

614

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

618

refresh_rate = (pipe->stream->timing.pix_clk_100hz * 100 +

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

619

pipe->stream->timing.v_total * pipe->stream->timing.h_total - 1)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

620

/ (double)(pipe->stream->timing.v_total * pipe->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

629

!pipe->stream->hw_cursor_req &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

630

!dc_state_get_stream_cursor_subvp_limit(pipe->stream, context) &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

631

!(pipe->stream->timing.pix_clk_100hz / 10000 > DCN3_2_MAX_SUBVP_PIXEL_RATE_MHZ) &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

646

struct dc_stream_state *stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

647

unsigned int frame_us = (stream->timing.v_total * stream->timing.h_total /

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

648

(double)(stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

743

phantom = dc_state_get_paired_subvp_stream(context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

744

if (phantom && pipe->stream && pipe->plane_state && !pipe->top_pipe &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

765

vactive1_us = ((subvp_pipes[0]->stream->timing.v_addressable * subvp_pipes[0]->stream->timing.h_total) /

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

766

(double)(subvp_pipes[0]->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

767

vactive2_us = ((subvp_pipes[1]->stream->timing.v_addressable * subvp_pipes[1]->stream->timing.h_total) /

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

768

(double)(subvp_pipes[1]->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

769

vblank1_us = (((subvp_pipes[0]->stream->timing.v_total - subvp_pipes[0]->stream->timing.v_addressable) *

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

770

subvp_pipes[0]->stream->timing.h_total) /

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

771

(double)(subvp_pipes[0]->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

772

vblank2_us = (((subvp_pipes[1]->stream->timing.v_total - subvp_pipes[1]->stream->timing.v_addressable) *

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

773

subvp_pipes[1]->stream->timing.h_total) /

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

774

(double)(subvp_pipes[1]->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

843

if (dc_state_get_pipe_subvp_type(context, drr_pipe) == SUBVP_NONE && drr_pipe->stream->ignore_msa_timing_param &&

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

844

(drr_pipe->stream->allow_freesync || drr_pipe->stream->vrr_active_variable || drr_pipe->stream->vrr_active_fixed)) {

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

850

phantom_stream = dc_state_get_paired_subvp_stream(context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

852

main_timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

854

drr_timing = &drr_pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

944

phantom_stream = dc_state_get_paired_subvp_stream(context, subvp_pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

945

main_timing = &subvp_pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

947

vblank_timing = &context->res_ctx.pipe_ctx[vblank_index].stream->timing;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

997

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

458

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

462

timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

467

if (pipe->stream->adjust.v_total_max ==

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

468

pipe->stream->adjust.v_total_min &&

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

469

pipe->stream->adjust.v_total_min > timing->v_total) {

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

471

pipe->stream->adjust.v_total_min;

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

559

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

562

if (pipe->stream->signal == SIGNAL_TYPE_EDP &&

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

564

pipe->stream->apply_seamless_boot_optimization) {

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

566

if (pipe->stream->apply_boot_odm_mode ==

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

491

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

495

timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

500

if (pipe->stream->adjust.v_total_max ==

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

501

pipe->stream->adjust.v_total_min &&

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

502

pipe->stream->adjust.v_total_min > timing->v_total) {

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

504

pipe->stream->adjust.v_total_min;

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

592

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

595

if (pipe->stream->signal == SIGNAL_TYPE_EDP &&

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

597

pipe->stream->apply_seamless_boot_optimization) {

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

599

if (pipe->stream->apply_boot_odm_mode ==

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

100

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

102

timing->h_total = stream->timing.h_total + pipe_ctx->dsc_padding_params.dsc_htotal_padding;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

103

timing->v_total = stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

104

timing->h_sync_width = stream->timing.h_sync_width;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

105

timing->interlaced = stream->timing.flags.INTERLACE;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

107

hblank_start = stream->timing.h_total - stream->timing.h_front_porch;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

109

timing->h_blank_end = hblank_start - stream->timing.h_addressable - pipe_ctx->dsc_padding_params.dsc_hactive_padding

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

110

- stream->timing.h_border_left - stream->timing.h_border_right;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

112

if (hblank_start < stream->timing.h_addressable)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

115

vblank_start = stream->timing.v_total - stream->timing.v_front_porch;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

117

timing->v_blank_end = vblank_start - stream->timing.v_addressable

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

118

- stream->timing.v_border_top - stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

120

timing->drr_config.enabled = stream->ignore_msa_timing_param;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

121

timing->drr_config.drr_active_variable = stream->vrr_active_variable;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

122

timing->drr_config.drr_active_fixed = stream->vrr_active_fixed;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

123

timing->drr_config.disallowed = !stream->allow_freesync;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

126

min_hardware_refresh_in_uhz = stream->timing.min_refresh_in_uhz;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

127

if (stream->ctx->dc->caps.max_v_total != 0) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

131

pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

134

(timing->h_total * (long long)calc_max_hardware_v_total(stream)));

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

137

timing->drr_config.min_refresh_uhz = max(stream->timing.min_refresh_in_uhz, min_hardware_refresh_in_uhz);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

140

stream->ctx->dc->config.enable_fpo_flicker_detection == 1)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

141

timing->drr_config.max_instant_vtotal_delta = dml_ctx->config.callbacks.get_max_flickerless_instant_vtotal_increase(stream, false);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

145

if (stream->timing.flags.DSC) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

147

timing->dsc.overrides.num_slices = stream->timing.dsc_cfg.num_slices_h;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

148

timing->dsc.dsc_compressed_bpp_x16 = stream->timing.dsc_cfg.bits_per_pixel;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

152

switch (stream->timing.display_color_depth) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

186

struct dc_stream_state *stream, const struct pipe_ctx *pipe)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

190

switch (stream->signal) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

209

switch (stream->timing.pixel_encoding) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

218

if (stream->timing.flags.DSC && !stream->timing.dsc_cfg.ycbcr422_simple)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

228

switch (stream->signal) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

244

output->audio_sample_layout = stream->audio_info.modes->sample_size;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

245

output->audio_sample_rate = stream->audio_info.modes->max_bit_rate;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

254

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

257

switch (stream->debug.force_odm_combine_segments) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

277

if (!stream->ctx->dc->debug.enable_single_display_2to1_odm_policy ||

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

278

stream->debug.force_odm_combine_segments > 0)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

280

stream_desc->overrides.disable_subvp = stream->ctx->dc->debug.force_disable_subvp ||

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

281

stream->hw_cursor_req ||

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

368

static void populate_dml21_dummy_surface_cfg(struct dml2_surface_cfg *surface, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

370

surface->plane0.width = stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

371

surface->plane0.height = stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

372

surface->plane1.width = stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

373

surface->plane1.height = stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

384

static void populate_dml21_dummy_plane_cfg(struct dml2_plane_parameters *plane, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

388

if (stream->timing.h_addressable > 3840)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

391

width = stream->timing.h_addressable; // 4K max

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

393

if (stream->timing.v_addressable > 2160)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

396

height = stream->timing.v_addressable; // 4K max

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

480

temp_pipe->stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

501

struct dc_stream_state *stream = context->streams[stream_index];

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

639

plane_state->dst_rect.height >= stream->src.height &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

640

stream->dst.height >= stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

665

static unsigned int map_stream_to_dml21_display_cfg(const struct dml2_context *dml_ctx, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

671

if (dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id_valid[i] && dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id[i] == stream->stream_id) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

74

static unsigned int calc_max_hardware_v_total(const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

76

unsigned int max_hw_v_total = stream->ctx->dc->caps.max_v_total;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

78

if (stream->ctx->dc->caps.vtotal_limited_by_fp2) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

79

max_hw_v_total -= stream->timing.v_front_porch + 1;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

86

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

93

timing->h_active = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right + pipe_ctx->dsc_padding_params.dsc_hactive_padding;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

94

timing->v_active = stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.v_border_top;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

95

timing->h_front_porch = stream->timing.h_front_porch;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

96

timing->v_front_porch = stream->timing.v_front_porch;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

97

timing->pixel_clock_khz = stream->timing.pix_clk_100hz / 10;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

170

if (dc_pipe->stream && dc_pipe->plane_state &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

192

dc_is_dp_signal(pipe_ctx->stream->signal));

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

203

if (pipe_ctx->stream && dc_state_get_paired_subvp_stream(context, pipe_ctx->stream) &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

236

bool sub_vp_enabled = is_sub_vp_enabled(pipe_ctx->stream->ctx->dc, context);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

400

struct dc_stream_state *stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

403

dml_ctx->config.svp_pstate.callbacks.get_stream_subvp_type(context, stream) == SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

408

dml_stream_idx = dml21_helper_find_dml_pipe_idx_by_stream_id(dml_ctx, stream->stream_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

441

if (context->res_ctx.pipe_ctx[k].stream &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

442

context->res_ctx.pipe_ctx[k].stream->stream_id == stream->stream_id &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

459

phantom_stream = dml_ctx->config.svp_pstate.callbacks.get_paired_subvp_stream(context, stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

478

if (context->res_ctx.pipe_ctx[k].stream &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

479

context->res_ctx.pipe_ctx[k].stream->stream_id == phantom_stream->stream_id &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

348

if (num_pipes <= 0 || dc_main_pipes[0]->stream == NULL ||

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

361

dc_main_pipes[0]->stream &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

388

if (num_pipes <= 0 || dc_main_pipes[0]->stream == NULL ||

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

405

dc_main_pipes[0]->stream &&

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

525

const struct dml2_stream_parameters *stream;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

536

stream = &params->display_cfg->stream_descriptors[plane->stream_index];

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

547

temp = (unsigned int)math_ceil(plane->composition.scaler_info.plane0.h_ratio * stream->timing.h_active / odm_combine_factor);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

553

temp = (unsigned int)math_ceil(plane->composition.scaler_info.plane1.h_ratio * stream->timing.h_active / odm_combine_factor);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

593

stream->timing.h_active, num_dpps, scaling_transform,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

604

stream->timing.h_active, num_dpps, scaling_transform,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

1007

stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

114

if (state->res_ctx.pipe_ctx[i].stream && state->res_ctx.pipe_ctx[i].stream->stream_id == stream_id) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

1167

pipe->stream &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

131

state->res_ctx.pipe_ctx[i].stream->stream_id,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

151

if (!pipe->plane_state || !pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

154

get_plane_id(ctx, state, pipe->plane_state, pipe->stream->stream_id,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

237

if (!pipe->plane_state && !pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

267

if (existing_state->res_ctx.pipe_ctx[i].stream && existing_state->res_ctx.pipe_ctx[i].stream->stream_id == stream_id) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

515

static void calculate_odm_slices(const struct dc_stream_state *stream, unsigned int odm_factor, unsigned int *odm_slice_end_x)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

525

slice_size = stream->src.width / odm_factor;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

530

odm_slice_end_x[odm_factor - 1] = stream->src.width - 1;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

591

if (pipe->stream && pipe->stream->stream_id == stream_id && !pipe->top_pipe && !pipe->prev_odm_pipe) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

604

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

618

master_pipe = find_master_pipe_of_stream(ctx, state, stream->stream_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

621

pipes_assigned = find_pipes_assigned_to_stream(ctx, state, stream->stream_id, pipes);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

623

find_more_free_pipes(ctx, state, stream->stream_id, pipes, &pipes_assigned, pipes_needed - pipes_assigned, existing_state);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

638

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

654

if (!get_plane_id(ctx, state, plane, stream->stream_id, plane_index, &plane_id)) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

666

find_more_pipes_for_stream(ctx, state, stream->stream_id, pipes, &pipes_assigned, pipes_needed - pipes_assigned, existing_state);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

708

state->res_ctx.pipe_ctx[i].stream->stream_id == stream_id &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

734

static void map_pipes_for_stream(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

741

master_pipe = assign_pipes_to_stream(ctx, state, stream, scratch->odm_info.odm_factor, &scratch->pipe_pool, existing_state);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

754

static void map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream, const struct dc_plane_state *plane,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

762

if (!get_plane_id(ctx, state, plane, stream->stream_id, plane_index, &plane_id)) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

767

master_pipe = assign_pipes_to_plane(ctx, state, stream, plane, scratch->odm_info.odm_factor,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

788

free_unused_pipes_for_plane(ctx, state, plane, &scratch->pipe_pool, stream->stream_id, plane_index);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

796

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

805

stream->stream_id, plane_idx, &plane_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

809

if (ctx->config.svp_pstate.callbacks.get_stream_subvp_type(state, stream) == SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

814

main_stream = ctx->config.svp_pstate.callbacks.get_paired_subvp_stream(state, stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

831

stream->stream_id, plane_idx, &plane_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

842

if (dml2_is_stereo_timing(stream))

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

853

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

859

mapping, stream->stream_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

871

if (ctx->config.svp_pstate.callbacks.get_stream_subvp_type(state, stream) == SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

875

main_stream = ctx->config.svp_pstate.callbacks.get_paired_subvp_stream(state, stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

884

mapping, stream->stream_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

897

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

899

struct pipe_ctx *otg_master = ctx->config.callbacks.get_otg_master_for_stream(&state->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

957

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

978

stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

986

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

121

pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

139

pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

153

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

194

if (pipe->stream && !pipe->top_pipe) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

242

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

246

refresh_rate = (pipe->stream->timing.pix_clk_100hz * 100 +

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

247

pipe->stream->timing.v_total * pipe->stream->timing.h_total - 1)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

248

/ (double)(pipe->stream->timing.v_total * pipe->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

265

struct dc_stream_state *stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

266

unsigned int frame_us = (stream->timing.v_total * stream->timing.h_total /

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

267

(double)(stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

268

if (frame_us > max_frame_time && !stream->ignore_msa_timing_param) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

276

} else if (stream->ignore_msa_timing_param && (!valid_assignment_found ||

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

319

if (pipe->stream && !pipe->top_pipe &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

374

if (pipe->stream && pipe->plane_state && !pipe->top_pipe &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

376

phantom = ctx->config.svp_pstate.callbacks.get_paired_subvp_stream(context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

396

vactive1_us = ((subvp_pipes[0]->stream->timing.v_addressable * subvp_pipes[0]->stream->timing.h_total) /

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

397

(double)(subvp_pipes[0]->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

398

vactive2_us = ((subvp_pipes[1]->stream->timing.v_addressable * subvp_pipes[1]->stream->timing.h_total) /

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

399

(double)(subvp_pipes[1]->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

400

vblank1_us = (((subvp_pipes[0]->stream->timing.v_total - subvp_pipes[0]->stream->timing.v_addressable) *

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

401

subvp_pipes[0]->stream->timing.h_total) /

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

402

(double)(subvp_pipes[0]->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

403

vblank2_us = (((subvp_pipes[1]->stream->timing.v_total - subvp_pipes[1]->stream->timing.v_addressable) *

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

404

subvp_pipes[1]->stream->timing.h_total) /

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

405

(double)(subvp_pipes[1]->stream->timing.pix_clk_100hz * 100)) * 1000000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

453

if (!pipe->stream || !pipe->plane_state || pipe->top_pipe || pipe->prev_odm_pipe)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

461

phantom_stream = ctx->config.svp_pstate.callbacks.get_paired_subvp_stream(context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

462

main_timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

53

if (pipe->stream && pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

539

if (!pipe->stream || !pipe->plane_state || pipe->top_pipe || pipe->prev_odm_pipe)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

552

if (found && context->res_ctx.pipe_ctx[vblank_index].stream->ignore_msa_timing_param) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

554

schedulable = dml2_svp_drr_schedulable(ctx, context, &context->res_ctx.pipe_ctx[vblank_index].stream->timing);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

556

phantom_stream = ctx->config.svp_pstate.callbacks.get_paired_subvp_stream(context, subvp_pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

557

main_timing = &subvp_pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

559

vblank_timing = &context->res_ctx.pipe_ctx[vblank_index].stream->timing;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

613

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

667

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

677

(ref_pipe->stream->timing.pix_clk_100hz * 100) /

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

678

(double)ref_pipe->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

70

mall_alloc_height_blk_aligned = (pipe->stream->timing.v_addressable - 1 + mblk_height - 1) /

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

719

ref_pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

722

memcpy(&phantom_stream->timing, &ref_pipe->stream->timing, sizeof(phantom_stream->timing));

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

723

memcpy(&phantom_stream->src, &ref_pipe->stream->src, sizeof(phantom_stream->src));

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

724

memcpy(&phantom_stream->dst, &ref_pipe->stream->dst, sizeof(phantom_stream->dst));

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

730

ref_pipe->stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

799

if (pipe->plane_state && pipe->stream && pipe->stream == phantom_stream &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

801

pipe->stream->use_dynamic_meta = false;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

810

static bool remove_all_phantom_planes_for_stream(struct dml2_context *ctx, struct dc_stream_state *stream, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

817

if (context->streams[i] == stream) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

832

if (!ctx->config.svp_pstate.callbacks.remove_phantom_plane(ctx->config.svp_pstate.callbacks.dc, stream, del_planes[i], context))

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

849

if (pipe->plane_state && pipe->stream && ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(state, pipe) == SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

850

phantom_stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

893

if (!pipe_ctx->plane_state || !pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

900

dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(ctx, state->res_ctx.pipe_ctx[dc_pipe_idx].stream->stream_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1131

const struct dc_stream_state *stream, const struct dml_display_cfg_st *dml_dispcfg)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1137

if (dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id_valid[i] && dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id[i] == stream->stream_id) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1207

if (!pipe || !pipe->stream || !pipe->plane_state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1213

if (pipe->stream && dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] == false) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1280

if (current_pipe_context->stream &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1283

dc_is_dp_signal(current_pipe_context->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1320

if (context->streams[i] == context->res_ctx.pipe_ctx[k].stream) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

990

temp_pipe->stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

158

if (pipe_ctx == NULL || pipe_ctx->stream == NULL)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

166

dc_is_dp_signal(pipe_ctx->stream->signal));

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

174

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

243

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

247

hblank_start = pipe_ctx->stream->timing.h_total - pipe_ctx->stream->timing.h_front_porch;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

248

vblank_start = pipe_ctx->stream->timing.v_total - pipe_ctx->stream->timing.v_front_porch;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

262

pipe_ctx->pipe_dlg_param.htotal = pipe_ctx->stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

263

pipe_ctx->pipe_dlg_param.vtotal = pipe_ctx->stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

268

pipe_ctx->pipe_dlg_param.vfront_porch = pipe_ctx->stream->timing.v_front_porch;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

269

pipe_ctx->pipe_dlg_param.pixel_rate_mhz = pipe_ctx->stream->timing.pix_clk_100hz / 10000.00;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

271

pipe_ctx->pipe_dlg_param.vtotal_max = pipe_ctx->stream->adjust.v_total_max;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

272

pipe_ctx->pipe_dlg_param.vtotal_min = pipe_ctx->stream->adjust.v_total_min;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

299

if (!context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

306

context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

310

dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

316

ASSERT(in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[dml_pipe_idx] == context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

347

if (context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream && context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_state &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

440

if (context->res_ctx.pipe_ctx[i].stream->phy_pix_clk != 0) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

443

(1000000 << 6) / context->res_ctx.pipe_ctx[i].stream->phy_pix_clk;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

520

if (!display_state->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

523

display_state->res_ctx.pipe_ctx[i].stream->stream_id,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

527

dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, display_state->res_ctx.pipe_ctx[i].stream->stream_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

545

bool dml2_is_stereo_timing(const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

549

if ((stream->view_format ==

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

551

stream->view_format ==

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

553

(stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

555

stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

46

bool dml2_is_stereo_timing(const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

96

enum dc_status dml2_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

106

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

109

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

127

bool (*add_phantom_plane)(const struct dc *dc, struct dc_stream_state *stream, struct dc_plane_state *plane_state, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

129

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

134

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

140

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

143

enum mall_stream_type (*get_stream_subvp_type)(const struct dc_state *state, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

144

struct dc_stream_state *(*get_paired_subvp_stream)(const struct dc_state *state, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

82

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

97

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1097

if (param->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&

sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1101

hubp->cur_rect.w = param->stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1102

hubp->cur_rect.h = param->stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1086

if (!pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1089

dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1091

link_hwss = get_link_hwss(pipe_ctx->stream->link, &pipe_ctx->link_res);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1122

if (!pipe_ctx || !pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1125

dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1127

link_hwss = get_link_hwss(pipe_ctx->stream->link, &pipe_ctx->link_res);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1151

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1152

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1153

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1165

if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1175

} else if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1185

dto_params.timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1205

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1206

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1210

params.timing = pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1213

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1223

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1224

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1240

} else if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1243

if (!dc_is_embedded_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1252

if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1297

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1298

const struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1303

dp_link_info->is_mst = (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1329

struct dc_crtc_timing *crtc_timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1390

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1393

audio_output->signal = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1398

stream->timing.h_total;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1405

stream->timing.h_addressable

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1406

+ stream->timing.h_border_left

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1407

+ stream->timing.h_border_right;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1410

stream->timing.v_addressable

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1411

+ stream->timing.v_border_top

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1412

+ stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1417

stream->timing.flags.INTERLACE;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1420

(stream->timing.pix_clk_100hz*100)/

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1421

(stream->timing.h_total*stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1424

stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1433

stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1436

stream->timing.dsc_cfg.bits_per_pixel;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1439

stream->timing.dsc_cfg.num_slices_h;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1442

if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal) &&

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1444

(stream->timing.pix_clk_100hz)) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1455

(pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT ||

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1456

pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1472

if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1490

pipe_ctx->stream->output_color_space,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1496

&pipe_ctx->stream->bit_depth_params);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1504

if (pipe_ctx->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1521

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1526

if (!pipe_ctx_old->stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1530

stream->output_color_space, &black_color);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1550

if (dc_is_hdmi_tmds_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1551

stream->link->phy_state.symclk_ref_cnts.otg = 1;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1552

if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1553

stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1555

stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1560

&stream->timing,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1566

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1570

if (!pipe_ctx_old->stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1586

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1587

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1610

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1612

&pipe_ctx->stream->audio_info,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1622

if (!pipe_ctx->stream->apply_seamless_boot_optimization && dc->config.use_pipe_ctx_sync_logic)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1627

&stream->bit_depth_params,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1628

&stream->clamping);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1633

stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1634

stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1640

stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1641

stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1645

&stream->bit_depth_params,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1646

&stream->clamping);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1658

if (!pipe_ctx->stream->apply_seamless_boot_optimization)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1664

params.vertical_total_min = stream->adjust.v_total_min;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1665

params.vertical_total_max = stream->adjust.v_total_max;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1666

set_drr_and_clear_adjust_pending(pipe_ctx, stream, &params);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1669

if (stream->adjust.v_total_min != 0 && stream->adjust.v_total_max != 0)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1679

if (!dc_is_virtual_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1684

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1691

if (pipe_ctx->stream->timing.flags.DSC) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1692

if ((pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1695

(dc_is_dp_signal(pipe_ctx->stream->signal) ||

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1696

dc_is_virtual_signal(pipe_ctx->stream->signal)))

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1700

if (!stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1709

if (!pipe_ctx->stream->apply_seamless_boot_optimization)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1720

pipe_ctx->stream->link->psr_settings.psr_feature_enabled = false;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1721

pipe_ctx->stream->link->replay_settings.replay_feature_enabled = false;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2032

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2040

(stream->timing.h_total * 10) /

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2041

stream->timing.pix_clk_100hz +

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2058

if (pipe_ctx->stream == NULL)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2062

dc->bw_vbios->blackout_duration, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2096

if (res_ctx->pipe_ctx[i].stream == NULL || res_ctx->pipe_ctx[i].plane_res.mi == NULL)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2147

set_drr_and_clear_adjust_pending(pipe_ctx[i], pipe_ctx[i]->stream, &params);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2184

struct dc *dc = pipe_ctx[0]->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2220

if (res_ctx->pipe_ctx[i].stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2235

if (!pipe_ctx->stream->link)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2239

if (pipe_ctx->stream->link->connector_signal != SIGNAL_TYPE_EDP)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2243

if (pipe_ctx->stream->link->psr_settings.psr_feature_enabled)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2247

if (pipe_ctx->stream->link->replay_settings.replay_feature_enabled)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2276

params.source_view_width = pipe_ctx->stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2277

params.source_view_height = pipe_ctx->stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2307

if (!pipe_ctx_old->stream || pipe_ctx_old->top_pipe)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2310

if (!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2317

if (!pipe_ctx->stream || !pipe_ctx->stream->dpms_off) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2343

if (dc_is_hdmi_tmds_signal(pipe_ctx_old->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2344

pipe_ctx_old->stream->link->phy_state.symclk_ref_cnts.otg = 0;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2355

pipe_ctx_old->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2388

if (pipe_ctx->stream == NULL)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2393

if (pipe_ctx->stream->signal != SIGNAL_TYPE_HDMI_TYPE_A)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2408

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2414

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2426

if (pipe_ctx->stream == NULL)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2432

if (!dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2442

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2483

if (pipe_ctx->stream == NULL || pipe_ctx->top_pipe)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2486

if (pipe_ctx->stream == pipe_ctx_old->stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2512

if (pipe_ctx->stream == NULL)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2515

if (pipe_ctx->stream == pipe_ctx_old->stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2516

pipe_ctx->stream->link->link_state_valid) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2520

if (pipe_ctx_old->stream && !pipe_need_reprogram(pipe_ctx_old, pipe_ctx))

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2557

default_adjust.out_color_space = pipe_ctx->stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2563

pipe_ctx->stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2628

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2633

pipe_ctx->stream->gamut_remap_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2792

&grouped_pipes[i]->stream->triggered_crtc_reset);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2934

if (pipe_ctx->stream->csc_color_matrix.enable_adjustment

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2937

pipe_ctx->stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2941

pipe_ctx->stream->csc_color_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2947

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2952

pipe_ctx->stream->gamut_remap_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2986

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3028

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3043

if (pipe_ctx->stream != stream)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3049

pipe_ctx->stream->timing.h_total,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3050

pipe_ctx->stream->timing.v_total,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3051

pipe_ctx->stream->timing.pix_clk_100hz / 10,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3079

if (dc->current_state->res_ctx.pipe_ctx[fe_idx].stream)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3106

if (pipe_ctx->stream->csc_color_matrix.enable_adjustment == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3107

enum dc_color_space color_space = pipe_ctx->stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3110

tbl_entry.regval[i] = pipe_ctx->stream->csc_color_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3121

struct dc_cursor_position pos_cpy = pipe_ctx->stream->cursor_position;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3125

.pixel_clk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3126

.ref_clk_khz = pipe_ctx->stream->ctx->dc->res_pool->ref_clocks.xtalin_clock_inKhz,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3166

struct dc_cursor_attributes *attributes = &pipe_ctx->stream->cursor_attributes;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3189

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3222

struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3226

pipe_ctx->stream->link->panel_cntl->inst);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3235

struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3301

if (pipes[i].stream != NULL &&

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3302

pipes[i].stream->link == link) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3307

pipes[i].stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

608

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

615

if (stream->out_transfer_func.type == TF_TYPE_PREDEFINED &&

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

616

stream->out_transfer_func.tf == TRANSFER_FUNCTION_SRGB) {

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

618

} else if (dce110_translate_regamma_to_hw_format(&stream->out_transfer_func,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

636

ASSERT(pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

641

is_hdmi_tmds = dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

642

is_dp = dc_is_dp_signal(pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

666

pipe_ctx->stream->link->cur_link_settings.lane_count;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

667

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

668

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

126

params.source_view_width = pipe_ctx->stream->timing.h_addressable;

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

127

params.source_view_height = pipe_ctx->stream->timing.v_addressable;

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

149

default_adjust.out_color_space = pipe_ctx->stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

155

pipe_ctx->stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

243

pipe_ctx->stream->output_color_space,

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

249

&pipe_ctx->stream->bit_depth_params);

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

257

if (pipe_ctx->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

289

if (pipe_ctx->stream->csc_color_matrix.enable_adjustment

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

292

pipe_ctx->stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

296

pipe_ctx->stream->csc_color_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

302

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

307

pipe_ctx->stream->gamut_remap_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

341

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

383

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

398

if (pipe_ctx->stream != stream)

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

404

pipe_ctx->stream->timing.h_total,

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

405

pipe_ctx->stream->timing.v_total,

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

406

pipe_ctx->stream->timing.pix_clk_100hz / 10,

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

71

if (res_ctx->pipe_ctx[i].stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

89

if (!pipe_ctx->stream->link)

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

93

if (pipe_ctx->stream->link->connector_signal != SIGNAL_TYPE_EDP)

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

97

if (pipe_ctx->stream->link->psr_settings.psr_feature_enabled)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

104

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

110

if (!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1125

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1139

if (old_pipe_ctx->stream != stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

116

pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1183

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1210

if (dc_is_hdmi_tmds_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1211

stream->link->phy_state.symclk_ref_cnts.otg = 1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1212

if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1213

stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1215

stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1220

&stream->timing,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1226

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1237

&stream->bit_depth_params,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1238

&stream->clamping);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1241

color_space = stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1249

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1261

false_optc_underflow_wa(dc, pipe_ctx->stream, pipe_ctx->stream_res.tg);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1290

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1294

link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1301

if (!pipe_ctx->stream->dpms_off || link->link_status.link_active)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1332

set_drr_and_clear_adjust_pending(pipe_ctx, pipe_ctx->stream, NULL);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1333

if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1334

pipe_ctx->stream->link->phy_state.symclk_ref_cnts.otg = 0;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1344

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

141

lines_to_vupdate = stream->timing.v_total - vpos + vupdate_start;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

146

stream->timing.h_total * 10000u / stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

150

vupdate_end += stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

152

if (lines_to_vupdate > stream->timing.v_total - vupdate_end + vupdate_start)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1545

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1592

if (pipe_ctx->stream != NULL && can_apply_seamless_boot)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1616

if (pipe_ctx->stream != NULL && can_apply_seamless_boot)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1632

if (pipe_ctx->stream != NULL && can_apply_seamless_boot)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1650

pipe_ctx->stream != NULL &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

183

if (!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1959

if (!pipe_ctx_old->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1965

if (!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1985

(pipe_ctx->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1987

pipe_ctx->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1994

if (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_NONE &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2110

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2114

if (!stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2122

if (stream->out_transfer_func.type == TF_TYPE_PREDEFINED &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2123

stream->out_transfer_func.tf == TRANSFER_FUNCTION_SRGB)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2130

&stream->out_transfer_func,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2138

if (stream->ctx) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2139

log_tf(stream->ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2140

&stream->out_transfer_func,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2192

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2214

lines_to_vupdate = stream->timing.v_total - vpos + vupdate_start;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2219

stream->timing.h_total * 10000u / stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2224

vupdate_end += stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2227

if (lines_to_vupdate > stream->timing.v_total - vupdate_end + vupdate_start)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2248

if (pipe->stream && should_use_dmub_lock(pipe->stream->link)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2356

pipe->stream->timing.pix_clk_100hz * 100 /

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2357

pipe->stream->timing.h_total /

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2358

pipe->stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

238

!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2424

grouped_pipes[i]->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2446

grouped_pipes[i]->stream->has_non_synchronizable_pclk = true;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2452

if (i != embedded && !grouped_pipes[i]->stream->has_non_synchronizable_pclk) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2460

grouped_pipes[i]->stream->timing.pix_clk_100hz =

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2501

if (grouped_pipes[i]->stream == NULL)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2503

grouped_pipes[i]->stream->vblank_synchronized = false;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2504

grouped_pipes[i]->stream->has_non_synchronizable_pclk = false;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2515

if (i != master && !grouped_pipes[i]->stream->has_non_synchronizable_pclk)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2519

grouped_pipes[master]->stream->timing.pix_clk_100hz,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2520

grouped_pipes[i]->stream->timing.pix_clk_100hz,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2523

grouped_pipes[i]->stream->vblank_synchronized = true;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2525

grouped_pipes[master]->stream->vblank_synchronized = true;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2555

if (grouped_pipes[i]->stream && dc_state_get_pipe_subvp_type(state, grouped_pipes[i]) == SUBVP_PHANTOM)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2572

if (grouped_pipes[i]->stream == NULL)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2575

if (grouped_pipes[i]->stream && dc_state_get_pipe_subvp_type(state, grouped_pipes[i]) == SUBVP_PHANTOM)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2578

grouped_pipes[i]->stream->vblank_synchronized = false;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2582

if (grouped_pipes[i]->stream && dc_state_get_pipe_subvp_type(state, grouped_pipes[i]) == SUBVP_PHANTOM)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2596

if (grouped_pipes[1]->stream && dc_state_get_pipe_subvp_type(state, grouped_pipes[1]) != SUBVP_PHANTOM)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2600

if (grouped_pipes[i]->stream && dc_state_get_pipe_subvp_type(state, grouped_pipes[i]) == SUBVP_PHANTOM)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2637

&grouped_pipes[i]->stream->triggered_crtc_reset);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2777

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2781

pipe_ctx->stream->gamut_remap_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2832

if (pipe_ctx->stream->csc_color_matrix.enable_adjustment == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2905

pipe_ctx->stream->output_color_space)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3092

if (pipe_ctx->stream->cursor_attributes.address.quad_part != 0) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3106

pipe_ctx->stream->output_color_space,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3107

pipe_ctx->stream->csc_color_matrix.matrix,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3147

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3150

color_space = stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3158

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3172

stream_res->abm->funcs->set_abm_level(stream_res->abm, stream->abm_level);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3220

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing, true);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3247

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3266

!pipe_ctx->stream || !pipe_ctx->plane_state ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3293

pipe_ctx->stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3297

false_optc_underflow_wa(dc, pipe_ctx->stream, tg);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3434

set_drr_and_clear_adjust_pending(pipe_ctx[i], pipe_ctx[i]->stream, &params);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3475

struct dc_stream_state *stream, struct crtc_stereo_flags *flags)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3477

enum view_3d_format view_format = stream->view_format;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3479

stream->timing.timing_3d_format;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3497

if (stream->link && stream->link->ddc) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3499

stream->link->ddc->dongle_type;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3508

stream->timing.flags.RIGHT_EYE_3D_POLARITY;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3519

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3521

dcn10_config_stereo_parameters(stream, &flags);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3523

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_SIDEBAND_FA) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3533

&stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3537

&stream->timing,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3602

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3645

struct dc_cursor_position pos_cpy = pipe_ctx->stream->cursor_position;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3649

.pixel_clk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3650

.ref_clk_khz = pipe_ctx->stream->ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3656

.stream = pipe_ctx->stream,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3865

struct dc_cursor_attributes *attributes = &pipe_ctx->stream->cursor_attributes;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3875

uint32_t sdr_white_level = pipe_ctx->stream->cursor_attributes.sdr_white_level;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3920

const struct dc_crtc_timing *dc_crtc_timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3950

const struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3966

const struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3967

int vline_pos = pipe_ctx->stream->periodic_interrupt.lines_offset;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3969

if (pipe_ctx->stream->periodic_interrupt.ref_point == START_V_UPDATE) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3981

} else if (pipe_ctx->stream->periodic_interrupt.ref_point == START_V_SYNC) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4020

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4021

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4025

params.timing = pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4029

if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4044

if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

77

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1014

if (pipe_ctx->stream->csc_color_matrix.enable_adjustment == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1030

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1046

if (stream->out_transfer_func.type == TF_TYPE_HWPWL)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1047

params = &stream->out_transfer_func.pwl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1048

else if (pipe_ctx->stream->out_transfer_func.type ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1051

&stream->out_transfer_func,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1057

if (stream->out_transfer_func.type == TF_TYPE_PREDEFINED)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1211

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1221

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1222

enum dc_color_space color_space = stream->output_color_space;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1228

if (stream->link->test_pattern_enabled)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1253

stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1266

stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1275

stream_res->abm->funcs->set_abm_level(stream_res->abm, stream->abm_level);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1460

if (pipe->stream && should_use_dmub_lock(pipe->stream->link)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1534

if (new_pipe->stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1550

if (new_pipe->stream && dc_state_get_pipe_subvp_type(new_state, new_pipe) == SUBVP_PHANTOM)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1711

&pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1777

pipe_ctx->stream->update_flags.bits.scaling) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1788

(context == dc->current_state && pipe_ctx->stream->update_flags.bits.scaling)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1803

pipe_ctx->stream->cursor_attributes.address.quad_part != 0) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1815

|| pipe_ctx->stream->update_flags.bits.gamut_remap

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1817

|| pipe_ctx->stream->update_flags.bits.out_csc) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1824

pipe_ctx->stream->output_color_space,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1825

pipe_ctx->stream->csc_color_matrix.matrix,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1921

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing, true);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1938

pipe_ctx->stream->update_flags.bits.abm_level)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1974

pipe_ctx->stream->update_flags.raw))

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1994

pipe_ctx->stream->update_flags.bits.out_tf)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1995

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2008

pipe_ctx->stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2009

pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2013

&pipe_ctx->stream->bit_depth_params,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2014

&pipe_ctx->stream->clamping);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2022

pipe_ctx->stream->abm_level);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2095

struct dc_stream_state *stream = dc->current_state->res_ctx.pipe_ctx[i].stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2099

if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable && stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2116

&& context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2177

if (pipe->stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2189

&& pipe->stream && pipe->stream->num_wb_info > 0

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2191

|| pipe->stream->update_flags.raw)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2193

hws->funcs.program_all_writeback_pipes_in_tree(dc, pipe->stream, context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2198

pipe->stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2320

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2392

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_NONE) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2436

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_NONE) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2475

if (pipe_ctx->stream && pipe_ctx->plane_res.hubp->funcs->program_extended_blank

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2476

&& pipe_ctx->stream->adjust.v_total_min == pipe_ctx->stream->adjust.v_total_max

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2477

&& pipe_ctx->stream->adjust.v_total_max > pipe_ctx->stream->timing.v_total)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2517

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing, false);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2648

dc_is_hdmi_signal(pipe_ctx->stream->signal) ? 32 : 36;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2650

pipe_ctx->stream->dmdata_address.quad_part;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2708

(pipe_ctx->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2710

pipe_ctx->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2718

if (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_NONE &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2761

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2762

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2766

pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2774

params.timing = pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2783

} else if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2814

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2821

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2831

if (!pipe_ctx->stream->dpms_off || link->link_status.link_active)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2864

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2866

set_drr_and_clear_adjust_pending(pipe_ctx, pipe_ctx->stream, NULL);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2871

if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2875

&pipe_ctx->link_res, pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2881

dto_params.timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2892

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2914

if (!pipe_ctx_old->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2920

if (!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3020

pipe_ctx->stream->link->cur_link_settings.lane_count;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3022

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3023

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3029

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3043

dto_params.pixclk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3045

dto_params.timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3087

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3107

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3111

enum dynamic_metadata_mode mode = dc_is_dp_signal(stream->signal)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3116

if (pipe_ctx->stream->dmdata_address.quad_part != 0) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

739

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

777

static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

786

flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable -

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

787

stream->timing.h_border_left -

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

788

stream->timing.h_border_right;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

837

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

842

bool interlace = stream->timing.flags.INTERLACE;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

847

pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

904

dto_params.pixclk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

906

dto_params.timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

911

if (dc_is_hdmi_tmds_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

912

stream->link->phy_state.symclk_ref_cnts.otg = 1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

913

if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

914

stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

916

stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

919

if (dc->hwseq->funcs.PLAT_58856_wa && (!dc_is_dp_signal(stream->signal)))

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

924

&stream->timing,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

930

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

936

flow_control.flow_ctrl_cnt1 = calc_mpc_flow_ctrl_cnt(stream, opp_cnt,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

954

stream->timing.pixel_encoding,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

966

udelay(stream->timing.v_total * (stream->timing.h_total * 10000u / stream->timing.pix_clk_100hz));

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

968

params.vertical_total_min = stream->adjust.v_total_min;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

969

params.vertical_total_max = stream->adjust.v_total_max;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

970

params.vertical_total_mid = stream->adjust.v_total_mid;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

971

params.vertical_total_mid_frame_num = stream->adjust.v_total_mid_frame_num;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

972

set_drr_and_clear_adjust_pending(pipe_ctx, stream, &params);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

975

if (stream->adjust.v_total_min != 0 && stream->adjust.v_total_max != 0)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

48

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

441

dc, pipe_ctx->stream->output_color_space,

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

558

struct dc_cursor_attributes *attributes = &pipe_ctx->stream->cursor_attributes;

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

560

gpu_addr_to_uma(pipe_ctx->stream->ctx->dc->hwseq, &attributes->address);

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

573

gpu_addr_to_uma(pipe_ctx->stream->ctx->dc->hwseq,

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

574

&pipe_ctx->stream->dmdata_address);

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

578

dc_is_hdmi_signal(pipe_ctx->stream->signal) ? 32 : 36;

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

580

pipe_ctx->stream->dmdata_address.quad_part;

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

595

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

596

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

600

params.timing = pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

604

if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

606

if (pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing))

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

64

(pipe_ctx->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

66

pipe_ctx->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

73

if (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_NONE &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

131

if (!pipe_ctx->stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

134

pipe_ctx->stream->dpms_off = false;

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

135

pipe_ctx->stream->ctx->dc->link_srv->set_dpms_on(context, pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

136

pipe_ctx->stream->ctx->dc->link_srv->set_dpms_off(pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

137

pipe_ctx->stream->dpms_off = true;

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

183

struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

184

struct dmcu *dmcu = pipe_ctx->stream->ctx->dc->res_pool->dmcu;

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

188

if (pipe_ctx->stream->abm_level == 0 || pipe_ctx->stream->abm_level == ABM_LEVEL_IMMEDIATE_DISABLE) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

216

struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

217

struct dmcu *dmcu = pipe_ctx->stream->ctx->dc->res_pool->dmcu;

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

247

struct dc_context *dc = pipe_ctx->stream->ctx;

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

250

struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

289

struct dc_state *context, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

296

if (pipe_ctx->stream == stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h

57

struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1069

dc_stream_program_cursor_attributes(stream, &cursor_attr);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1156

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

254

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

258

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

266

if (stream->func_shaper) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

267

if (stream->func_shaper->type == TF_TYPE_HWPWL) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

268

shaper_lut = &stream->func_shaper->pwl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

269

} else if (stream->func_shaper->type == TF_TYPE_DISTRIBUTED_POINTS) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

270

cm_helper_translate_curve_to_hw_format(stream->ctx, stream->func_shaper,

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

276

if (stream->lut3d_func &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

277

stream->lut3d_func->state.bits.initialized == 1 &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

278

stream->lut3d_func->state.bits.rmu_idx_valid == 1) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

279

if (stream->lut3d_func->state.bits.rmu_mux_num == 0)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

280

mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu0_mux;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

281

else if (stream->lut3d_func->state.bits.rmu_mux_num == 1)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

282

mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu1_mux;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

283

else if (stream->lut3d_func->state.bits.rmu_mux_num == 2)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

284

mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu2_mux;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

291

stream->lut3d_func->state.bits.rmu_mux_num);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

292

if (acquired_rmu != stream->lut3d_func->state.bits.rmu_mux_num)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

295

result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d,

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

296

stream->lut3d_func->state.bits.rmu_mux_num);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

301

stream->lut3d_func->state.bits.rmu_mux_num);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

380

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

384

pipe_ctx->stream->gamut_remap_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

393

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

403

ret = dcn30_set_mpc_shaper_3dlut(pipe_ctx, stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

405

if (stream->out_transfer_func.type == TF_TYPE_HWPWL)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

406

params = &stream->out_transfer_func.pwl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

407

else if (pipe_ctx->stream->out_transfer_func.type ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

409

cm3_helper_translate_curve_to_hw_format(stream->ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

410

&stream->out_transfer_func,

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

414

if (stream->out_transfer_func.type == TF_TYPE_PREDEFINED)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

574

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

583

ASSERT(stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

585

if (context->streams[i_stream] == stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

592

ASSERT(stream->num_wb_info <= dc->res_pool->res_cap->num_dwb);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

594

for (i_wb = 0; i_wb < stream->num_wb_info; i_wb++) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

597

wb_info = stream->writeback_info[i_wb];

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

835

if (dc_is_hdmi_signal(pipe_ctx->stream->signal) && pipe_ctx->stream_res.stream_enc != NULL) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

856

ASSERT(pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

861

is_hdmi_tmds = dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

862

is_dp = dc_is_dp_signal(pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

885

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

889

enum dynamic_metadata_mode mode = dc_is_dp_signal(stream->signal)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

894

if (pipe_ctx->stream->dmdata_address.quad_part != 0) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

915

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

944

stream = dc->current_state->streams[0];

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

945

plane = (stream ? dc->current_state->stream_status[0].plane_states[0] : NULL);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

947

if (!stream || !plane)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

950

if (stream && plane) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

951

cursor_cache_enable = stream->cursor_position.enable &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

953

cursor_attr = stream->cursor_attributes;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

966

stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

975

unsigned int v_total = stream->adjust.v_total_max ?

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

976

stream->adjust.v_total_max : stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

977

unsigned int refresh_hz = div_u64((unsigned long long) stream->timing.pix_clk_100hz *

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

978

100LL, (v_total * stream->timing.h_total));

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

37

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

70

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

383

ASSERT(pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

388

is_hdmi_tmds = dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

389

is_dp = dc_is_dp_signal(pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

398

else if (pipe_ctx->stream->ctx->dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

520

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

527

link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

532

if ((!pipe_ctx->stream->dpms_off || link->link_status.link_active) &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

548

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

554

if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

561

link_hwss->disable_link_output(link, &pipe_ctx->link_res, pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

566

set_drr_and_clear_adjust_pending(pipe_ctx, pipe_ctx->stream, NULL);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

574

if (!pipe_ctx->stream->dpms_off || link->link_status.link_active)

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

583

if (pipe_ctx->stream->timing.flags.DSC) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

584

if ((pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

587

(dc_is_dp_signal(pipe_ctx->stream->signal) ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

588

dc_is_virtual_signal(pipe_ctx->stream->signal)))

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

608

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

626

if (!pipe_ctx_old->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

632

if (!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

710

struct dc_context *dc = pipe_ctx->stream->ctx;

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

713

struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h

57

struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

103

dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

104

dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

105

dsc_cfg.pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

106

dsc_cfg.color_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

108

dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

191

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

212

update_dsc_on_stream(pipe_ctx, pipe_ctx->stream->timing.flags.DSC);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

329

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

333

two_pix_per_container = pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

336

if (stream->ctx->dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

339

} else if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal) || dc_is_dvi_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

341

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

345

} else if (dc_is_dp_signal(pipe_ctx->stream->signal) || dc_is_virtual_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

366

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

373

pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

386

return pipe && pipe->stream

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

391

&& pipe->stream->link && pipe->stream->link->link_enc

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

392

&& pipe->stream->link->link_enc->funcs->is_dig_enabled

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

393

&& pipe->stream->link->link_enc->funcs->is_dig_enabled(pipe->stream->link->link_enc)

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

414

if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal)) &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

415

!pipe->stream->apply_seamless_boot_optimization &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

416

!pipe->stream->apply_edp_fast_boot_optimization) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

489

if (pipe_ctx->stream && pipe_ctx->stream->link == link && pipe_ctx->top_pipe == NULL) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

65

stream->ctx->logger

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

75

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.h

42

void dcn314_calculate_pix_rate_divider(struct dc *dc, struct dc_state *context, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1016

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1017

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1031

stream->timing.pix_clk_100hz > 480000;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1057

dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_padding +

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1058

stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1059

dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1060

dsc_cfg.pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1061

dsc_cfg.color_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1063

dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1148

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1156

pipe_ctx->stream->timing.pixel_encoding,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1163

dcn32_update_dsc_on_stream(pipe_ctx, pipe_ctx->stream->timing.flags.DSC);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1185

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1188

struct dce_hwseq *hws = stream->ctx->dc->hwseq;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1190

two_pix_per_container = pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1193

if (stream->ctx->dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1196

} else if (dc_is_hdmi_tmds_signal(stream->signal) || dc_is_dvi_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1198

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1202

} else if (dc_is_dp_signal(stream->signal) || dc_is_virtual_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1224

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1231

pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1262

if ((pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1306

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1307

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1318

params.timing = pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1327

} else if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1328

if (pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing) ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1345

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1347

if (!is_h_timing_divisible_by_2(pipe_ctx->stream))

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1350

if (dc_is_dp_signal(pipe_ctx->stream->signal) && !dc->link_srv->dp_is_128b_132b_signal(pipe_ctx) &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1380

if (resource_is_pipe_type(pipe_ctx, OPP_HEAD) && pipe_ctx->stream->link == link) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1438

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1439

dc_state_get_paired_subvp_stream(context, pipe->stream) == phantom_pipe->stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1546

if (!pipe_ctx_old->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1555

if (!pipe_ctx->stream || pipe_need_reprogram(pipe_ctx_old, pipe_ctx) ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1556

(pipe_ctx->stream && dc_state_get_pipe_subvp_type(context, pipe_ctx) != SUBVP_PHANTOM)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1583

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1584

old_pipe->stream && dc_state_get_pipe_subvp_type(dc->current_state, old_pipe) != SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1598

if (pipe_ctx->stream == NULL)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1604

if (pipe_ctx->stream == pipe_ctx_old->stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1605

pipe_ctx->stream->link->link_state_valid) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1609

if (pipe_ctx_old->stream && !pipe_need_reprogram(pipe_ctx_old, pipe_ctx))

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1726

const struct dc_stream_state *cur_paired_stream = dc_state_get_paired_subvp_stream(cur_ctx, cur_pipe->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1727

const struct dc_stream_state *new_paired_stream = dc_state_get_paired_subvp_stream(new_ctx, new_pipe->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1753

if (cur_pipe->stream->stream_id == new_pipe->stream->stream_id ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

234

if (!pipe->stream || !pipe->plane_state)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

356

if (pipe_ctx->stream && dc_state_get_pipe_subvp_type(context, pipe_ctx) == SUBVP_MAIN) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

388

if (pipe->stream && pipe->plane_state && pipe_mall_type == SUBVP_MAIN) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

394

if (top_pipe_to_program && top_pipe_to_program->stream && top_pipe_to_program->plane_state) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

407

if (pipe->stream && pipe->plane_state && pipe_mall_type == SUBVP_MAIN &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

440

struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

444

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

450

if (stream->func_shaper) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

451

if (stream->func_shaper->type == TF_TYPE_HWPWL)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

452

shaper_lut = &stream->func_shaper->pwl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

453

else if (stream->func_shaper->type == TF_TYPE_DISTRIBUTED_POINTS) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

454

cm_helper_translate_curve_to_hw_format(stream->ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

455

stream->func_shaper,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

461

if (stream->lut3d_func &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

462

stream->lut3d_func->state.bits.initialized == 1) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

464

result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, mpcc_id);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

564

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

574

ret = dcn32_set_mpc_shaper_3dlut(pipe_ctx, stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

576

if (stream->out_transfer_func.type == TF_TYPE_HWPWL)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

577

params = &stream->out_transfer_func.pwl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

578

else if (pipe_ctx->stream->out_transfer_func.type ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

580

cm3_helper_translate_curve_to_hw_format(stream->ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

581

&stream->out_transfer_func,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

585

if (stream->out_transfer_func.type == TF_TYPE_PREDEFINED)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

613

if (pipe->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

614

stream_status = dc_state_get_stream_status(context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

616

if (!pipe->stream || !(dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

646

if (pipe->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

647

stream_status = dc_state_get_stream_status(context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

648

if (old_pipe->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

649

old_stream_status = dc_state_get_stream_status(dc->current_state, old_pipe->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

651

if (pipe->stream && (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

653

(!old_pipe->stream || (dc_state_get_pipe_subvp_type(dc->current_state, old_pipe) != SUBVP_MAIN &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

677

if (pipe->stream && pipe->plane_state && hubp && hubp->funcs->hubp_update_mall_sel) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

706

pipe->stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

737

if (pipe->stream && hubp && hubp->funcs->hubp_prepare_subvp_buffering) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

58

struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

62

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

94

void dcn32_calculate_pix_rate_divider(struct dc *dc, struct dc_state *context, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1043

(!cur_pipe->stream && new_pipe->stream) ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1044

(cur_pipe->stream != new_pipe->stream && new_pipe->stream)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1425

if (pipe_ctx[i]->stream && pipe_ctx[i]->stream->ctx->dc->debug.static_screen_wait_frames) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1426

struct dc_crtc_timing *timing = &pipe_ctx[i]->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1427

struct dc *dc = pipe_ctx[i]->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1436

set_drr_and_clear_adjust_pending(pipe_ctx[i], pipe_ctx[i]->stream, &params);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1475

if (pipe_ctx[i]->stream) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1476

struct dc_crtc_timing *timing = &pipe_ctx[i]->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1502

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1504

const struct dc *dc = pipe_ctx->stream->link->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1510

if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1547

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1549

if (!is_h_timing_divisible_by_2(pipe_ctx->stream))

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1555

if (dc_is_dp_signal(pipe_ctx->stream->signal) && !dc->link_srv->dp_is_128b_132b_signal(pipe_ctx) &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

330

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

334

DC_LOGGER_INIT(stream->ctx->logger);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

359

dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

360

dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

361

dsc_cfg.pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

362

dsc_cfg.color_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

364

dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

447

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

468

update_dsc_on_stream(pipe_ctx, pipe_ctx->stream->timing.flags.DSC);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

573

struct dc_stream_state *stream = dc->current_state->streams[i];

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

574

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

581

if (stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

585

if (!dc_is_embedded_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

644

if (pipe_ctx->stream != NULL && can_apply_seamless_boot)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

668

if (pipe_ctx->stream != NULL && can_apply_seamless_boot)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

684

if (pipe_ctx->stream != NULL && can_apply_seamless_boot)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

702

pipe_ctx->stream != NULL &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

888

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1029

if (pipe_ctx->stream && pipe_ctx->stream->link == link && pipe_ctx->top_pipe == NULL) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1075

struct dc_cursor_position pos_cpy = pipe_ctx->stream->cursor_position;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1079

.pixel_clk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1080

.ref_clk_khz = pipe_ctx->stream->ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1087

.stream = pipe_ctx->stream

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1129

x_pos = pipe_ctx->stream->dst.x + x_pos * pipe_ctx->stream->dst.width /

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1130

pipe_ctx->stream->src.width;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1131

y_pos = pipe_ctx->stream->dst.y + y_pos * pipe_ctx->stream->dst.height /

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1132

pipe_ctx->stream->src.height;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

125

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1254

if (!pipe->stream || !pipe->plane_state)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

129

pipe_ctx->stream->gamut_remap_matrix.matrix[i];

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1469

if (pipe_ctx->stream && pipe_ctx->plane_res.hubp->funcs->program_extended_blank

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1470

&& pipe_ctx->stream->adjust.v_total_min == pipe_ctx->stream->adjust.v_total_max

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1471

&& pipe_ctx->stream->adjust.v_total_max > pipe_ctx->stream->timing.v_total)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1550

otg_master->stream->timing.flags.DSC);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1585

&otg_master->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1593

opp_heads[i]->stream->timing.pixel_encoding,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1611

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1612

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1618

params.timing = pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1626

} else if (dc_is_dp_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1671

if (!otg_master->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1816

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1821

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1831

if (!pipe_ctx->stream->dpms_off || link->link_status.link_active)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1864

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1866

set_drr_and_clear_adjust_pending(pipe_ctx, pipe_ctx->stream, NULL);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1872

if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1876

&pipe_ctx->link_res, pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1890

pipe_ctx->stream = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1912

if (!pipe_ctx_old->stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1918

if (!pipe_ctx->stream ||

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1976

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing, true);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1993

pipe_ctx->stream->update_flags.bits.abm_level)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2028

pipe_ctx->stream->update_flags.raw))

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2048

pipe_ctx->stream->update_flags.bits.out_tf)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2049

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2062

pipe_ctx->stream->timing.display_color_depth,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2063

pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2067

&pipe_ctx->stream->bit_depth_params,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2068

&pipe_ctx->stream->clamping);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2076

pipe_ctx->stream->abm_level);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2151

struct dc_stream_state *stream = dc->current_state->res_ctx.pipe_ctx[i].stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2155

if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable && stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2172

&& context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2234

if (pipe->stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2246

&& pipe->stream && pipe->stream->num_wb_info > 0

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2248

|| pipe->stream->update_flags.raw)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2250

hws->funcs.program_all_writeback_pipes_in_tree(dc, pipe->stream, context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2255

pipe->stream &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2343

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2432

pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing, false);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2446

&pipe_ctx->stream->timing);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2504

if (new_pipe->stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE &&

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2520

if (new_pipe->stream && dc_state_get_pipe_subvp_type(new_state, new_pipe) == SUBVP_PHANTOM)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

666

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

676

ret = dcn32_set_mpc_shaper_3dlut(pipe_ctx, stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

678

if (stream->out_transfer_func.type == TF_TYPE_HWPWL)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

679

params = &stream->out_transfer_func.pwl;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

680

else if (pipe_ctx->stream->out_transfer_func.type ==

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

682

cm3_helper_translate_curve_to_hw_format(stream->ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

683

&stream->out_transfer_func,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

687

if (stream->out_transfer_func.type == TF_TYPE_PREDEFINED)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

701

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

703

if (dc_is_tmds_signal(stream->signal) || dc_is_virtual_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

704

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

729

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

732

if (dc_is_tmds_signal(stream->signal) || dc_is_virtual_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

739

if (dc_is_tmds_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

740

stream->link->phy_state.symclk_ref_cnts.otg = 1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

741

if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

742

stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

744

stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

747

params->vertical_total_min = stream->adjust.v_total_min;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

748

params->vertical_total_max = stream->adjust.v_total_max;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

749

params->vertical_total_mid = stream->adjust.v_total_mid;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

750

params->vertical_total_mid_frame_num = stream->adjust.v_total_mid_frame_num;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

753

if (stream->adjust.v_total_min != 0 && stream->adjust.v_total_max != 0)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

763

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

769

struct dc_crtc_timing patched_crtc_timing = stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

802

if (dc_is_dp_signal(stream->signal) || dc_is_virtual_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

821

if (dc->hwseq->funcs.PLAT_58856_wa && (!dc_is_dp_signal(stream->signal)))

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

839

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

848

stream->timing.pixel_encoding,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

865

set_drr_and_clear_adjust_pending(pipe_ctx, stream, &params);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

917

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

918

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

920

pipe_ctx->stream->link->cur_link_settings.lane_count;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

925

*phyd32clk = get_phyd32clk_src(pipe_ctx->stream->link);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

928

if (dc_is_tmds_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

951

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

953

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

968

if (dc_is_dp_signal(pipe_ctx->stream->signal) || dc_is_virtual_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

999

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

42

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

111

const struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

227

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

352

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

419

struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

544

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

144

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

89

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

133

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

167

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

175

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

206

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

225

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

448

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/inc/hw/link_encoder.h

111

struct link_encoder *enc, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/hw/link_encoder.h

192

struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h

105

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h

71

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/link_service.h

141

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/inc/link_service.h

208

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/inc/link_service.h

211

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/inc/link_service.h

274

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/inc/link_service.h

290

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

111

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

294

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

303

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

346

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

380

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

580

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

585

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

591

void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

622

bool is_h_timing_divisible_by_2(struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

122

pipes[i]->stream->signal,

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

124

&pipes[i]->stream->audio_info,

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

152

stream_update.stream = streams_on_link[i];

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

268

for (modes = 0; modes < pipe_ctx->stream->audio_info.mode_count; modes++) {

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

487

stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

507

pipe_ctx->stream->bit_depth_params = params;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

545

resource_build_bit_depth_reduction_params(pipe_ctx->stream, &params);

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

546

pipe_ctx->stream->bit_depth_params = params;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

666

if (pipes[i].stream == NULL)

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

670

pipes[i].stream->link == link) {

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

876

if (!pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

880

if (should_use_dmub_lock(pipe_ctx->stream->link)) {

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

899

pipe_ctx->stream->output_color_space = color_space;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

902

if (pipe_ctx->stream->use_vsc_sdp_for_colorimetry) {

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

904

pipe_ctx->stream->vsc_infopacket.sb[17] |= (1 << 7); // sb17 bit 7 Dynamic Range: 0 = VESA range, 1 = CTA range

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

906

pipe_ctx->stream->vsc_infopacket.sb[17] &= ~(1 << 7);

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

909

pipe_ctx->stream->vsc_infopacket.sb[16] &= 0xf0;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

911

pipe_ctx->stream->vsc_infopacket.sb[16] |= 1;

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

928

if (should_use_dmub_lock(pipe_ctx->stream->link)) {

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

974

if (pipe->stream && pipe->stream->link) {

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

975

if (pipe->stream->link == link) {

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

976

link_stream = pipe->stream;

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

100

pipe_ctx->stream->signal, false);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

105

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

106

pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

107

pipe_ctx->stream->link,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

115

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

116

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

118

if (!dc_is_virtual_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

122

stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

124

if (dc_is_dp_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

127

&stream->timing,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

128

stream->output_color_space,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

129

stream->use_vsc_sdp_for_colorimetry,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

131

else if (dc_is_hdmi_tmds_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

134

&stream->timing,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

135

stream->phy_pix_clk,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

137

else if (dc_is_dvi_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

140

&stream->timing,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

141

stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

142

else if (dc_is_lvds_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

145

&stream->timing);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

147

if (dc_is_dp_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

252

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

256

&pipe_ctx->stream->audio_info);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

261

&pipe_ctx->stream->audio_info,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

267

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

274

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

275

pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

276

pipe_ctx->stream->link,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

286

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

294

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

295

pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

296

pipe_ctx->stream->link,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

54

if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment)

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

55

link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

63

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

64

pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(pipe_ctx->stream->link,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

68

pipe_ctx->stream->signal, true);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

84

if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment)

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c

85

link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

100

stream->use_vsc_sdp_for_colorimetry,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

101

stream->timing.flags.DSC,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

184

&pipe_ctx->stream->audio_info);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

52

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

56

pipe_ctx->stream->link, link_settings);

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

93

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

94

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

98

&stream->timing,

sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

99

stream->output_color_space,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1015

if (!pipe_ctx->stream->timing.flags.DSC)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1038

if (!pipe_ctx->stream->timing.flags.DSC)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1050

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1052

if (pipe_ctx->stream->signal != SIGNAL_TYPE_DISPLAY_PORT_MST) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1053

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1065

(stream->ignore_msa_timing_param) ? 1 : 0;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1073

dm_helpers_mst_enable_stream_features(stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1117

static struct fixed31_32 get_pbn_per_slot(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1120

uint32_t link_rate_in_mbytes_per_sec = dp_link_bandwidth_kbps(stream->link,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1121

&stream->link->cur_link_settings);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1167

kbps = dc_bandwidth_in_kbps_from_timing(&pipe_ctx->stream->timing, link_encoding);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1332

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1333

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1362

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1363

stream,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1416

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1417

stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1420

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1421

stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1431

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1432

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1449

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1450

stream,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1499

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1500

stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1504

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1505

stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1508

pbn_per_slot = get_pbn_per_slot(stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1529

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1539

dc_bandwidth_in_kbps_from_timing(&stream->timing,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1549

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1566

avg_time_slots_per_mtp = link_calculate_sst_avg_time_slots_per_mtp(stream, link);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1659

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1660

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1684

stream,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

171

streams[i] = pipes[i]->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1720

avg_time_slots_per_mtp = link_calculate_sst_avg_time_slots_per_mtp(stream, link);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

174

stream_update.stream = streams[i];

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1741

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1742

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1752

pbn_per_slot = get_pbn_per_slot(stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1765

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1766

stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1770

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1771

stream,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1821

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1822

stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1829

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1830

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1842

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1843

stream,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1888

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1889

stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1894

stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1895

stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1900

pbn_per_slot = get_pbn_per_slot(stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1965

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1966

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1971

bool is_vga_mode = (stream->timing.h_addressable == 640)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1972

&& (stream->timing.v_addressable == 480);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1973

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1976

if (stream->phy_pix_clk == 0)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1977

stream->phy_pix_clk = stream->timing.pix_clk_100hz / 10;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1978

if (stream->phy_pix_clk > 340000)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1980

if (dc_is_tmds_signal(stream->signal) && stream->phy_pix_clk > 6000000UL) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1985

if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

1986

unsigned short masked_chip_caps = pipe_ctx->stream->link->chip_caps &

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

199

pipe->stream->link == link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2005

if (dc_is_hdmi_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2007

stream->link->ddc,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2008

stream->phy_pix_clk,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2009

stream->timing.flags.LTE_340MCSC_SCRAMBLE);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2011

memset(&stream->link->cur_link_settings, 0,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2014

display_color_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2015

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2021

if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal) || dc_is_dvi_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2027

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2030

stream->phy_pix_clk);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2032

if (dc_is_hdmi_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2039

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2042

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2079

pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2083

pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2088

if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2120

if (stream->sink_patches.oled_optimize_display_on)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2127

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2146

if (!stream->sink_patches.oled_optimize_display_on) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2168

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2169

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2170

struct dc *dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2172

if (stream->phy_pix_clk == 0)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2173

stream->phy_pix_clk = stream->timing.pix_clk_100hz / 10;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2175

memset(&stream->link->cur_link_settings, 0,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2181

stream->phy_pix_clk);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2189

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

219

pipe->stream->dpms_off == false) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2216

struct dc_link *link = pipe_ctx->stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2231

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2232

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2241

disable_link(link, &pipe_ctx->link_res, pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2243

switch (pipe_ctx->stream->signal) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2272

pipe_ctx->stream->link->link_status.link_active = true;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2278

static bool allocate_usb4_bandwidth_for_stream(struct dc_stream_state *stream, int bw)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2280

struct dc_link *link = stream->sink->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2288

if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2296

if (stream->sink->sink_id != link->remote_sinks[i]->sink_id)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2310

if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

232

pipe_ctx->stream->ctx->dc_bios->integrated_info;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2325

static bool allocate_usb4_bandwidth(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2329

int bw = dc_bandwidth_in_kbps_from_timing(&stream->timing,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2330

dc_link_get_highest_encoding_format(stream->sink->link));

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2332

ret = allocate_usb4_bandwidth_for_stream(stream, bw);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2337

static bool deallocate_usb4_bandwidth(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2341

ret = allocate_usb4_bandwidth_for_stream(stream, 0);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2348

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2349

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2350

struct dc_link *link = stream->sink->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2354

DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2360

if (dc_is_virtual_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2363

if (pipe_ctx->stream->sink) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2364

if (pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2365

pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_NONE) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2367

pipe_ctx->stream->sink->edid_caps.display_name,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2368

pipe_ctx->stream->signal, link->link_index, link->sink_count);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2372

if (!pipe_ctx->stream->sink->edid_caps.panel_patch.skip_avmute) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2373

if (dc_is_hdmi_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2383

deallocate_usb4_bandwidth(pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2385

if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2387

else if (dc_is_dp_sst_signal(pipe_ctx->stream->signal) &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2391

if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2416

if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2426

disable_link(pipe_ctx->stream->link, &pipe_ctx->link_res, pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2430

disable_link(pipe_ctx->stream->link, &pipe_ctx->link_res, pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2434

if (pipe_ctx->stream->timing.flags.DSC) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2435

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2449

enum dp_panel_mode panel_mode = dp_get_panel_mode(pipe_ctx->stream->link);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2459

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2460

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2461

struct dc_link *link = stream->sink->link;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2468

pipe_ctx->stream->apply_edp_fast_boot_optimization;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2470

DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2476

if (dc_is_virtual_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2479

if (pipe_ctx->stream->sink) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2480

if (pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2481

pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_NONE) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2483

pipe_ctx->stream->sink->edid_caps.display_name,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2484

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2494

if (!dc_is_virtual_signal(pipe_ctx->stream->signal)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2499

pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2502

pipe_ctx->stream->link->link_state_valid = true;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2514

pipe_ctx->stream->apply_edp_fast_boot_optimization = false;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2523

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2527

if (pipe_ctx->stream->apply_seamless_boot_optimization) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2528

pipe_ctx->stream->dpms_off = false;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2531

if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2541

if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2543

!pipe_ctx->stream->timing.flags.DSC &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2545

pipe_ctx->stream->dpms_off = false;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2558

if (pipe_ctx->stream->dpms_off)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2576

if (pipe_ctx->stream->timing.flags.DSC) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2577

if (dc_is_dp_signal(pipe_ctx->stream->signal) ||

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2578

dc_is_virtual_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2586

pipe_ctx->stream->link->link_index,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2595

pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2596

if (false == stream->link->link_status.link_active)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2597

disable_link(stream->link, &pipe_ctx->link_res,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2598

pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2614

if (!(dc_is_virtual_signal(pipe_ctx->stream->signal) ||

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2620

pipe_ctx->stream->signal);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2627

if (pipe_ctx->stream->timing.flags.DSC) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2628

if (dc_is_dp_signal(pipe_ctx->stream->signal) ||

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2629

dc_is_virtual_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2635

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2639

allocate_usb4_bandwidth(pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2641

if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2643

else if (dc_is_dp_sst_signal(pipe_ctx->stream->signal) &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2652

if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2657

&pipe_ctx->stream->link->cur_link_settings);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2659

if (stream->sink_patches.delay_ignore_msa > 0)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2660

drm_msleep(stream->sink_patches.delay_ignore_msa);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2662

if (dc_is_dp_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2668

if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

333

cmd.speed = pipe_ctx->stream->ctx->dc->caps.i2c_speed_in_khz;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

341

if (dm_helpers_submit_i2c(pipe_ctx->stream->ctx,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

342

pipe_ctx->stream->link, &cmd))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

361

DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

395

pipe_ctx->stream->link->ddc,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

445

pipe_ctx->stream->link->ddc,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

518

DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

640

DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

664

struct cp_psp *cp_psp = &pipe_ctx->stream->ctx->cp_psp;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

668

dp_get_panel_mode(pipe_ctx->stream->link);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

672

if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

673

link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

691

config.dig_be = pipe_ctx->stream->link->link_enc_hw_inst;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

699

if (pipe_ctx->stream->link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

700

config.dio_output_idx = pipe_ctx->stream->link->link_id.enum_id - ENUM_ID_1;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

707

pipe_ctx->stream->link->dc, link_enc->transmitter);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

708

if (pipe_ctx->stream->link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

714

config.mst_enabled = (pipe_ctx->stream->signal ==

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

717

config.usb4_enabled = (pipe_ctx->stream->link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA) ?

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

722

config.dm_stream_ctx = pipe_ctx->stream->dm_stream_context;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

729

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

731

if (!dc_is_hdmi_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

774

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

775

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

778

if (dc_is_virtual_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

781

result = dm_helpers_dp_write_dsc_enable(dc->ctx, stream, enable);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

787

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

788

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

791

if (dc_is_virtual_signal(stream->signal))

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

794

result = dm_helpers_dp_write_hblank_reduction(dc->ctx, stream);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

808

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

809

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

823

stream->timing.pix_clk_100hz > 480000;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

835

dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_padding +

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

836

stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

837

dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

838

dsc_cfg.pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

839

dsc_cfg.color_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

841

dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

863

if (dc_is_dp_signal(stream->signal) && !dp_is_128b_132b_signal(pipe_ctx)) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

889

if (dc_is_dp_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

949

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

951

if (!pipe_ctx->stream->timing.flags.DSC)

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

967

dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

968

dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

969

dsc_cfg.pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

970

dsc_cfg.color_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

972

dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

975

memcpy(&stream->dsc_packed_pps[0], &dsc_packed_pps[0], sizeof(stream->dsc_packed_pps));

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

976

if (dc_is_dp_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

993

memset(&stream->dsc_packed_pps[0], 0, sizeof(stream->dsc_packed_pps));

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

994

if (dc_is_dp_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/link/link_dpms.h

48

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/link_hwss_hpo_frl.c

32

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/link_hwss_hpo_frl.c

42

&stream->timing,

sys/dev/pci/drm/amd/display/dc/link/link_hwss_hpo_frl.c

43

&stream->link->frl_link_settings.borrow_params,

sys/dev/pci/drm/amd/display/dc/link/link_resource.c

42

if (pipe->stream && pipe->stream->link && pipe->top_pipe == NULL) {

sys/dev/pci/drm/amd/display/dc/link/link_resource.c

43

if (pipe->stream->link == link) {

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

333

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

337

uint32_t max_pix_clk = stream->link->dongle_max_pix_clk * 10;

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

354

switch (stream->signal) {

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

371

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

377

if (context->res_ctx.pipe_ctx[i].stream && (context->res_ctx.pipe_ctx[i].stream == stream)) {

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

400

const struct dc_stream_state *stream = new_ctx->streams[i];

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

405

if (stream == NULL)

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

408

link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

410

if (!(link && (stream->signal == SIGNAL_TYPE_DISPLAY_PORT

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

411

|| stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)))

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

417

dp_tunnel_settings = get_dp_tunnel_settings(new_ctx, stream);

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

422

timing_bw = dp_get_timing_bandwidth_kbps(&stream->timing, link);

sys/dev/pci/drm/amd/display/dc/link/link_validation.h

30

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

382

dc_is_dp_signal(pipe_ctx->stream->signal));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

947

bool link_decide_link_settings(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

950

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

951

uint32_t req_bw = dc_bandwidth_in_kbps_from_timing(&stream->timing, dc_link_get_highest_encoding_format(link));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

955

if (dc_is_dp_signal(stream->signal) &&

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

962

} else if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

967

} else if (stream->signal == SIGNAL_TYPE_VIRTUAL) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

972

if (stream->timing.flags.DSC) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

978

struct dc_crtc_timing tmp_timing = stream->timing;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.h

78

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c

149

void link_decide_dp_tunnel_settings(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c

152

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c

156

if ((stream->signal == SIGNAL_TYPE_DISPLAY_PORT) || (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.h

44

void link_decide_dp_tunnel_settings(struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1628

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1629

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1666

if (stream->sink_patches.dppowerup_delay > 0) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1667

int delay_dp_power_up_in_ms = stream->sink_patches.dppowerup_delay;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1692

if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1713

stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1733

stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST &&

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1799

req_bw = dc_bandwidth_in_kbps_from_timing(&stream->timing, link_encoding);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1031

if (dc->current_state->res_ctx.pipe_ctx[i].stream

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1032

== stream) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1043

((stream->timing.h_total * 1000000) /

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1044

(stream->timing.pix_clk_100hz / 10)) + 1;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1189

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1191

if (stream && stream->link == link) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1279

struct cp_psp *cp_psp = &pipe_ctx->stream->ctx->cp_psp;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

538

if (dc->current_state->res_ctx.pipe_ctx[i].stream) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

539

if (dc->current_state->res_ctx.pipe_ctx[i].stream->link == link) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

689

const struct dc_stream_state *stream, struct psr_config *psr_config,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

800

if (dc->current_state->res_ctx.pipe_ctx[i].stream

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

801

== stream) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

817

psr_context->crtcTimingVerticalTotal = stream->timing.v_total;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

818

psr_context->vsync_rate_hz = div64_u64(div64_u64((stream->

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

820

stream->timing.v_total),

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

821

stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

843

psr_context->hyst_lines = stream->timing.v_total / 2 / 100;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

987

bool edp_setup_replay(struct dc_link *link, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.h

50

const struct dc_stream_state *stream, struct psr_config *psr_config,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.h

58

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

406

if (pipe_ctx->stream)

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

826

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

828

struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

847

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

851

stream = context->res_ctx.pipe_ctx[i].stream;

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

852

if (stream) {

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

855

if (stream->timing.pix_clk_100hz >= max_pix_clk_khz * 10)

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

950

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

954

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h

61

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1127

struct dc_stream_state *stream = opp_head_pipe->stream;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1128

struct dc *dc = stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1134

if (res_ctx->pipe_ctx[underlay_idx].stream)

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1144

pipe_ctx->stream = stream;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1146

if (!dc->current_state->res_ctx.pipe_ctx[underlay_idx].stream) {

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1161

&stream->timing,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1167

pipe_ctx->stream->signal,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1173

&stream->timing);

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1176

stream->timing.h_total,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1177

stream->timing.v_total,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1178

stream->timing.pix_clk_100hz / 10,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1203

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1207

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

886

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

892

pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

893

pixel_clk_params->encoder_object_id = stream->link->link_enc->id;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

894

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

901

stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

903

pixel_clk_params->flags.SUPPORT_YCBCR420 = (stream->timing.pixel_encoding ==

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

905

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

906

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) {

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

909

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) {

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

912

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

924

resource_build_bit_depth_reduction_params(pipe_ctx->stream,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

925

&pipe_ctx->stream->bit_depth_params);

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

926

pipe_ctx->stream->clamping.pixel_encoding = pipe_ctx->stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

943

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

945

struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.h

51

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

849

const struct dc_stream_state *const stream)

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

851

switch (stream->link->link_enc->transmitter) {

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

872

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

874

struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

961

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

966

&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

971

if (dc_is_dp_signal(pipe_ctx->stream->signal)

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

972

|| dc_is_virtual_signal(pipe_ctx->stream->signal))

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

976

if (stream && stream->link && stream->link->link_enc)

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

979

stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1000

pixel_clk_params->encoder_object_id = stream->link->link_enc->id;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1001

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1008

stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1010

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1012

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1015

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1017

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1022

static void build_clamping_params(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1024

stream->clamping.clamping_level = CLAMPING_FULL_RANGE;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1025

stream->clamping.c_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1026

stream->clamping.pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1039

pipe_ctx->stream->clamping.pixel_encoding = pipe_ctx->stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1041

resource_build_bit_depth_reduction_params(pipe_ctx->stream,

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1042

&pipe_ctx->stream->bit_depth_params);

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1043

build_clamping_params(pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1049

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1051

struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1086

struct pipe_ctx *head_pipe = resource_get_otg_master_for_stream(res_ctx, opp_head_pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1097

idle_pipe->stream = head_pipe->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1230

struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1234

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

998

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

999

pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.h

52

struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1219

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1222

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1224

struct dc *dc = pipe_ctx->stream->ctx->dc;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1230

pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1237

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1245

stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1247

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1249

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1254

else if (pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing) || opp_cnt == 2)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1261

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1265

pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&pipe_ctx->stream->timing)) ||

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1275

static void build_clamping_params(struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1277

stream->clamping.clamping_level = CLAMPING_FULL_RANGE;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1278

stream->clamping.c_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1279

stream->clamping.pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1293

struct resource_pool *pool = pipe_ctx->stream->ctx->dc->res_pool;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1301

pipe_ctx->stream->clamping.pixel_encoding = pipe_ctx->stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1303

resource_build_bit_depth_reduction_params(pipe_ctx->stream,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1304

&pipe_ctx->stream->bit_depth_params);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1305

build_clamping_params(pipe_ctx->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1310

enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1313

struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1390

if (pipe_ctx->stream != dc_stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1418

if (new_ctx->res_ctx.pipe_ctx[i].stream == dc_stream && !new_ctx->res_ctx.pipe_ctx[i].top_pipe) {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1523

if (next_odm_pipe->stream->timing.flags.DSC == 1 && !next_odm_pipe->top_pipe) {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1607

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1611

if (context->res_ctx.pipe_ctx[i].stream->writeback_info[j].wb_enabled == false)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1617

if (context->res_ctx.pipe_ctx[i].stream->writeback_info[j].dwb_params.out_format == dwb_scaler_mode_yuv420) {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1618

if (context->res_ctx.pipe_ctx[i].stream->writeback_info[j].dwb_params.output_depth == DWB_OUTPUT_PIXEL_DEPTH_8BPC)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1650

struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1659

if (pipe_ctx->top_pipe || pipe_ctx->prev_odm_pipe || !stream || !stream->timing.flags.DSC)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1662

dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1663

+ stream->timing.h_border_right) / opp_cnt;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1664

dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1665

+ stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1666

dsc_cfg.pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1667

dsc_cfg.color_depth = stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1669

dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1697

if (res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1705

if (res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1723

if (res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1744

if (res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1775

odm_pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1803

hsplit_pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1851

if (pipe->stream && !pipe->prev_odm_pipe &&

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1863

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1866

timing = pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1878

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1902

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1910

if ((pipe->stream->view_format ==

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1912

pipe->stream->view_format ==

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1914

(pipe->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1916

pipe->stream->timing.timing_3d_format ==

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1928

if (pipe->stream->timing.h_addressable > 7680 &&

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1929

pipe->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2049

if (!pipe->stream || pipe_split_from[i] >= 0)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2062

dcn20_build_mapped_resource(dc, context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2092

dcn20_build_mapped_resource(dc, context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2152

struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(res_ctx, opp_head->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2160

sec_dpp_pipe->stream = opp_head->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

163

enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

1006

struct pipe_ctx *head_pipe = resource_get_otg_master_for_stream(res_ctx, opp_head_pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

1017

idle_pipe->stream = head_pipe->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

826

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

833

&pipe->stream->src,

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

849

if (!pipe->stream || pipe_split_from[i] >= 0)

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

862

dcn20_build_mapped_resource(dc, context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

887

dcn20_build_mapped_resource(dc, context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1332

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1388

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1392

struct dc_writeback_info *writeback_info = &context->res_ctx.pipe_ctx[i].stream->writeback_info[j];

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1409

wb_arb_params->time_per_pixel = (1000000 << 6) / context->res_ctx.pipe_ctx[i].stream->phy_pix_clk; /* time_per_pixel should be in u6.6 format */

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1561

if (sec_pipe->stream->timing.flags.DSC == 1) {

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1590

if (old_index >= 0 && context->res_ctx.pipe_ctx[old_index].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1599

if (context->res_ctx.pipe_ctx[i].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1614

if (context->res_ctx.pipe_ctx[i].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1704

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1711

&pipe->stream->src,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1738

pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1757

pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1773

if (!pipe->stream || newly_split[i])

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1849

dcn20_build_mapped_resource(dc, context, pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1658

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1661

timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1646

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1650

if (res_ctx->pipe_ctx[i].stream->src.width != res_ctx->pipe_ctx[i].stream->dst.width ||

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1651

res_ctx->pipe_ctx[i].stream->src.height != res_ctx->pipe_ctx[i].stream->dst.height ||

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1683

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1686

timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1748

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1758

bool split_required = pipe->stream->timing.pix_clk_100hz >= dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc)

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1797

&& pipe->stream->timing.pix_clk_100hz < dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc)) {

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1627

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1630

timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1693

phantom_stream = dc_state_create_phantom_stream(dc, context, ref_pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1698

memcpy(&phantom_stream->timing, &ref_pipe->stream->timing, sizeof(phantom_stream->timing));

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1699

memcpy(&phantom_stream->src, &ref_pipe->stream->src, sizeof(phantom_stream->src));

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1700

memcpy(&phantom_stream->dst, &ref_pipe->stream->dst, sizeof(phantom_stream->dst));

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1705

dc_state_add_phantom_stream(dc, context, phantom_stream, ref_pipe->stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1735

if (pipe->plane_state && pipe->stream && pipe->stream == phantom_stream &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1737

pipe->stream->use_dynamic_meta = false;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1820

const struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1824

stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1826

if (dc_state_can_clear_stream_cursor_subvp_limit(stream, context)) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1827

dc_state_set_stream_cursor_subvp_limit(stream, context, false);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1841

stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1843

if (dc_state_get_stream_subvp_type(context, stream) != SUBVP_PHANTOM &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1844

stream->cursor_position.enable &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1845

!dc_stream_check_cursor_attributes(stream, context, &stream->cursor_attributes)) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1847

dc_state_set_stream_cursor_subvp_limit(stream, context, true);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1879

struct dc_stream_state *stream = NULL;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1891

stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1892

mall_type = dc_state_get_stream_subvp_type(context, stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1906

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1920

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1923

timing = &pipe->stream->timing;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2083

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2087

limit_cur_to_buf = dc_state_get_stream_subvp_cursor_limit(stream, state) &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2088

!stream->hw_cursor_req;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2696

old_primary_pipe = &primary_pipe->stream->ctx->dc->current_state->res_ctx.pipe_ctx[primary_index];

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2702

if ((res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL) &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2715

if ((res_ctx->pipe_ctx[i].stream == NULL) &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2729

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2734

struct resource_context *old_ctx = &stream->ctx->dc->current_state->res_ctx;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2750

if (pipe->bottom_pipe && res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx].stream == NULL) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2759

idle_pipe->stream = head_pipe->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2808

if (!opp_head_pipe->stream->ctx->dc->config.enable_windowed_mpo_odm)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2810

new_ctx, pool, opp_head_pipe->stream, opp_head_pipe);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2818

free_pipe->stream = opp_head_pipe->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2849

free_pipe->stream = otg_master->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2860

if (free_pipe->stream->timing.flags.DSC == 1) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2861

dcn20_acquire_dsc(free_pipe->stream->ctx->dc,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

193

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

128

pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

146

pipe->stream = NULL;

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

161

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

203

if (!pipe->stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

216

if (pipe->stream) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

217

if (pipe->stream->timing.v_addressable != pipe->stream->dst.height ||

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

218

pipe->stream->timing.v_addressable != pipe->stream->src.height) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

223

if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

224

pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

237

if (pipe->stream && pipe->stream->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

262

if (pipe_ctx->stream && pipe_ctx->plane_state && dc_state_get_pipe_subvp_type(context, pipe_ctx) != SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

265

if (pipe_ctx->stream->timing.v_addressable == 1080 && pipe_ctx->stream->timing.h_addressable == 1920) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

277

if (pipe_ctx->stream && pipe_ctx->plane_state && dc_state_get_pipe_subvp_type(context, pipe_ctx) != SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

278

if (pipe_ctx->stream->timing.v_addressable == 1080 && pipe_ctx->stream->timing.h_addressable == 1920) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

340

if (context->res_ctx.pipe_ctx[j].stream == context->streams[i] &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

350

if (k != j && context->res_ctx.pipe_ctx[k].stream == context->streams[i] &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

359

if (k != j && context->res_ctx.pipe_ctx[k].stream == context->streams[i] &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

370

if (!context->res_ctx.pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

391

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

48

switch (pipe_ctx->stream->cursor_attributes.color_format) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

595

if (pipe->stream->timing.h_addressable == width &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

596

pipe->stream->timing.v_addressable == height &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

624

if (pipe->stream->timing.v_addressable == 1080 && pipe->stream->timing.h_addressable == 1920)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

665

refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

666

pipe->stream->timing.v_total * (unsigned long long)pipe->stream->timing.h_total - (uint64_t)1);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

667

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

668

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

67

if (pipe_ctx->stream->cursor_position.enable && (ignore_cursor_buf ||

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

673

if (pipe->stream->ignore_msa_timing_param &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

674

(pipe->stream->allow_freesync || pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

726

refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

727

pipe->stream->timing.v_total * (unsigned long long)pipe->stream->timing.h_total - (uint64_t)1);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

728

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

729

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

734

if (pipe->stream->ignore_msa_timing_param &&

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

735

(pipe->stream->allow_freesync || pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) {

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

760

if (!res_ctx->pipe_ctx[i].stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1643

const struct dc_stream_state *stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1647

stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1649

if (dc_state_can_clear_stream_cursor_subvp_limit(stream, context)) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1650

dc_state_set_stream_cursor_subvp_limit(stream, context, false);

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1662

stream = context->streams[i];

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1664

if (dc_state_get_stream_subvp_type(context, stream) != SUBVP_PHANTOM &&

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1665

stream->cursor_position.enable &&

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1666

!dc_stream_check_cursor_attributes(stream, context, &stream->cursor_attributes)) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1668

dc_state_set_stream_cursor_subvp_limit(stream, context, true);

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1695

const struct dc_stream_state *stream = pipe_ctx->stream;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1696

struct dc_link *link = stream->link;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1700

pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1705

if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment)

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1710

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1720

stream->timing.display_color_depth;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1722

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1724

if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1727

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1729

if (dc_is_tmds_signal(stream->signal) &&

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1730

stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1739

if (dc_is_tmds_signal(stream->signal) &&

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1740

stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1742

} else if (dc_is_dp_signal(stream->signal)) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1744

if (pixel_clk_params->requested_pix_clk_100hz > 4 * stream->ctx->dc->clk_mgr->dprefclk_khz * 10) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1746

} else if (pixel_clk_params->requested_pix_clk_100hz > 2 * stream->ctx->dc->clk_mgr->dprefclk_khz * 10) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1748

} else if (pixel_clk_params->requested_pix_clk_100hz > stream->ctx->dc->clk_mgr->dprefclk_khz * 10) {

sys/dev/pci/drm/amd/display/dc/virtual/virtual_link_encoder.c

33

const struct dc_stream_state *stream) { return true; }

sys/dev/pci/drm/amd/display/dmub/inc/dmub_cmd.h

2374

struct dmub_fams2_stream_static_state stream; //v0

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1000

min_hardware_refresh_in_uhz = div64_u64((stream->timing.pix_clk_100hz * 100000000ULL),

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1001

(stream->timing.h_total * (long long)calc_max_hardware_v_total(stream)));

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1034

in_out_vrr->adjust.v_total_min = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1035

in_out_vrr->adjust.v_total_max = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1086

in_out_vrr->adjust.v_total_min = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1087

in_out_vrr->adjust.v_total_max = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1089

in_out_vrr->adjust.v_total_min = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1090

in_out_vrr->adjust.v_total_max = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1092

in_out_vrr->adjust.v_total_min = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1093

in_out_vrr->adjust.v_total_max = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1098

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1101

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1115

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1122

in_out_vrr->adjust.v_total_min = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1123

in_out_vrr->adjust.v_total_max = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

113

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1131

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1151

stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1156

stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1168

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1175

if ((mod_freesync == NULL) || (stream == NULL) || (in_out_vrr == NULL))

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

119

* 10000) * stream->timing.h_total,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1197

stream, in_out_vrr->max_refresh_in_uhz);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

120

stream->timing.pix_clk_100hz));

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1228

calc_v_total_from_duration(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1241

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1244

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

125

static unsigned int calc_max_hardware_v_total(const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1261

core_freesync, stream, in_out_vrr);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1269

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

127

unsigned int max_hw_v_total = stream->ctx->dc->caps.max_v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1277

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1280

unsigned int total = stream->timing.h_total * stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

1283

nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

129

if (stream->ctx->dc->caps.vtotal_limited_by_fp2) {

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

130

max_hw_v_total -= stream->timing.v_front_porch + 1;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

137

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

144

return stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

150

if (refresh_in_uhz <= stream->timing.min_refresh_in_uhz) {

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

156

frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

157

stream->timing.h_total), 1000000);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

158

} else if (refresh_in_uhz >= stream->timing.max_refresh_in_uhz) {

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

164

frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

165

stream->timing.h_total) + (1000000 - 1), 1000000);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

168

frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

169

stream->timing.h_total) + 500000, 1000000);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

173

if (v_total < stream->timing.v_total) {

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

174

ASSERT(v_total < stream->timing.v_total);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

175

v_total = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

182

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

194

if (dc_is_hdmi_signal(stream->signal)) { // change for HDMI to comply with spec

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

197

h_total_up_scaled = stream->timing.h_total * 10000;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

199

* stream->timing.pix_clk_100hz + (h_total_up_scaled - 1),

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

203

duration_in_us) * (stream->timing.pix_clk_100hz / 10)),

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

204

stream->timing.h_total), 1000);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

208

if (v_total < stream->timing.v_total) {

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

209

ASSERT(v_total < stream->timing.v_total);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

210

v_total = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

218

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

224

stream, in_out_vrr,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

279

current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)),

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

280

stream->timing.h_total), 1000);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

283

if (v_total < stream->timing.v_total)

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

284

v_total = stream->timing.v_total;

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

291

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

327

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

330

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

446

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

493

stream, in_out_vrr->max_refresh_in_uhz);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

498

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

501

mod_freesync_calc_v_total_from_refresh(stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

942

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

959

build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket, stream->freesync_on_desktop);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

962

build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket, stream->freesync_on_desktop);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

967

build_vrr_infopacket_v1(stream->signal, vrr, infopacket, stream->freesync_on_desktop);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

971

true == dc_is_dp_signal(stream->signal) &&

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

978

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

997

mod_freesync_calc_nominal_field_rate(stream);

sys/dev/pci/drm/amd/display/modules/freesync/freesync.c

999

if (stream->ctx->dc->caps.max_v_total != 0 && stream->timing.h_total != 0) {

sys/dev/pci/drm/amd/display/modules/inc/mod_freesync.h

114

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/inc/mod_freesync.h

122

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/inc/mod_freesync.h

128

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/inc/mod_freesync.h

133

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/inc/mod_freesync.h

137

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/modules/inc/mod_freesync.h

140

const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/inc/mod_info_packet.h

36

void mod_build_vsc_infopacket(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/inc/mod_info_packet.h

41

void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/inc/mod_info_packet.h

71

void mod_build_adaptive_sync_infopacket(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/inc/mod_info_packet.h

75

void mod_build_adaptive_sync_infopacket_v2(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

133

void mod_build_vsc_infopacket(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

144

if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) {

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

150

if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

152

else if (stream->link->replay_settings.config.replay_supported)

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

154

else if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_1)

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

158

if (stream->use_vsc_sdp_for_colorimetry)

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

250

switch (stream->timing.timing_3d_format) {

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

343

switch (stream->timing.pixel_encoding) {

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

362

switch (stream->timing.pixel_encoding) {

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

401

switch (stream->timing.display_color_depth) {

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

451

void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

461

format = stream->timing.timing_3d_format;

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

462

if (stream->view_format == VIEW_3D_FORMAT_NONE)

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

465

if (stream->timing.hdmi_vic != 0

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

466

&& stream->timing.h_total >= 3840

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

467

&& stream->timing.v_total >= 2160

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

506

info_packet->sb[5] = stream->timing.hdmi_vic;

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

524

void mod_build_adaptive_sync_infopacket(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

535

if (stream != NULL)

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

536

mod_build_adaptive_sync_infopacket_v2(stream, param, info_packet);

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

559

void mod_build_adaptive_sync_infopacket_v2(const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

572

info_packet->sb[1] = (stream->timing.v_total & 0x00FF);

sys/dev/pci/drm/amd/display/modules/info_packet/info_packet.c

573

info_packet->sb[2] = (stream->timing.v_total & 0xFF00) >> 8;

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

879

const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

889

num_vblank_lines = stream->timing.v_total -

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

890

stream->timing.v_addressable -

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

891

stream->timing.v_border_top -

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

892

stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

894

vblank_time_in_us = (stream->timing.h_total * num_vblank_lines * 1000) / (stream->timing.pix_clk_100hz / 10);

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

896

line_time_in_us = ((stream->timing.h_total * 1000) / (stream->timing.pix_clk_100hz / 10)) + 1;

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

938

bool mod_power_only_edp(const struct dc_state *context, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

940

return context && context->stream_count == 1 && dc_is_embedded_signal(stream->signal);

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

944

struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

955

!stream->timing.dsc_cfg.num_slices_v)

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

958

pic_height = stream->timing.v_addressable +

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

959

stream->timing.v_border_top + stream->timing.v_border_bottom;

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

961

if (stream->timing.dsc_cfg.num_slices_v == 0)

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

964

slice_height = pic_height / stream->timing.dsc_cfg.num_slices_v;

sys/dev/pci/drm/amd/display/modules/power/power_helpers.h

72

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/modules/power/power_helpers.h

74

const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/modules/power/power_helpers.h

76

struct dc_stream_state *stream,

sys/dev/pci/drm/drm_panic.c

637

static struct z_stream_s stream;

sys/dev/pci/drm/drm_panic.c

643

stream.workspace = kmalloc(zlib_deflate_workspacesize(WINDOW_BITS, MEM_LEVEL),

sys/dev/pci/drm/drm_panic.c

653

kfree(stream.workspace);

sys/dev/pci/drm/drm_panic.c

654

stream.workspace = NULL;

sys/dev/pci/drm/drm_panic.c

680

if (zlib_deflateInit2(&stream, COMPR_LEVEL, Z_DEFLATED, WINDOW_BITS,

sys/dev/pci/drm/drm_panic.c

684

stream.next_in = kmsg;

sys/dev/pci/drm/drm_panic.c

685

stream.avail_in = kmsg_len;

sys/dev/pci/drm/drm_panic.c

686

stream.total_in = 0;

sys/dev/pci/drm/drm_panic.c

687

stream.next_out = qrbuf2;

sys/dev/pci/drm/drm_panic.c

688

stream.avail_out = QR_BUFFER2_SIZE;

sys/dev/pci/drm/drm_panic.c

689

stream.total_out = 0;

sys/dev/pci/drm/drm_panic.c

691

if (zlib_deflate(&stream, Z_FINISH) != Z_STREAM_END)

sys/dev/pci/drm/drm_panic.c

694

if (zlib_deflateEnd(&stream) != Z_OK)

sys/dev/pci/drm/drm_panic.c

697

if (stream.total_out > max_qr_data_size) {

sys/dev/pci/drm/drm_panic.c

710

return drm_panic_qr_generate(url, qrbuf2, stream.total_out, QR_BUFFER2_SIZE,

sys/dev/pci/drm/drm_panic.c

755

if (!font || !qrbuf1 || !qrbuf2 || !stream.workspace)

sys/dev/pci/drm/i915/i915_perf.c

1000

stream->perf->ops.oa_enable(stream);

sys/dev/pci/drm/i915/i915_perf.c

1010

ret = append_oa_status(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

1023

return gen8_append_oa_reports(stream, buf, count, offset);

sys/dev/pci/drm/i915/i915_perf.c

1047

static int gen7_append_oa_reports(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

1052

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

1053

int report_size = stream->oa_buffer.format->size;

sys/dev/pci/drm/i915/i915_perf.c

1054

u8 *oa_buf_base = stream->oa_buffer.vaddr;

sys/dev/pci/drm/i915/i915_perf.c

1055

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

sys/dev/pci/drm/i915/i915_perf.c

1062

if (drm_WARN_ON(&uncore->i915->drm, !stream->enabled))

sys/dev/pci/drm/i915/i915_perf.c

1065

spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1067

head = stream->oa_buffer.head;

sys/dev/pci/drm/i915/i915_perf.c

1068

tail = stream->oa_buffer.tail;

sys/dev/pci/drm/i915/i915_perf.c

1070

spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1114

if (__ratelimit(&stream->perf->spurious_report_rs))

sys/dev/pci/drm/i915/i915_perf.c

1120

ret = append_oa_sample(stream, buf, count, offset, report);

sys/dev/pci/drm/i915/i915_perf.c

1132

spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1137

stream->oa_buffer.head = head;

sys/dev/pci/drm/i915/i915_perf.c

1139

spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1161

static int gen7_oa_read(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

1166

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

1170

if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr))

sys/dev/pci/drm/i915/i915_perf.c

1180

oastatus1 &= ~stream->perf->gen7_latched_oastatus1;

sys/dev/pci/drm/i915/i915_perf.c

1203

ret = append_oa_status(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

1208

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

1210

stream->period_exponent);

sys/dev/pci/drm/i915/i915_perf.c

1212

stream->perf->ops.oa_disable(stream);

sys/dev/pci/drm/i915/i915_perf.c

1213

stream->perf->ops.oa_enable(stream);

sys/dev/pci/drm/i915/i915_perf.c

1219

ret = append_oa_status(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

1223

stream->perf->gen7_latched_oastatus1 |=

sys/dev/pci/drm/i915/i915_perf.c

1227

return gen7_append_oa_reports(stream, buf, count, offset);

sys/dev/pci/drm/i915/i915_perf.c

1246

static int i915_oa_wait_unlocked(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1249

if (!stream->periodic)

sys/dev/pci/drm/i915/i915_perf.c

1252

return wait_event_interruptible(stream->poll_wq,

sys/dev/pci/drm/i915/i915_perf.c

1253

oa_buffer_check_unlocked(stream));

sys/dev/pci/drm/i915/i915_perf.c

1266

static void i915_oa_poll_wait(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

1270

poll_wait(file, &stream->poll_wq, wait);

sys/dev/pci/drm/i915/i915_perf.c

1285

static int i915_oa_read(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

1290

return stream->perf->ops.read(stream, buf, count, offset);

sys/dev/pci/drm/i915/i915_perf.c

1293

static struct intel_context *oa_pin_context(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1296

struct i915_gem_context *ctx = stream->ctx;

sys/dev/pci/drm/i915/i915_perf.c

1302

if (ce->engine != stream->engine) /* first match! */

sys/dev/pci/drm/i915/i915_perf.c

1330

stream->pinned_ctx = ce;

sys/dev/pci/drm/i915/i915_perf.c

1331

return stream->pinned_ctx;

sys/dev/pci/drm/i915/i915_perf.c

1425

static int gen12_get_render_context_id(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1430

if (intel_engine_uses_guc(stream->engine)) {

sys/dev/pci/drm/i915/i915_perf.c

1431

ret = gen12_guc_sw_ctx_id(stream->pinned_ctx, &ctx_id);

sys/dev/pci/drm/i915/i915_perf.c

1437

} else if (GRAPHICS_VER_FULL(stream->engine->i915) >= IP_VER(12, 55)) {

sys/dev/pci/drm/i915/i915_perf.c

1450

stream->specific_ctx_id = ctx_id & mask;

sys/dev/pci/drm/i915/i915_perf.c

1451

stream->specific_ctx_id_mask = mask;

sys/dev/pci/drm/i915/i915_perf.c

1537

static int oa_get_render_ctx_id(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1542

ce = oa_pin_context(stream);

sys/dev/pci/drm/i915/i915_perf.c

1546

if (engine_supports_mi_query(stream->engine) &&

sys/dev/pci/drm/i915/i915_perf.c

1547

HAS_LOGICAL_RING_CONTEXTS(stream->perf->i915)) {

sys/dev/pci/drm/i915/i915_perf.c

1555

drm_err(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

1557

stream->engine->name);

sys/dev/pci/drm/i915/i915_perf.c

1568

stream->specific_ctx_id = i915_ggtt_offset(ce->state);

sys/dev/pci/drm/i915/i915_perf.c

1569

stream->specific_ctx_id_mask = 0;

sys/dev/pci/drm/i915/i915_perf.c

1586

stream->specific_ctx_id = ce->lrc.lrca >> 12;

sys/dev/pci/drm/i915/i915_perf.c

1592

stream->specific_ctx_id_mask =

sys/dev/pci/drm/i915/i915_perf.c

1595

stream->specific_ctx_id_mask =

sys/dev/pci/drm/i915/i915_perf.c

1597

stream->specific_ctx_id = stream->specific_ctx_id_mask;

sys/dev/pci/drm/i915/i915_perf.c

1603

ret = gen12_get_render_context_id(stream);

sys/dev/pci/drm/i915/i915_perf.c

1610

ce->tag = stream->specific_ctx_id;

sys/dev/pci/drm/i915/i915_perf.c

1612

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

1614

stream->specific_ctx_id,

sys/dev/pci/drm/i915/i915_perf.c

1615

stream->specific_ctx_id_mask);

sys/dev/pci/drm/i915/i915_perf.c

1627

static void oa_put_render_ctx_id(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1631

ce = fetch_and_zero(&stream->pinned_ctx);

sys/dev/pci/drm/i915/i915_perf.c

1637

stream->specific_ctx_id = INVALID_CTX_ID;

sys/dev/pci/drm/i915/i915_perf.c

1638

stream->specific_ctx_id_mask = 0;

sys/dev/pci/drm/i915/i915_perf.c

1642

free_oa_buffer(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1644

i915_vma_unpin_and_release(&stream->oa_buffer.vma,

sys/dev/pci/drm/i915/i915_perf.c

1647

stream->oa_buffer.vaddr = NULL;

sys/dev/pci/drm/i915/i915_perf.c

1651

free_oa_configs(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1655

i915_oa_config_put(stream->oa_config);

sys/dev/pci/drm/i915/i915_perf.c

1656

llist_for_each_entry_safe(oa_bo, tmp, stream->oa_config_bos.first, node)

sys/dev/pci/drm/i915/i915_perf.c

1661

free_noa_wait(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1663

i915_vma_unpin_and_release(&stream->noa_wait, 0);

sys/dev/pci/drm/i915/i915_perf.c

1680

static void i915_oa_stream_destroy(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1682

struct i915_perf *perf = stream->perf;

sys/dev/pci/drm/i915/i915_perf.c

1683

struct intel_gt *gt = stream->engine->gt;

sys/dev/pci/drm/i915/i915_perf.c

1684

struct i915_perf_group *g = stream->engine->oa_group;

sys/dev/pci/drm/i915/i915_perf.c

1687

if (WARN_ON(stream != g->exclusive_stream))

sys/dev/pci/drm/i915/i915_perf.c

1697

perf->ops.disable_metric_set(stream);

sys/dev/pci/drm/i915/i915_perf.c

1699

free_oa_buffer(stream);

sys/dev/pci/drm/i915/i915_perf.c

1701

intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);

sys/dev/pci/drm/i915/i915_perf.c

1702

intel_engine_pm_put(stream->engine);

sys/dev/pci/drm/i915/i915_perf.c

1704

if (stream->ctx)

sys/dev/pci/drm/i915/i915_perf.c

1705

oa_put_render_ctx_id(stream);

sys/dev/pci/drm/i915/i915_perf.c

1707

free_oa_configs(stream);

sys/dev/pci/drm/i915/i915_perf.c

1708

free_noa_wait(stream);

sys/dev/pci/drm/i915/i915_perf.c

1717

static void gen7_init_oa_buffer(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1719

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

1720

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

sys/dev/pci/drm/i915/i915_perf.c

1723

spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1730

stream->oa_buffer.head = 0;

sys/dev/pci/drm/i915/i915_perf.c

1738

stream->oa_buffer.tail = 0;

sys/dev/pci/drm/i915/i915_perf.c

1740

spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1746

stream->perf->gen7_latched_oastatus1 = 0;

sys/dev/pci/drm/i915/i915_perf.c

1759

memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE);

sys/dev/pci/drm/i915/i915_perf.c

1762

static void gen8_init_oa_buffer(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1764

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

1765

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

sys/dev/pci/drm/i915/i915_perf.c

1768

spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1772

stream->oa_buffer.head = 0;

sys/dev/pci/drm/i915/i915_perf.c

1789

stream->oa_buffer.tail = 0;

sys/dev/pci/drm/i915/i915_perf.c

1796

stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;

sys/dev/pci/drm/i915/i915_perf.c

1798

spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1812

memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE);

sys/dev/pci/drm/i915/i915_perf.c

1815

static void gen12_init_oa_buffer(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1817

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

1818

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

sys/dev/pci/drm/i915/i915_perf.c

1821

spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1823

intel_uncore_write(uncore, __oa_regs(stream)->oa_status, 0);

sys/dev/pci/drm/i915/i915_perf.c

1824

intel_uncore_write(uncore, __oa_regs(stream)->oa_head_ptr,

sys/dev/pci/drm/i915/i915_perf.c

1826

stream->oa_buffer.head = 0;

sys/dev/pci/drm/i915/i915_perf.c

1836

intel_uncore_write(uncore, __oa_regs(stream)->oa_buffer, gtt_offset |

sys/dev/pci/drm/i915/i915_perf.c

1838

intel_uncore_write(uncore, __oa_regs(stream)->oa_tail_ptr,

sys/dev/pci/drm/i915/i915_perf.c

1842

stream->oa_buffer.tail = 0;

sys/dev/pci/drm/i915/i915_perf.c

1849

stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;

sys/dev/pci/drm/i915/i915_perf.c

1851

spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

1865

memset(stream->oa_buffer.vaddr, 0,

sys/dev/pci/drm/i915/i915_perf.c

1866

stream->oa_buffer.vma->size);

sys/dev/pci/drm/i915/i915_perf.c

1871

static int alloc_oa_buffer(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1873

struct drm_i915_private *i915 = stream->perf->i915;

sys/dev/pci/drm/i915/i915_perf.c

1874

struct intel_gt *gt = stream->engine->gt;

sys/dev/pci/drm/i915/i915_perf.c

1879

if (drm_WARN_ON(&i915->drm, stream->oa_buffer.vma))

sys/dev/pci/drm/i915/i915_perf.c

1885

bo = i915_gem_object_create_shmem(stream->perf->i915, OA_BUFFER_SIZE);

sys/dev/pci/drm/i915/i915_perf.c

1910

stream->oa_buffer.vma = vma;

sys/dev/pci/drm/i915/i915_perf.c

1912

stream->oa_buffer.vaddr =

sys/dev/pci/drm/i915/i915_perf.c

1914

if (IS_ERR(stream->oa_buffer.vaddr)) {

sys/dev/pci/drm/i915/i915_perf.c

1915

ret = PTR_ERR(stream->oa_buffer.vaddr);

sys/dev/pci/drm/i915/i915_perf.c

1927

stream->oa_buffer.vaddr = NULL;

sys/dev/pci/drm/i915/i915_perf.c

1928

stream->oa_buffer.vma = NULL;

sys/dev/pci/drm/i915/i915_perf.c

1933

static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs,

sys/dev/pci/drm/i915/i915_perf.c

1942

if (GRAPHICS_VER(stream->perf->i915) >= 8)

sys/dev/pci/drm/i915/i915_perf.c

1948

*cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d;

sys/dev/pci/drm/i915/i915_perf.c

1955

static int alloc_noa_wait(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

1957

struct drm_i915_private *i915 = stream->perf->i915;

sys/dev/pci/drm/i915/i915_perf.c

1958

struct intel_gt *gt = stream->engine->gt;

sys/dev/pci/drm/i915/i915_perf.c

1962

intel_gt_ns_to_clock_interval(to_gt(stream->perf->i915),

sys/dev/pci/drm/i915/i915_perf.c

1963

atomic64_read(&stream->perf->noa_programming_delay));

sys/dev/pci/drm/i915/i915_perf.c

1964

const u32 base = stream->engine->mmio_base;

sys/dev/pci/drm/i915/i915_perf.c

2021

stream->noa_wait = vma;

sys/dev/pci/drm/i915/i915_perf.c

2029

stream, cs, true /* save */, CS_GPR(i),

sys/dev/pci/drm/i915/i915_perf.c

2032

stream, cs, true /* save */, mi_predicate_result,

sys/dev/pci/drm/i915/i915_perf.c

2148

stream, cs, false /* restore */, CS_GPR(i),

sys/dev/pci/drm/i915/i915_perf.c

2151

stream, cs, false /* restore */, mi_predicate_result,

sys/dev/pci/drm/i915/i915_perf.c

2214

alloc_oa_config_buffer(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2234

obj = i915_gem_object_create_shmem(stream->perf->i915, config_length);

sys/dev/pci/drm/i915/i915_perf.c

2263

*cs++ = (GRAPHICS_VER(stream->perf->i915) < 8 ?

sys/dev/pci/drm/i915/i915_perf.c

2266

*cs++ = i915_ggtt_offset(stream->noa_wait);

sys/dev/pci/drm/i915/i915_perf.c

2273

&stream->engine->gt->ggtt->vm,

sys/dev/pci/drm/i915/i915_perf.c

2281

llist_add(&oa_bo->node, &stream->oa_config_bos);

sys/dev/pci/drm/i915/i915_perf.c

2302

get_oa_vma(struct i915_perf_stream *stream, struct i915_oa_config *oa_config)

sys/dev/pci/drm/i915/i915_perf.c

2310

llist_for_each_entry(oa_bo, stream->oa_config_bos.first, node) {

sys/dev/pci/drm/i915/i915_perf.c

2318

oa_bo = alloc_oa_config_buffer(stream, oa_config);

sys/dev/pci/drm/i915/i915_perf.c

2327

emit_oa_config(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2337

vma = get_oa_vma(stream, oa_config);

sys/dev/pci/drm/i915/i915_perf.c

2397

static struct intel_context *oa_context(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

2399

return stream->pinned_ctx ?: stream->engine->kernel_context;

sys/dev/pci/drm/i915/i915_perf.c

2403

hsw_enable_metric_set(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2406

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

2423

return emit_oa_config(stream,

sys/dev/pci/drm/i915/i915_perf.c

2424

stream->oa_config, oa_context(stream),

sys/dev/pci/drm/i915/i915_perf.c

2428

static void hsw_disable_metric_set(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

2430

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

2470

const struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

2472

u32 ctx_oactxctrl = stream->perf->ctx_oactxctrl_offset;

sys/dev/pci/drm/i915/i915_perf.c

2473

u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset;

sys/dev/pci/drm/i915/i915_perf.c

2488

(stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) |

sys/dev/pci/drm/i915/i915_perf.c

2489

(stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) |

sys/dev/pci/drm/i915/i915_perf.c

2494

oa_config_flex_reg(stream->oa_config, flex_regs[i]);

sys/dev/pci/drm/i915/i915_perf.c

2601

static int gen8_configure_context(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2631

static int gen12_configure_oar_context(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2635

struct intel_context *ce = stream->pinned_ctx;

sys/dev/pci/drm/i915/i915_perf.c

2636

u32 format = stream->oa_buffer.format->format;

sys/dev/pci/drm/i915/i915_perf.c

2637

u32 offset = stream->perf->ctx_oactxctrl_offset;

sys/dev/pci/drm/i915/i915_perf.c

2707

oa_configure_all_contexts(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2712

struct drm_i915_private *i915 = stream->perf->i915;

sys/dev/pci/drm/i915/i915_perf.c

2714

struct intel_gt *gt = stream->engine->gt;

sys/dev/pci/drm/i915/i915_perf.c

2743

err = gen8_configure_context(stream, ctx, regs, num_regs);

sys/dev/pci/drm/i915/i915_perf.c

2777

lrc_configure_all_contexts(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2781

u32 ctx_oactxctrl = stream->perf->ctx_oactxctrl_offset;

sys/dev/pci/drm/i915/i915_perf.c

2783

const u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset;

sys/dev/pci/drm/i915/i915_perf.c

2806

(stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) |

sys/dev/pci/drm/i915/i915_perf.c

2807

(stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) |

sys/dev/pci/drm/i915/i915_perf.c

2813

return oa_configure_all_contexts(stream,

sys/dev/pci/drm/i915/i915_perf.c

2819

gen8_enable_metric_set(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2822

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

2823

struct i915_oa_config *oa_config = stream->oa_config;

sys/dev/pci/drm/i915/i915_perf.c

2849

if (IS_GRAPHICS_VER(stream->perf->i915, 9, 11)) {

sys/dev/pci/drm/i915/i915_perf.c

2860

ret = lrc_configure_all_contexts(stream, oa_config, active);

sys/dev/pci/drm/i915/i915_perf.c

2864

return emit_oa_config(stream,

sys/dev/pci/drm/i915/i915_perf.c

2865

stream->oa_config, oa_context(stream),

sys/dev/pci/drm/i915/i915_perf.c

2869

static u32 oag_report_ctx_switches(const struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

2872

(stream->sample_flags & SAMPLE_OA_REPORT) ?

sys/dev/pci/drm/i915/i915_perf.c

2877

gen12_enable_metric_set(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

2880

struct drm_i915_private *i915 = stream->perf->i915;

sys/dev/pci/drm/i915/i915_perf.c

2881

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

2882

bool periodic = stream->periodic;

sys/dev/pci/drm/i915/i915_perf.c

2883

u32 period_exponent = stream->period_exponent;

sys/dev/pci/drm/i915/i915_perf.c

2899

intel_uncore_write(uncore, __oa_regs(stream)->oa_debug,

sys/dev/pci/drm/i915/i915_perf.c

2907

oag_report_ctx_switches(stream));

sys/dev/pci/drm/i915/i915_perf.c

2909

intel_uncore_write(uncore, __oa_regs(stream)->oa_ctx_ctrl, periodic ?

sys/dev/pci/drm/i915/i915_perf.c

2930

if (stream->ctx) {

sys/dev/pci/drm/i915/i915_perf.c

2931

ret = gen12_configure_oar_context(stream, active);

sys/dev/pci/drm/i915/i915_perf.c

2936

return emit_oa_config(stream,

sys/dev/pci/drm/i915/i915_perf.c

2937

stream->oa_config, oa_context(stream),

sys/dev/pci/drm/i915/i915_perf.c

2941

static void gen8_disable_metric_set(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

2943

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

2946

lrc_configure_all_contexts(stream, NULL, NULL);

sys/dev/pci/drm/i915/i915_perf.c

2951

static void gen11_disable_metric_set(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

2953

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

2956

lrc_configure_all_contexts(stream, NULL, NULL);

sys/dev/pci/drm/i915/i915_perf.c

2962

static void gen12_disable_metric_set(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

2964

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

2965

struct drm_i915_private *i915 = stream->perf->i915;

sys/dev/pci/drm/i915/i915_perf.c

2979

if (stream->ctx)

sys/dev/pci/drm/i915/i915_perf.c

2980

gen12_configure_oar_context(stream, NULL);

sys/dev/pci/drm/i915/i915_perf.c

2992

static void gen7_oa_enable(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

2994

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

2995

struct i915_gem_context *ctx = stream->ctx;

sys/dev/pci/drm/i915/i915_perf.c

2996

u32 ctx_id = stream->specific_ctx_id;

sys/dev/pci/drm/i915/i915_perf.c

2997

bool periodic = stream->periodic;

sys/dev/pci/drm/i915/i915_perf.c

2998

u32 period_exponent = stream->period_exponent;

sys/dev/pci/drm/i915/i915_perf.c

2999

u32 report_format = stream->oa_buffer.format->format;

sys/dev/pci/drm/i915/i915_perf.c

3010

gen7_init_oa_buffer(stream);

sys/dev/pci/drm/i915/i915_perf.c

3022

static void gen8_oa_enable(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3024

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

3025

u32 report_format = stream->oa_buffer.format->format;

sys/dev/pci/drm/i915/i915_perf.c

3036

gen8_init_oa_buffer(stream);

sys/dev/pci/drm/i915/i915_perf.c

3048

static void gen12_oa_enable(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3057

if (!(stream->sample_flags & SAMPLE_OA_REPORT))

sys/dev/pci/drm/i915/i915_perf.c

3060

gen12_init_oa_buffer(stream);

sys/dev/pci/drm/i915/i915_perf.c

3062

regs = __oa_regs(stream);

sys/dev/pci/drm/i915/i915_perf.c

3063

val = (stream->oa_buffer.format->format << regs->oa_ctrl_counter_format_shift) |

sys/dev/pci/drm/i915/i915_perf.c

3066

intel_uncore_write(stream->uncore, regs->oa_ctrl, val);

sys/dev/pci/drm/i915/i915_perf.c

3080

static void i915_oa_stream_enable(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3082

stream->pollin = false;

sys/dev/pci/drm/i915/i915_perf.c

3084

stream->perf->ops.oa_enable(stream);

sys/dev/pci/drm/i915/i915_perf.c

3086

if (stream->sample_flags & SAMPLE_OA_REPORT)

sys/dev/pci/drm/i915/i915_perf.c

3087

hrtimer_start(&stream->poll_check_timer,

sys/dev/pci/drm/i915/i915_perf.c

3088

ns_to_ktime(stream->poll_oa_period),

sys/dev/pci/drm/i915/i915_perf.c

3094

static void gen7_oa_disable(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3096

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

3102

drm_err(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3106

static void gen8_oa_disable(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3108

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

3114

drm_err(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3118

static void gen12_oa_disable(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3120

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

3122

intel_uncore_write(uncore, __oa_regs(stream)->oa_ctrl, 0);

sys/dev/pci/drm/i915/i915_perf.c

3124

__oa_regs(stream)->oa_ctrl,

sys/dev/pci/drm/i915/i915_perf.c

3127

drm_err(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3135

drm_err(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3149

static void i915_oa_stream_disable(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3151

stream->perf->ops.oa_disable(stream);

sys/dev/pci/drm/i915/i915_perf.c

3153

if (stream->sample_flags & SAMPLE_OA_REPORT)

sys/dev/pci/drm/i915/i915_perf.c

3154

hrtimer_cancel(&stream->poll_check_timer);

sys/dev/pci/drm/i915/i915_perf.c

3166

static int i915_perf_stream_enable_sync(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3175

err = stream->perf->ops.enable_metric_set(stream, active);

sys/dev/pci/drm/i915/i915_perf.c

3263

static int i915_oa_stream_init(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

3267

struct drm_i915_private *i915 = stream->perf->i915;

sys/dev/pci/drm/i915/i915_perf.c

3268

struct i915_perf *perf = stream->perf;

sys/dev/pci/drm/i915/i915_perf.c

3273

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3285

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3291

(GRAPHICS_VER(perf->i915) < 12 || !stream->ctx)) {

sys/dev/pci/drm/i915/i915_perf.c

3292

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3298

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3309

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3315

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3320

stream->engine = props->engine;

sys/dev/pci/drm/i915/i915_perf.c

3321

stream->uncore = stream->engine->gt->uncore;

sys/dev/pci/drm/i915/i915_perf.c

3323

stream->sample_size = sizeof(struct drm_i915_perf_record_header);

sys/dev/pci/drm/i915/i915_perf.c

3325

stream->oa_buffer.format = &perf->oa_formats[props->oa_format];

sys/dev/pci/drm/i915/i915_perf.c

3326

if (drm_WARN_ON(&i915->drm, stream->oa_buffer.format->size == 0))

sys/dev/pci/drm/i915/i915_perf.c

3329

stream->sample_flags = props->sample_flags;

sys/dev/pci/drm/i915/i915_perf.c

3330

stream->sample_size += stream->oa_buffer.format->size;

sys/dev/pci/drm/i915/i915_perf.c

3332

stream->hold_preemption = props->hold_preemption;

sys/dev/pci/drm/i915/i915_perf.c

3334

stream->periodic = props->oa_periodic;

sys/dev/pci/drm/i915/i915_perf.c

3335

if (stream->periodic)

sys/dev/pci/drm/i915/i915_perf.c

3336

stream->period_exponent = props->oa_period_exponent;

sys/dev/pci/drm/i915/i915_perf.c

3338

if (stream->ctx) {

sys/dev/pci/drm/i915/i915_perf.c

3339

ret = oa_get_render_ctx_id(stream);

sys/dev/pci/drm/i915/i915_perf.c

3341

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3347

ret = alloc_noa_wait(stream);

sys/dev/pci/drm/i915/i915_perf.c

3349

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3354

stream->oa_config = i915_perf_get_oa_config(perf, props->metrics_set);

sys/dev/pci/drm/i915/i915_perf.c

3355

if (!stream->oa_config) {

sys/dev/pci/drm/i915/i915_perf.c

3356

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3374

intel_engine_pm_get(stream->engine);

sys/dev/pci/drm/i915/i915_perf.c

3375

intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL);

sys/dev/pci/drm/i915/i915_perf.c

3377

ret = alloc_oa_buffer(stream);

sys/dev/pci/drm/i915/i915_perf.c

3381

stream->ops = &i915_oa_stream_ops;

sys/dev/pci/drm/i915/i915_perf.c

3383

stream->engine->gt->perf.sseu = props->sseu;

sys/dev/pci/drm/i915/i915_perf.c

3384

WRITE_ONCE(g->exclusive_stream, stream);

sys/dev/pci/drm/i915/i915_perf.c

3386

ret = i915_perf_stream_enable_sync(stream);

sys/dev/pci/drm/i915/i915_perf.c

3388

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3393

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

3395

stream->oa_config->uuid);

sys/dev/pci/drm/i915/i915_perf.c

3397

hrtimer_setup(&stream->poll_check_timer, oa_poll_check_timer_cb, CLOCK_MONOTONIC,

sys/dev/pci/drm/i915/i915_perf.c

3399

init_waitqueue_head(&stream->poll_wq);

sys/dev/pci/drm/i915/i915_perf.c

3400

mtx_init(&stream->oa_buffer.ptr_lock, IPL_TTY);

sys/dev/pci/drm/i915/i915_perf.c

3401

mutex_init(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3407

perf->ops.disable_metric_set(stream);

sys/dev/pci/drm/i915/i915_perf.c

3409

free_oa_buffer(stream);

sys/dev/pci/drm/i915/i915_perf.c

3412

intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);

sys/dev/pci/drm/i915/i915_perf.c

3413

intel_engine_pm_put(stream->engine);

sys/dev/pci/drm/i915/i915_perf.c

3415

free_oa_configs(stream);

sys/dev/pci/drm/i915/i915_perf.c

3418

free_noa_wait(stream);

sys/dev/pci/drm/i915/i915_perf.c

3421

if (stream->ctx)

sys/dev/pci/drm/i915/i915_perf.c

3422

oa_put_render_ctx_id(stream);

sys/dev/pci/drm/i915/i915_perf.c

3432

struct i915_perf_stream *stream;

sys/dev/pci/drm/i915/i915_perf.c

3438

stream = READ_ONCE(engine->oa_group->exclusive_stream);

sys/dev/pci/drm/i915/i915_perf.c

3439

if (stream && GRAPHICS_VER(stream->perf->i915) < 12)

sys/dev/pci/drm/i915/i915_perf.c

3440

gen8_update_reg_state_unlocked(ce, stream);

sys/dev/pci/drm/i915/i915_perf.c

3468

struct i915_perf_stream *stream = file->private_data;

sys/dev/pci/drm/i915/i915_perf.c

3476

if (!stream->enabled || !(stream->sample_flags & SAMPLE_OA_REPORT))

sys/dev/pci/drm/i915/i915_perf.c

3488

ret = stream->ops->wait_unlocked(stream);

sys/dev/pci/drm/i915/i915_perf.c

3492

mutex_lock(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3493

ret = stream->ops->read(stream, buf, count, &offset);

sys/dev/pci/drm/i915/i915_perf.c

3494

mutex_unlock(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3497

mutex_lock(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3498

ret = stream->ops->read(stream, buf, count, &offset);

sys/dev/pci/drm/i915/i915_perf.c

3499

mutex_unlock(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3514

stream->pollin = false;

sys/dev/pci/drm/i915/i915_perf.c

3522

struct i915_perf_stream *stream =

sys/dev/pci/drm/i915/i915_perf.c

3523

container_of(hrtimer, typeof(*stream), poll_check_timer);

sys/dev/pci/drm/i915/i915_perf.c

3525

if (oa_buffer_check_unlocked(stream)) {

sys/dev/pci/drm/i915/i915_perf.c

3526

stream->pollin = true;

sys/dev/pci/drm/i915/i915_perf.c

3527

wake_up(&stream->poll_wq);

sys/dev/pci/drm/i915/i915_perf.c

3531

ns_to_ktime(stream->poll_oa_period));

sys/dev/pci/drm/i915/i915_perf.c

3548

static __poll_t i915_perf_poll_locked(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

3554

stream->ops->poll_wait(stream, file, wait);

sys/dev/pci/drm/i915/i915_perf.c

3562

if (stream->pollin)

sys/dev/pci/drm/i915/i915_perf.c

3583

struct i915_perf_stream *stream = file->private_data;

sys/dev/pci/drm/i915/i915_perf.c

3586

mutex_lock(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3587

ret = i915_perf_poll_locked(stream, file, wait);

sys/dev/pci/drm/i915/i915_perf.c

3588

mutex_unlock(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3603

static void i915_perf_enable_locked(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3605

if (stream->enabled)

sys/dev/pci/drm/i915/i915_perf.c

3609

stream->enabled = true;

sys/dev/pci/drm/i915/i915_perf.c

3611

if (stream->ops->enable)

sys/dev/pci/drm/i915/i915_perf.c

3612

stream->ops->enable(stream);

sys/dev/pci/drm/i915/i915_perf.c

3614

if (stream->hold_preemption)

sys/dev/pci/drm/i915/i915_perf.c

3615

intel_context_set_nopreempt(stream->pinned_ctx);

sys/dev/pci/drm/i915/i915_perf.c

3632

static void i915_perf_disable_locked(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3634

if (!stream->enabled)

sys/dev/pci/drm/i915/i915_perf.c

3638

stream->enabled = false;

sys/dev/pci/drm/i915/i915_perf.c

3640

if (stream->hold_preemption)

sys/dev/pci/drm/i915/i915_perf.c

3641

intel_context_clear_nopreempt(stream->pinned_ctx);

sys/dev/pci/drm/i915/i915_perf.c

3643

if (stream->ops->disable)

sys/dev/pci/drm/i915/i915_perf.c

3644

stream->ops->disable(stream);

sys/dev/pci/drm/i915/i915_perf.c

3647

static long i915_perf_config_locked(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

3651

long ret = stream->oa_config->id;

sys/dev/pci/drm/i915/i915_perf.c

3653

config = i915_perf_get_oa_config(stream->perf, metrics_set);

sys/dev/pci/drm/i915/i915_perf.c

3657

if (config != stream->oa_config) {

sys/dev/pci/drm/i915/i915_perf.c

3669

err = emit_oa_config(stream, config, oa_context(stream), NULL);

sys/dev/pci/drm/i915/i915_perf.c

3671

config = xchg(&stream->oa_config, config);

sys/dev/pci/drm/i915/i915_perf.c

3690

static long i915_perf_ioctl_locked(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

3696

i915_perf_enable_locked(stream);

sys/dev/pci/drm/i915/i915_perf.c

3699

i915_perf_disable_locked(stream);

sys/dev/pci/drm/i915/i915_perf.c

3702

return i915_perf_config_locked(stream, arg);

sys/dev/pci/drm/i915/i915_perf.c

3723

struct i915_perf_stream *stream = file->private_data;

sys/dev/pci/drm/i915/i915_perf.c

3726

mutex_lock(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3727

ret = i915_perf_ioctl_locked(stream, cmd, arg);

sys/dev/pci/drm/i915/i915_perf.c

3728

mutex_unlock(&stream->lock);

sys/dev/pci/drm/i915/i915_perf.c

3743

static void i915_perf_destroy_locked(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

3745

if (stream->enabled)

sys/dev/pci/drm/i915/i915_perf.c

3746

i915_perf_disable_locked(stream);

sys/dev/pci/drm/i915/i915_perf.c

3748

if (stream->ops->destroy)

sys/dev/pci/drm/i915/i915_perf.c

3749

stream->ops->destroy(stream);

sys/dev/pci/drm/i915/i915_perf.c

3751

if (stream->ctx)

sys/dev/pci/drm/i915/i915_perf.c

3752

i915_gem_context_put(stream->ctx);

sys/dev/pci/drm/i915/i915_perf.c

3754

kfree(stream);

sys/dev/pci/drm/i915/i915_perf.c

3770

struct i915_perf_stream *stream = file->private_data;

sys/dev/pci/drm/i915/i915_perf.c

3771

struct i915_perf *perf = stream->perf;

sys/dev/pci/drm/i915/i915_perf.c

3772

struct intel_gt *gt = stream->engine->gt;

sys/dev/pci/drm/i915/i915_perf.c

3780

i915_perf_destroy_locked(stream);

sys/dev/pci/drm/i915/i915_perf.c

3838

struct i915_perf_stream *stream = NULL;

sys/dev/pci/drm/i915/i915_perf.c

3914

stream = kzalloc(sizeof(*stream), GFP_KERNEL);

sys/dev/pci/drm/i915/i915_perf.c

3915

if (!stream) {

sys/dev/pci/drm/i915/i915_perf.c

3920

stream->perf = perf;

sys/dev/pci/drm/i915/i915_perf.c

3921

stream->ctx = specific_ctx;

sys/dev/pci/drm/i915/i915_perf.c

3922

stream->poll_oa_period = props->poll_oa_period;

sys/dev/pci/drm/i915/i915_perf.c

3924

ret = i915_oa_stream_init(stream, param, props);

sys/dev/pci/drm/i915/i915_perf.c

3932

if (WARN_ON(stream->sample_flags != props->sample_flags)) {

sys/dev/pci/drm/i915/i915_perf.c

3942

stream_fd = anon_inode_getfd("[i915_perf]", &fops, stream, f_flags);

sys/dev/pci/drm/i915/i915_perf.c

3949

i915_perf_enable_locked(stream);

sys/dev/pci/drm/i915/i915_perf.c

3959

if (stream->ops->destroy)

sys/dev/pci/drm/i915/i915_perf.c

3960

stream->ops->destroy(stream);

sys/dev/pci/drm/i915/i915_perf.c

3962

kfree(stream);

sys/dev/pci/drm/i915/i915_perf.c

437

struct i915_perf_regs *__oa_regs(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

439

return &stream->engine->oa_group->regs;

sys/dev/pci/drm/i915/i915_perf.c

442

static u32 gen12_oa_hw_tail_read(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

444

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

446

return intel_uncore_read(uncore, __oa_regs(stream)->oa_tail_ptr) &

sys/dev/pci/drm/i915/i915_perf.c

450

static u32 gen8_oa_hw_tail_read(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

452

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

457

static u32 gen7_oa_hw_tail_read(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

459

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

468

static u64 oa_report_id(struct i915_perf_stream *stream, void *report)

sys/dev/pci/drm/i915/i915_perf.c

470

return oa_report_header_64bit(stream) ? *(u64 *)report : *(u32 *)report;

sys/dev/pci/drm/i915/i915_perf.c

473

static u64 oa_report_reason(struct i915_perf_stream *stream, void *report)

sys/dev/pci/drm/i915/i915_perf.c

475

return (oa_report_id(stream, report) >> OAREPORT_REASON_SHIFT) &

sys/dev/pci/drm/i915/i915_perf.c

476

(GRAPHICS_VER(stream->perf->i915) == 12 ?

sys/dev/pci/drm/i915/i915_perf.c

481

static void oa_report_id_clear(struct i915_perf_stream *stream, u32 *report)

sys/dev/pci/drm/i915/i915_perf.c

483

if (oa_report_header_64bit(stream))

sys/dev/pci/drm/i915/i915_perf.c

489

static bool oa_report_ctx_invalid(struct i915_perf_stream *stream, void *report)

sys/dev/pci/drm/i915/i915_perf.c

491

return !(oa_report_id(stream, report) &

sys/dev/pci/drm/i915/i915_perf.c

492

stream->perf->gen8_valid_ctx_bit);

sys/dev/pci/drm/i915/i915_perf.c

495

static u64 oa_timestamp(struct i915_perf_stream *stream, void *report)

sys/dev/pci/drm/i915/i915_perf.c

497

return oa_report_header_64bit(stream) ?

sys/dev/pci/drm/i915/i915_perf.c

502

static void oa_timestamp_clear(struct i915_perf_stream *stream, u32 *report)

sys/dev/pci/drm/i915/i915_perf.c

504

if (oa_report_header_64bit(stream))

sys/dev/pci/drm/i915/i915_perf.c

510

static u32 oa_context_id(struct i915_perf_stream *stream, u32 *report)

sys/dev/pci/drm/i915/i915_perf.c

512

u32 ctx_id = oa_report_header_64bit(stream) ? report[4] : report[2];

sys/dev/pci/drm/i915/i915_perf.c

514

return ctx_id & stream->specific_ctx_id_mask;

sys/dev/pci/drm/i915/i915_perf.c

517

static void oa_context_id_squash(struct i915_perf_stream *stream, u32 *report)

sys/dev/pci/drm/i915/i915_perf.c

519

if (oa_report_header_64bit(stream))

sys/dev/pci/drm/i915/i915_perf.c

550

static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/i915_perf.c

552

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

sys/dev/pci/drm/i915/i915_perf.c

553

int report_size = stream->oa_buffer.format->size;

sys/dev/pci/drm/i915/i915_perf.c

564

spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

566

hw_tail = stream->perf->ops.oa_hw_tail_read(stream);

sys/dev/pci/drm/i915/i915_perf.c

574

partial_report_size = OA_TAKEN(hw_tail, stream->oa_buffer.tail);

sys/dev/pci/drm/i915/i915_perf.c

594

while (OA_TAKEN(tail, stream->oa_buffer.tail) >= report_size) {

sys/dev/pci/drm/i915/i915_perf.c

595

void *report = stream->oa_buffer.vaddr + tail;

sys/dev/pci/drm/i915/i915_perf.c

597

if (oa_report_id(stream, report) ||

sys/dev/pci/drm/i915/i915_perf.c

598

oa_timestamp(stream, report))

sys/dev/pci/drm/i915/i915_perf.c

605

__ratelimit(&stream->perf->tail_pointer_race))

sys/dev/pci/drm/i915/i915_perf.c

606

drm_notice(&stream->uncore->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

608

stream->oa_buffer.head, tail, hw_tail);

sys/dev/pci/drm/i915/i915_perf.c

610

stream->oa_buffer.tail = tail;

sys/dev/pci/drm/i915/i915_perf.c

612

pollin = OA_TAKEN(stream->oa_buffer.tail,

sys/dev/pci/drm/i915/i915_perf.c

613

stream->oa_buffer.head) >= report_size;

sys/dev/pci/drm/i915/i915_perf.c

615

spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

637

static int append_oa_status(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

673

static int append_oa_sample(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

679

int report_size = stream->oa_buffer.format->size;

sys/dev/pci/drm/i915/i915_perf.c

686

header.size = stream->sample_size;

sys/dev/pci/drm/i915/i915_perf.c

696

oa_buf_end = stream->oa_buffer.vaddr + OA_BUFFER_SIZE;

sys/dev/pci/drm/i915/i915_perf.c

704

if (copy_to_user(buf, stream->oa_buffer.vaddr,

sys/dev/pci/drm/i915/i915_perf.c

737

static int gen8_append_oa_reports(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

742

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

743

int report_size = stream->oa_buffer.format->size;

sys/dev/pci/drm/i915/i915_perf.c

744

u8 *oa_buf_base = stream->oa_buffer.vaddr;

sys/dev/pci/drm/i915/i915_perf.c

745

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

sys/dev/pci/drm/i915/i915_perf.c

752

if (drm_WARN_ON(&uncore->i915->drm, !stream->enabled))

sys/dev/pci/drm/i915/i915_perf.c

755

spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

757

head = stream->oa_buffer.head;

sys/dev/pci/drm/i915/i915_perf.c

758

tail = stream->oa_buffer.tail;

sys/dev/pci/drm/i915/i915_perf.c

760

spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

789

reason = oa_report_reason(stream, report);

sys/dev/pci/drm/i915/i915_perf.c

790

ctx_id = oa_context_id(stream, report32);

sys/dev/pci/drm/i915/i915_perf.c

832

if (oa_report_ctx_invalid(stream, report) &&

sys/dev/pci/drm/i915/i915_perf.c

833

GRAPHICS_VER_FULL(stream->engine->i915) < IP_VER(12, 55)) {

sys/dev/pci/drm/i915/i915_perf.c

835

oa_context_id_squash(stream, report32);

sys/dev/pci/drm/i915/i915_perf.c

869

if (!stream->ctx ||

sys/dev/pci/drm/i915/i915_perf.c

870

stream->specific_ctx_id == ctx_id ||

sys/dev/pci/drm/i915/i915_perf.c

871

stream->oa_buffer.last_ctx_id == stream->specific_ctx_id ||

sys/dev/pci/drm/i915/i915_perf.c

878

if (stream->ctx &&

sys/dev/pci/drm/i915/i915_perf.c

879

stream->specific_ctx_id != ctx_id) {

sys/dev/pci/drm/i915/i915_perf.c

880

oa_context_id_squash(stream, report32);

sys/dev/pci/drm/i915/i915_perf.c

883

ret = append_oa_sample(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

888

stream->oa_buffer.last_ctx_id = ctx_id;

sys/dev/pci/drm/i915/i915_perf.c

896

oa_report_id_clear(stream, report32);

sys/dev/pci/drm/i915/i915_perf.c

897

oa_timestamp_clear(stream, report32);

sys/dev/pci/drm/i915/i915_perf.c

899

u8 *oa_buf_end = stream->oa_buffer.vaddr +

sys/dev/pci/drm/i915/i915_perf.c

916

oaheadptr = GRAPHICS_VER(stream->perf->i915) == 12 ?

sys/dev/pci/drm/i915/i915_perf.c

917

__oa_regs(stream)->oa_head_ptr :

sys/dev/pci/drm/i915/i915_perf.c

920

spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

928

stream->oa_buffer.head = head;

sys/dev/pci/drm/i915/i915_perf.c

930

spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);

sys/dev/pci/drm/i915/i915_perf.c

956

static int gen8_oa_read(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf.c

961

struct intel_uncore *uncore = stream->uncore;

sys/dev/pci/drm/i915/i915_perf.c

966

if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr))

sys/dev/pci/drm/i915/i915_perf.c

969

oastatus_reg = GRAPHICS_VER(stream->perf->i915) == 12 ?

sys/dev/pci/drm/i915/i915_perf.c

970

__oa_regs(stream)->oa_status :

sys/dev/pci/drm/i915/i915_perf.c

990

ret = append_oa_status(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

995

drm_dbg(&stream->perf->i915->drm,

sys/dev/pci/drm/i915/i915_perf.c

997

stream->period_exponent);

sys/dev/pci/drm/i915/i915_perf.c

999

stream->perf->ops.oa_disable(stream);

sys/dev/pci/drm/i915/i915_perf_types.h

109

void (*enable)(struct i915_perf_stream *stream);

sys/dev/pci/drm/i915/i915_perf_types.h

116

void (*disable)(struct i915_perf_stream *stream);

sys/dev/pci/drm/i915/i915_perf_types.h

123

void (*poll_wait)(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf_types.h

133

int (*wait_unlocked)(struct i915_perf_stream *stream);

sys/dev/pci/drm/i915/i915_perf_types.h

153

int (*read)(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf_types.h

163

void (*destroy)(struct i915_perf_stream *stream);

sys/dev/pci/drm/i915/i915_perf_types.h

375

int (*enable_metric_set)(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf_types.h

382

void (*disable_metric_set)(struct i915_perf_stream *stream);

sys/dev/pci/drm/i915/i915_perf_types.h

387

void (*oa_enable)(struct i915_perf_stream *stream);

sys/dev/pci/drm/i915/i915_perf_types.h

392

void (*oa_disable)(struct i915_perf_stream *stream);

sys/dev/pci/drm/i915/i915_perf_types.h

398

int (*read)(struct i915_perf_stream *stream,

sys/dev/pci/drm/i915/i915_perf_types.h

410

u32 (*oa_hw_tail_read)(struct i915_perf_stream *stream);

sys/dev/pci/drm/i915/selftests/i915_perf.c

104

struct i915_perf_stream *stream;

sys/dev/pci/drm/i915/selftests/i915_perf.c

117

stream = kzalloc(sizeof(*stream), GFP_KERNEL);

sys/dev/pci/drm/i915/selftests/i915_perf.c

118

if (!stream) {

sys/dev/pci/drm/i915/selftests/i915_perf.c

123

stream->perf = perf;

sys/dev/pci/drm/i915/selftests/i915_perf.c

126

if (i915_oa_stream_init(stream, &param, &props)) {

sys/dev/pci/drm/i915/selftests/i915_perf.c

127

kfree(stream);

sys/dev/pci/drm/i915/selftests/i915_perf.c

128

stream = NULL;

sys/dev/pci/drm/i915/selftests/i915_perf.c

134

return stream;

sys/dev/pci/drm/i915/selftests/i915_perf.c

137

static void stream_destroy(struct i915_perf_stream *stream)

sys/dev/pci/drm/i915/selftests/i915_perf.c

139

struct intel_gt *gt = stream->engine->gt;

sys/dev/pci/drm/i915/selftests/i915_perf.c

142

i915_perf_destroy_locked(stream);

sys/dev/pci/drm/i915/selftests/i915_perf.c

149

struct i915_perf_stream *stream;

sys/dev/pci/drm/i915/selftests/i915_perf.c

153

stream = test_stream(&i915->perf);

sys/dev/pci/drm/i915/selftests/i915_perf.c

154

if (!stream)

sys/dev/pci/drm/i915/selftests/i915_perf.c

157

stream_destroy(stream);

sys/dev/pci/drm/i915/selftests/i915_perf.c

200

struct i915_perf_stream *stream;

sys/dev/pci/drm/i915/selftests/i915_perf.c

210

stream = test_stream(&i915->perf);

sys/dev/pci/drm/i915/selftests/i915_perf.c

211

if (!stream)

sys/dev/pci/drm/i915/selftests/i915_perf.c

214

expected = atomic64_read(&stream->perf->noa_programming_delay);

sys/dev/pci/drm/i915/selftests/i915_perf.c

216

if (stream->engine->class != RENDER_CLASS) {

sys/dev/pci/drm/i915/selftests/i915_perf.c

222

intel_write_status_page(stream->engine, 0x100 + i, 0);

sys/dev/pci/drm/i915/selftests/i915_perf.c

224

rq = intel_engine_create_kernel_request(stream->engine);

sys/dev/pci/drm/i915/selftests/i915_perf.c

245

i915_ggtt_offset(stream->noa_wait), 0,

sys/dev/pci/drm/i915/selftests/i915_perf.c

269

delay = intel_read_status_page(stream->engine, 0x102);

sys/dev/pci/drm/i915/selftests/i915_perf.c

270

delay -= intel_read_status_page(stream->engine, 0x100);

sys/dev/pci/drm/i915/selftests/i915_perf.c

271

delay = intel_gt_clock_interval_to_ns(stream->engine->gt, delay);

sys/dev/pci/drm/i915/selftests/i915_perf.c

285

stream_destroy(stream);

sys/dev/pci/drm/i915/selftests/i915_perf.c

292

struct i915_perf_stream *stream;

sys/dev/pci/drm/i915/selftests/i915_perf.c

303

stream = test_stream(&i915->perf);

sys/dev/pci/drm/i915/selftests/i915_perf.c

304

if (!stream)

sys/dev/pci/drm/i915/selftests/i915_perf.c

307

gpr0 = i915_mmio_reg_offset(GEN8_RING_CS_GPR(stream->engine->mmio_base, 0));

sys/dev/pci/drm/i915/selftests/i915_perf.c

309

ce = intel_context_create(stream->engine);

sys/dev/pci/drm/i915/selftests/i915_perf.c

352

i915_ggtt_offset(stream->noa_wait), 0,

sys/dev/pci/drm/i915/selftests/i915_perf.c

389

intel_gt_set_wedged(stream->engine->gt);

sys/dev/pci/drm/i915/selftests/i915_perf.c

416

stream_destroy(stream);

sys/dev/usb/if_athn_usb.c

2133

struct athn_usb_rx_stream *stream = &usc->rx_stream;

sys/dev/usb/if_athn_usb.c

2150

if (stream->left > 0) {

sys/dev/usb/if_athn_usb.c

2151

if (len >= stream->left) {

sys/dev/usb/if_athn_usb.c

2153

if (__predict_true(stream->m != NULL)) {

sys/dev/usb/if_athn_usb.c

2154

memcpy(mtod(stream->m, uint8_t *) +

sys/dev/usb/if_athn_usb.c

2155

stream->moff, buf, stream->left);

sys/dev/usb/if_athn_usb.c

2156

athn_usb_rx_frame(usc, stream->m, &ml);

sys/dev/usb/if_athn_usb.c

2157

stream->m = NULL;

sys/dev/usb/if_athn_usb.c

2160

off = (stream->left + 3) & ~3;

sys/dev/usb/if_athn_usb.c

2163

stream->left = 0;

sys/dev/usb/if_athn_usb.c

2166

if (__predict_true(stream->m != NULL)) {

sys/dev/usb/if_athn_usb.c

2167

memcpy(mtod(stream->m, uint8_t *) +

sys/dev/usb/if_athn_usb.c

2168

stream->moff, buf, len);

sys/dev/usb/if_athn_usb.c

2169

stream->moff += len;

sys/dev/usb/if_athn_usb.c

2171

stream->left -= len;

sys/dev/usb/if_athn_usb.c

2175

KASSERT(stream->left == 0);

sys/dev/usb/if_athn_usb.c

2211

stream->m = m; /* NB: m can be NULL. */

sys/dev/usb/if_athn_usb.c

2212

if (__predict_true(stream->m != NULL)) {

sys/dev/usb/if_athn_usb.c

2213

memcpy(mtod(stream->m, uint8_t *), buf, len);

sys/dev/usb/if_athn_usb.c

2214

stream->moff = len;

sys/dev/usb/if_athn_usb.c

2216

stream->left = pktlen - len;

sys/lib/libsa/cread.c

100

if (s->stream.avail_in == 0) {

sys/lib/libsa/cread.c

102

s->stream.avail_in = oread(s->fd, s->inbuf, Z_BUFSIZE);

sys/lib/libsa/cread.c

103

if (s->stream.avail_in <= 0) {

sys/lib/libsa/cread.c

109

s->stream.next_in = s->inbuf;

sys/lib/libsa/cread.c

111

s->stream.avail_in--;

sys/lib/libsa/cread.c

112

return *(s->stream.next_in)++;

sys/lib/libsa/cread.c

143

s->stream.avail_in++;

sys/lib/libsa/cread.c

144

s->stream.next_in--;

sys/lib/libsa/cread.c

147

s->stream.avail_in++;

sys/lib/libsa/cread.c

148

s->stream.next_in--;

sys/lib/libsa/cread.c

152

s->z_err = s->stream.avail_in != 0 ? Z_OK :

sys/lib/libsa/cread.c

209

if (inflateInit2(&(s->stream), -15) != Z_OK)

sys/lib/libsa/cread.c

212

s->stream.next_in = s->inbuf = (unsigned char *)alloc(Z_BUFSIZE);

sys/lib/libsa/cread.c

214

inflateEnd(&(s->stream));

sys/lib/libsa/cread.c

246

inflateEnd(&(s->stream));

sys/lib/libsa/cread.c

268

s->stream.next_out = buf;

sys/lib/libsa/cread.c

269

s->stream.avail_out = len;

sys/lib/libsa/cread.c

271

while (s->stream.avail_out != 0) {

sys/lib/libsa/cread.c

275

unsigned int n = s->stream.avail_in;

sys/lib/libsa/cread.c

277

if (n > s->stream.avail_out)

sys/lib/libsa/cread.c

278

n = s->stream.avail_out;

sys/lib/libsa/cread.c

280

zmemcpy(s->stream.next_out, s->stream.next_in, n);

sys/lib/libsa/cread.c

281

s->stream.next_out += n;

sys/lib/libsa/cread.c

282

s->stream.next_in += n;

sys/lib/libsa/cread.c

283

s->stream.avail_out -= n;

sys/lib/libsa/cread.c

284

s->stream.avail_in -= n;

sys/lib/libsa/cread.c

286

if (s->stream.avail_out > 0) {

sys/lib/libsa/cread.c

289

n = oread(fd, s->stream.next_out,

sys/lib/libsa/cread.c

290

s->stream.avail_out);

sys/lib/libsa/cread.c

298

s->stream.avail_out -= n;

sys/lib/libsa/cread.c

300

len -= s->stream.avail_out;

sys/lib/libsa/cread.c

301

s->stream.total_in += (unsigned long)len;

sys/lib/libsa/cread.c

302

s->stream.total_out += (unsigned long)len;

sys/lib/libsa/cread.c

308

if (s->stream.avail_in == 0 && !s->z_eof) {

sys/lib/libsa/cread.c

310

s->stream.avail_in = oread(fd, s->inbuf, Z_BUFSIZE);

sys/lib/libsa/cread.c

311

if (s->stream.avail_in <= 0) {

sys/lib/libsa/cread.c

318

s->stream.next_in = s->inbuf;

sys/lib/libsa/cread.c

320

s->z_err = inflate(&(s->stream), Z_NO_FLUSH);

sys/lib/libsa/cread.c

325

(unsigned int)(s->stream.next_out - start));

sys/lib/libsa/cread.c

326

start = s->stream.next_out;

sys/lib/libsa/cread.c

340

unsigned long total_in = s->stream.total_in;

sys/lib/libsa/cread.c

341

unsigned long total_out = s->stream.total_out;

sys/lib/libsa/cread.c

343

inflateReset(&(s->stream));

sys/lib/libsa/cread.c

344

s->stream.total_in = total_in;

sys/lib/libsa/cread.c

345

s->stream.total_out = total_out;

sys/lib/libsa/cread.c

353

s->crc = crc32(s->crc, start, (unsigned int)(s->stream.next_out - start));

sys/lib/libsa/cread.c

355

return (int)(len - s->stream.avail_out);

sys/lib/libsa/cread.c

379

s->stream.avail_in = 0;

sys/lib/libsa/cread.c

386

offset += s->stream.total_out;

sys/lib/libsa/cread.c

391

if (offset < s->stream.total_out) {

sys/lib/libsa/cread.c

400

inflateEnd(&(s->stream));

sys/lib/libsa/cread.c

405

inflateInit2(&(s->stream), -15);

sys/lib/libsa/cread.c

406

s->stream.next_in = s->inbuf = sav_inbuf;

sys/lib/libsa/cread.c

413

if (offset > s->stream.total_out) {

sys/lib/libsa/cread.c

414

off_t toskip = offset - s->stream.total_out;

sys/lib/libsa/cread.c

434

if (offset != s->stream.total_out)

sys/lib/libsa/cread.c

63

z_stream stream;

sys/lib/libz/compress.c

24

z_stream stream;

sys/lib/libz/compress.c

36

stream.zalloc = (alloc_func)0;

sys/lib/libz/compress.c

37

stream.zfree = (free_func)0;

sys/lib/libz/compress.c

38

stream.opaque = (voidpf)0;

sys/lib/libz/compress.c

40

err = deflateInit(&stream, level);

sys/lib/libz/compress.c

43

stream.next_out = dest;

sys/lib/libz/compress.c

44

stream.avail_out = 0;

sys/lib/libz/compress.c

45

stream.next_in = (z_const Bytef *)source;

sys/lib/libz/compress.c

46

stream.avail_in = 0;

sys/lib/libz/compress.c

49

if (stream.avail_out == 0) {

sys/lib/libz/compress.c

50

stream.avail_out = left > (z_size_t)max ? max : (uInt)left;

sys/lib/libz/compress.c

51

left -= stream.avail_out;

sys/lib/libz/compress.c

53

if (stream.avail_in == 0) {

sys/lib/libz/compress.c

54

stream.avail_in = sourceLen > (z_size_t)max ? max :

sys/lib/libz/compress.c

56

sourceLen -= stream.avail_in;

sys/lib/libz/compress.c

58

err = deflate(&stream, sourceLen ? Z_NO_FLUSH : Z_FINISH);

sys/lib/libz/compress.c

61

*destLen = (z_size_t)(stream.next_out - dest);

sys/lib/libz/compress.c

62

deflateEnd(&stream);

usr.bin/ctfconv/generate.c

435

z_stream stream;

usr.bin/ctfconv/generate.c

445

memset(&stream, 0, sizeof(stream));

usr.bin/ctfconv/generate.c

446

stream.zalloc = Z_NULL;

usr.bin/ctfconv/generate.c

447

stream.zfree = Z_NULL;

usr.bin/ctfconv/generate.c

448

stream.opaque = Z_NULL;

usr.bin/ctfconv/generate.c

450

if ((error = deflateInit(&stream, Z_BEST_COMPRESSION)) != Z_OK) {

usr.bin/ctfconv/generate.c

455

stream.next_in = (void *)buf;

usr.bin/ctfconv/generate.c

456

stream.avail_in = size;

usr.bin/ctfconv/generate.c

457

stream.next_out = (unsigned char *)data;

usr.bin/ctfconv/generate.c

458

stream.avail_out = len;

usr.bin/ctfconv/generate.c

460

if ((error = deflate(&stream, Z_FINISH)) != Z_STREAM_END) {

usr.bin/ctfconv/generate.c

462

deflateEnd(&stream);

usr.bin/ctfconv/generate.c

466

if ((error = deflateEnd(&stream)) != Z_OK) {

usr.bin/ctfconv/generate.c

472

*pclen = stream.total_out;

usr.bin/ctfdump/ctfdump.c

671

z_stream stream;

usr.bin/ctfdump/ctfdump.c

681

memset(&stream, 0, sizeof(stream));

usr.bin/ctfdump/ctfdump.c

682

stream.next_in = (void *)buf;

usr.bin/ctfdump/ctfdump.c

683

stream.avail_in = size;

usr.bin/ctfdump/ctfdump.c

684

stream.next_out = (uint8_t *)data;

usr.bin/ctfdump/ctfdump.c

685

stream.avail_out = len;

usr.bin/ctfdump/ctfdump.c

687

if ((error = inflateInit(&stream)) != Z_OK) {

usr.bin/ctfdump/ctfdump.c

692

if ((error = inflate(&stream, Z_FINISH)) != Z_STREAM_END) {

usr.bin/ctfdump/ctfdump.c

694

inflateEnd(&stream);

usr.bin/ctfdump/ctfdump.c

698

if ((error = inflateEnd(&stream)) != Z_OK) {

usr.bin/ctfdump/ctfdump.c

703

if (stream.total_out != len) {

usr.bin/ctfdump/ctfdump.c

705

stream.total_out, len);

usr.bin/cvs/rcs.c

1476

rcs_strprint(const u_char *str, size_t slen, FILE *stream)

usr.bin/cvs/rcs.c

1489

(void)fwrite(sp, sizeof(u_char), ap - sp + 1, stream);

usr.bin/cvs/rcs.c

1492

putc('@', stream);

usr.bin/dc/bcode.h

77

FILE *stream;

usr.bin/dc/inout.c

58

src_setstream(struct source *src, FILE *stream)

usr.bin/dc/inout.c

60

src->u.stream = stream;

usr.bin/dc/inout.c

75

return src->lastchar = getc(src->u.stream);

usr.bin/dc/inout.c

81

(void)ungetc(src->lastchar, src->u.stream);

usr.bin/dc/inout.c

94

if (fgets(buf, BUFSIZ, src->u.stream) == NULL)

usr.bin/dig/lib/isc/include/isc/log.h

115

FILE *stream; /*%< Initialized to NULL for #ISC_LOG_TOFILE. */

usr.bin/dig/lib/isc/lex.c

191

FILE *stream = NULL;

usr.bin/dig/lib/isc/lex.c

197

if ((stream = fopen(filename, "r")) == NULL)

usr.bin/dig/lib/isc/lex.c

200

result = new_source(lex, 1, 1, stream, filename);

usr.bin/dig/lib/isc/lex.c

202

(void)fclose(stream);

usr.bin/dig/lib/isc/lex.c

286

FILE *stream;

usr.bin/dig/lib/isc/lex.c

336

stream = source->input;

usr.bin/dig/lib/isc/lex.c

338

c = getc_unlocked(stream);

usr.bin/dig/lib/isc/lex.c

340

if (ferror(stream)) {

usr.bin/dig/lib/isc/log.c

220

#define FILE_STREAM(channel) (channel->destination.file.stream)

usr.bin/dig/lib/isc/log.c

315

destination.file.stream = stderr;

usr.bin/dig/lib/isc/log.c

334

destination.file.stream = stderr;

usr.bin/dig/lib/isc/log.c

561

FILE_STREAM(channel) = destination->file.stream;

usr.bin/fmt/fmt.c

386

process_stream(FILE *stream, const char *name)

usr.bin/fmt/fmt.c

407

center_stream(stream, name);

usr.bin/fmt/fmt.c

411

while ((line = get_line(stream)) != NULL) {

usr.bin/fmt/fmt.c

504

if (ferror(stream)) {

usr.bin/fmt/fmt.c

626

center_stream(FILE *stream, const char *name)

usr.bin/fmt/fmt.c

634

while ((line = get_line(stream)) != NULL) {

usr.bin/fmt/fmt.c

658

if (ferror(stream)) {

usr.bin/fmt/fmt.c

673

get_line(FILE *stream)

usr.bin/fmt/fmt.c

686

while ((ch = getc(stream)) != '\n' && ch != EOF) {

usr.bin/mail/def.h

260

#define trunc(stream) do { \

usr.bin/mail/def.h

261

(void)fflush(stream); \

usr.bin/mail/def.h

262

(void)ftruncate(fileno(stream), (off_t)ftell(stream)); \

usr.bin/make/lowparse.c

149

new_input_file(const char *name, FILE *stream)

usr.bin/make/lowparse.c

159

istream->F = stream;

usr.bin/make/lowparse.c

213

Parse_FromFile(const char *name, FILE *stream)

usr.bin/make/lowparse.c

217

current = new_input_file(name, stream);

usr.bin/make/main.c

855

FILE *stream;

usr.bin/make/main.c

858

stream = fopen(fname, "r");

usr.bin/make/main.c

859

if (stream != NULL)

usr.bin/make/main.c

860

return stream;

usr.bin/make/main.c

887

FILE *stream;

usr.bin/make/main.c

894

if ((stream = open_makefile(fname)) != NULL)

usr.bin/make/main.c

901

if ((stream = open_makefile(path)) == NULL)

usr.bin/make/main.c

919

if ((stream = open_makefile(name)) == NULL)

usr.bin/make/main.c

928

Parse_File(fname, stream);

usr.bin/make/parse.c

1627

Parse_File(const char *filename, FILE *stream)

usr.bin/make/parse.c

1640

Parse_FromFile(filename, stream);

usr.bin/mandoc/main.c

1080

FILE *stream;

usr.bin/mandoc/main.c

1086

stream = NULL;

usr.bin/mandoc/main.c

1094

if ((stream = fdopen(fd, "r")) == NULL) {

usr.bin/mandoc/main.c

1101

while ((len = getline(&line, &linesz, stream)) != -1) {

usr.bin/mandoc/main.c

1127

if (ferror(stream))

usr.bin/mandoc/main.c

1132

if (stream != NULL)

usr.bin/mandoc/main.c

1133

fclose(stream);

usr.bin/mandoc/mandocdb.c

1271

FILE *stream;

usr.bin/mandoc/mandocdb.c

1279

stream = fd == -1 ? fopen(mlink->file, "r") : fdopen(fd, "r");

usr.bin/mandoc/mandocdb.c

1280

if (stream == NULL) {

usr.bin/mandoc/mandocdb.c

1293

while (getline(&line, &linesz, stream) != -1) {

usr.bin/mandoc/mandocdb.c

1313

if (getline(&line, &linesz, stream) == -1)

usr.bin/mandoc/mandocdb.c

1321

while (getline(&line, &linesz, stream) != -1)

usr.bin/mandoc/mandocdb.c

1335

while ((len = getline(&line, &linesz, stream)) != -1) {

usr.bin/mandoc/mandocdb.c

1360

fclose(stream);

usr.bin/mandoc/mandocdb.c

1403

fclose(stream);

usr.bin/mandoc/manpath.c

159

FILE *stream;

usr.bin/mandoc/manpath.c

164

if ((stream = fopen(file, "r")) == NULL)

usr.bin/mandoc/manpath.c

170

while ((linelen = getline(&line, &linesz, stream)) != -1) {

usr.bin/mandoc/manpath.c

206

fclose(stream);

usr.bin/pkgconf/libpkgconf/fileio.c

112

return !(c == EOF || ferror(stream));

usr.bin/pkgconf/libpkgconf/fileio.c

20

pkgconf_fgetline(pkgconf_buffer_t *buffer, FILE *stream)

usr.bin/pkgconf/libpkgconf/fileio.c

25

while ((c = getc(stream)) != EOF)

usr.bin/pkgconf/libpkgconf/fileio.c

37

c = getc(stream);

usr.bin/pkgconf/libpkgconf/fileio.c

54

c2 = getc(stream);

usr.bin/pkgconf/libpkgconf/fileio.c

57

ungetc(c2, stream);

usr.bin/pkgconf/libpkgconf/fileio.c

73

if ((c2 = getc(stream)) == '\n')

usr.bin/pkgconf/libpkgconf/fileio.c

84

ungetc(c2, stream);

usr.bin/pkgconf/libpkgconf/libpkgconf.h

463

PKGCONF_API bool pkgconf_fgetline(pkgconf_buffer_t *buffer, FILE *stream);

usr.bin/rcs/rcs.c

1453

rcs_strprint(const u_char *str, size_t slen, FILE *stream)

usr.bin/rcs/rcs.c

1466

(void)fwrite(sp, sizeof(u_char), ap - sp + 1, stream);

usr.bin/rcs/rcs.c

1469

putc('@', stream);

usr.bin/ssh/packet.c

696

z_streamp stream = &state->compression_out_stream;

usr.bin/ssh/packet.c

699

(unsigned long long)stream->total_in,

usr.bin/ssh/packet.c

700

(unsigned long long)stream->total_out,

usr.bin/ssh/packet.c

701

stream->total_in == 0 ? 0.0 :

usr.bin/ssh/packet.c

702

(double) stream->total_out / stream->total_in);

usr.bin/ssh/packet.c

704

deflateEnd(stream);

usr.bin/ssh/packet.c

707

z_streamp stream = &state->compression_in_stream;

usr.bin/ssh/packet.c

710

(unsigned long long)stream->total_out,

usr.bin/ssh/packet.c

711

(unsigned long long)stream->total_in,

usr.bin/ssh/packet.c

712

stream->total_out == 0 ? 0.0 :

usr.bin/ssh/packet.c

713

(double) stream->total_in / stream->total_out);

usr.bin/ssh/packet.c

715

inflateEnd(stream);

usr.bin/ssh/utf8.c

268

vfmprintf(FILE *stream, const char *fmt, va_list ap)

usr.bin/ssh/utf8.c

277

if (fputs(str, stream) == EOF)

usr.bin/ssh/utf8.c

284

fmprintf(FILE *stream, const char *fmt, ...)

usr.bin/ssh/utf8.c

290

ret = vfmprintf(stream, fmt, ap);

usr.bin/tftp/main.c

770

readcmd(char *input, int len, FILE *stream)

usr.bin/tftp/main.c

789

if (fgets(input, len, stream) == NULL) {

usr.bin/tmux/file.c

109

file_create_with_client(struct client *c, int stream, client_file_cb cb,

usr.bin/tmux/file.c

120

cf->stream = stream;

usr.bin/tmux/file.c

217

find.stream = 1;

usr.bin/tmux/file.c

224

msg.stream = 1;

usr.bin/tmux/file.c

244

find.stream = 1;

usr.bin/tmux/file.c

251

msg.stream = 1;

usr.bin/tmux/file.c

274

find.stream = 2;

usr.bin/tmux/file.c

281

msg.stream = 2;

usr.bin/tmux/file.c

302

u_int stream = file_next_stream++;

usr.bin/tmux/file.c

307

cf = file_create_with_client(c, stream, cb, cbdata);

usr.bin/tmux/file.c

320

cf = file_create_with_client(c, stream, cb, cbdata);

usr.bin/tmux/file.c

351

msg->stream = cf->stream;

usr.bin/tmux/file.c

375

u_int stream = file_next_stream++;

usr.bin/tmux/file.c

381

cf = file_create_with_client(c, stream, cb, cbdata);

usr.bin/tmux/file.c

394

cf = file_create_with_client(c, stream, cb, cbdata);

usr.bin/tmux/file.c

426

msg->stream = cf->stream;

usr.bin/tmux/file.c

450

log_debug("read cancel file %d", cf->stream);

usr.bin/tmux/file.c

456

msg.stream = cf->stream;

usr.bin/tmux/file.c

488

msg->stream = cf->stream;

usr.bin/tmux/file.c

495

log_debug("file %d sent %zu, left %zu", cf->stream, sent, left);

usr.bin/tmux/file.c

500

} else if (cf->stream > 2) {

usr.bin/tmux/file.c

501

close.stream = cf->stream;

usr.bin/tmux/file.c

522

log_debug("file %u %zu bytes left", cf->stream, left);

usr.bin/tmux/file.c

535

log_debug("write error file %d", cf->stream);

usr.bin/tmux/file.c

553

log_debug("write check file %d", cf->stream);

usr.bin/tmux/file.c

586

log_debug("open write file %d %s", msg->stream, path);

usr.bin/tmux/file.c

588

find.stream = msg->stream;

usr.bin/tmux/file.c

593

cf = file_create_with_peer(peer, files, msg->stream, cb, cbdata);

usr.bin/tmux/file.c

625

reply.stream = msg->stream;

usr.bin/tmux/file.c

641

find.stream = msg->stream;

usr.bin/tmux/file.c

644

log_debug("write %zu to file %d", size, cf->stream);

usr.bin/tmux/file.c

660

find.stream = msg->stream;

usr.bin/tmux/file.c

663

log_debug("close file %d", cf->stream);

usr.bin/tmux/file.c

683

log_debug("read error file %d", cf->stream);

usr.bin/tmux/file.c

685

msg.stream = cf->stream;

usr.bin/tmux/file.c

69

if (cf1->stream < cf2->stream)

usr.bin/tmux/file.c

71

if (cf1->stream > cf2->stream)

usr.bin/tmux/file.c

714

log_debug("read %zu from file %d", bsize, cf->stream);

usr.bin/tmux/file.c

718

msg->stream = cf->stream;

usr.bin/tmux/file.c

747

log_debug("open read file %d %s", msg->stream, path);

usr.bin/tmux/file.c

749

find.stream = msg->stream;

usr.bin/tmux/file.c

754

cf = file_create_with_peer(peer, files, msg->stream, cb, cbdata);

usr.bin/tmux/file.c

786

reply.stream = msg->stream;

usr.bin/tmux/file.c

801

find.stream = msg->stream;

usr.bin/tmux/file.c

804

log_debug("cancel file %d", cf->stream);

usr.bin/tmux/file.c

819

find.stream = msg->stream;

usr.bin/tmux/file.c

84

int stream, client_file_cb cb, void *cbdata)

usr.bin/tmux/file.c

841

find.stream = msg->stream;

usr.bin/tmux/file.c

845

log_debug("file %d read %zu bytes", cf->stream, bsize);

usr.bin/tmux/file.c

865

find.stream = msg->stream;

usr.bin/tmux/file.c

869

log_debug("file %d read done", cf->stream);

usr.bin/tmux/file.c

91

cf->stream = stream;

usr.bin/tmux/tmux-protocol.h

101

int stream;

usr.bin/tmux/tmux-protocol.h

107

int stream;

usr.bin/tmux/tmux-protocol.h

111

int stream;

usr.bin/tmux/tmux-protocol.h

116

int stream;

usr.bin/tmux/tmux-protocol.h

83

int stream;

usr.bin/tmux/tmux-protocol.h

88

int stream;

usr.bin/tmux/tmux-protocol.h

92

int stream;

usr.bin/tmux/tmux-protocol.h

97

int stream;

usr.bin/wc/wc.c

123

FILE *stream;

usr.bin/wc/wc.c

134

stream = NULL;

usr.bin/wc/wc.c

220

stream = stdin;

usr.bin/wc/wc.c

221

else if ((stream = fdopen(fd, "r")) == NULL) {

usr.bin/wc/wc.c

229

while ((len = getline(&buf, &bufsz, stream)) > 0) {

usr.bin/wc/wc.c

251

if (ferror(stream)) {

usr.bin/wc/wc.c

267

if ((stream == NULL ? close(fd) : fclose(stream)) != 0) {

usr.sbin/acme-client/parse.y

49

FILE *stream;

usr.sbin/acme-client/parse.y

556

c = getc(file->stream);

usr.sbin/acme-client/parse.y

817

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/acme-client/parse.y

828

fclose(nfile->stream);

usr.sbin/acme-client/parse.y

846

fclose(file->stream);

usr.sbin/bgpd/parse.y

3721

c = getc(file->stream);

usr.sbin/bgpd/parse.y

4032

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/bgpd/parse.y

4039

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/bgpd/parse.y

4040

fclose(nfile->stream);

usr.sbin/bgpd/parse.y

4050

fclose(nfile->stream);

usr.sbin/bgpd/parse.y

4068

fclose(file->stream);

usr.sbin/bgpd/parse.y

60

FILE *stream;

usr.sbin/dvmrpd/parse.y

449

if ((c = getc(file->stream)) == EOF) {

usr.sbin/dvmrpd/parse.y

459

while ((c = getc(file->stream)) == '\\') {

usr.sbin/dvmrpd/parse.y

460

next = getc(file->stream);

usr.sbin/dvmrpd/parse.y

472

c = getc(file->stream);

usr.sbin/dvmrpd/parse.y

51

FILE *stream;

usr.sbin/dvmrpd/parse.y

700

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/dvmrpd/parse.y

706

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/dvmrpd/parse.y

707

fclose(nfile->stream);

usr.sbin/dvmrpd/parse.y

726

fclose(file->stream);

usr.sbin/eigrpd/parse.y

46

FILE *stream;

usr.sbin/eigrpd/parse.y

669

c = getc(file->stream);

usr.sbin/eigrpd/parse.y

949

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/eigrpd/parse.y

955

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/eigrpd/parse.y

956

fclose(nfile->stream);

usr.sbin/eigrpd/parse.y

966

fclose(nfile->stream);

usr.sbin/eigrpd/parse.y

984

fclose(file->stream);

usr.sbin/hostapd/parse.y

1356

c = getc(file->stream);

usr.sbin/hostapd/parse.y

1740

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/hostapd/parse.y

1746

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/hostapd/parse.y

1747

fclose(nfile->stream);

usr.sbin/hostapd/parse.y

1757

fclose(nfile->stream);

usr.sbin/hostapd/parse.y

1775

fclose(file->stream);

usr.sbin/hostapd/parse.y

62

FILE *stream;

usr.sbin/httpd/parse.y

1549

c = getc(file->stream);

usr.sbin/httpd/parse.y

1829

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/httpd/parse.y

1835

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/httpd/parse.y

1836

fclose(nfile->stream);

usr.sbin/httpd/parse.y

1846

fclose(nfile->stream);

usr.sbin/httpd/parse.y

1864

fclose(file->stream);

usr.sbin/httpd/parse.y

63

FILE *stream;

usr.sbin/ifstated/parse.y

443

if ((c = getc(file->stream)) == EOF) {

usr.sbin/ifstated/parse.y

453

while ((c = getc(file->stream)) == '\\') {

usr.sbin/ifstated/parse.y

454

next = getc(file->stream);

usr.sbin/ifstated/parse.y

466

c = getc(file->stream);

usr.sbin/ifstated/parse.y

49

FILE *stream;

usr.sbin/ifstated/parse.y

694

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ifstated/parse.y

700

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/ifstated/parse.y

701

fclose(nfile->stream);

usr.sbin/ifstated/parse.y

720

fclose(file->stream);

usr.sbin/iscsictl/parse.y

415

c = getc(file->stream);

usr.sbin/iscsictl/parse.y

456

c = getc(file->stream);

usr.sbin/iscsictl/parse.y

51

FILE *stream;

usr.sbin/iscsictl/parse.y

664

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/iscsictl/parse.y

675

fclose(nfile->stream);

usr.sbin/iscsictl/parse.y

693

fclose(file->stream);

usr.sbin/ldapd/parse.y

507

c = getc(file->stream);

usr.sbin/ldapd/parse.y

53

FILE *stream;

usr.sbin/ldapd/parse.y

789

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ldapd/parse.y

796

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/ldapd/parse.y

797

fclose(nfile->stream);

usr.sbin/ldapd/parse.y

807

fclose(nfile->stream);

usr.sbin/ldapd/parse.y

825

fclose(file->stream);

usr.sbin/ldomctl/parse.y

441

if ((c = getc(file->stream)) == EOF) {

usr.sbin/ldomctl/parse.y

451

while ((c = getc(file->stream)) == '\\') {

usr.sbin/ldomctl/parse.y

452

next = getc(file->stream);

usr.sbin/ldomctl/parse.y

464

c = getc(file->stream);

usr.sbin/ldomctl/parse.y

48

FILE *stream;

usr.sbin/ldomctl/parse.y

635

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ldomctl/parse.y

655

fclose(file->stream);

usr.sbin/ldpd/parse.y

1263

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ldpd/parse.y

1269

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/ldpd/parse.y

1270

fclose(nfile->stream);

usr.sbin/ldpd/parse.y

1280

fclose(nfile->stream);

usr.sbin/ldpd/parse.y

1298

fclose(file->stream);

usr.sbin/ldpd/parse.y

48

FILE *stream;

usr.sbin/ldpd/parse.y

983

c = getc(file->stream);

usr.sbin/lpd/parse.y

305

if ((c = getc(file->stream)) == EOF) {

usr.sbin/lpd/parse.y

315

while ((c = getc(file->stream)) == '\\') {

usr.sbin/lpd/parse.y

316

next = getc(file->stream);

usr.sbin/lpd/parse.y

328

c = getc(file->stream);

usr.sbin/lpd/parse.y

52

FILE *stream;

usr.sbin/lpd/parse.y

561

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/lpd/parse.y

567

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/lpd/parse.y

568

fclose(nfile->stream);

usr.sbin/lpd/parse.y

587

fclose(file->stream);

usr.sbin/npppd/npppd/parse.y

1227

if ((c = getc(file->stream)) == EOF) {

usr.sbin/npppd/npppd/parse.y

1237

while ((c = getc(file->stream)) == '\\') {

usr.sbin/npppd/npppd/parse.y

1238

next = getc(file->stream);

usr.sbin/npppd/npppd/parse.y

1250

c = getc(file->stream);

usr.sbin/npppd/npppd/parse.y

1432

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/npppd/npppd/parse.y

1434

if ((nfile->stream = priv_fopen(nfile->name)) == NULL) {

usr.sbin/npppd/npppd/parse.y

1455

fclose(file->stream);

usr.sbin/npppd/npppd/parse.y

55

FILE *stream;

usr.sbin/nsd/server.c

4064

consume_pp2_header(struct buffer* buf, struct query* q, int stream)

usr.sbin/nsd/server.c

4133

if(!stream) {

usr.sbin/nsd/util/proxy_protocol.c

112

(stream?PP2_PROT_STREAM:PP2_PROT_DGRAM);

usr.sbin/nsd/util/proxy_protocol.c

136

(stream?PP2_PROT_STREAM:PP2_PROT_DGRAM);

usr.sbin/nsd/util/proxy_protocol.c

92

int stream)

usr.sbin/nsd/util/proxy_protocol.h

165

int stream);

usr.sbin/nsd/verify.c

102

assert(stream->buf[stream->cnt] == '\0');

usr.sbin/nsd/verify.c

103

if ((eol = strchr(stream->buf + stream->off, '\n'))) {

usr.sbin/nsd/verify.c

104

len = eol - (stream->buf + stream->off);

usr.sbin/nsd/verify.c

106

len = stream->cnt - stream->off;

usr.sbin/nsd/verify.c

109

assert(len <= (stream->cnt - stream->off));

usr.sbin/nsd/verify.c

115

fmt = stream->cut ? "verifier: .. %.*s .." : "verifier: %.*s ..";

usr.sbin/nsd/verify.c

117

stream->cut = 1;

usr.sbin/nsd/verify.c

119

fmt = stream->cut ? "verifier: .. %.*s" : "verifier: %.*s";

usr.sbin/nsd/verify.c

120

stream->cut = 0;

usr.sbin/nsd/verify.c

122

log_msg(stream->priority, fmt, len, stream->buf + stream->off);

usr.sbin/nsd/verify.c

124

stream->off += len + (eol != NULL);

usr.sbin/nsd/verify.c

125

assert(stream->off <= stream->cnt);

usr.sbin/nsd/verify.c

138

struct verifier_stream *stream;

usr.sbin/nsd/verify.c

145

stream = &verifier->output_stream;

usr.sbin/nsd/verify.c

148

stream = &verifier->error_stream;

usr.sbin/nsd/verify.c

151

assert(stream);

usr.sbin/nsd/verify.c

152

assert(stream->fd != -1);

usr.sbin/nsd/verify.c

155

cnt = fill_buffer(stream);

usr.sbin/nsd/verify.c

157

while (print_line(stream, eof)) ;

usr.sbin/nsd/verify.c

161

event_del(&stream->event);

usr.sbin/nsd/verify.c

162

close(stream->fd);

usr.sbin/nsd/verify.c

163

stream->fd = -1;

usr.sbin/nsd/verify.c

181

static void close_stream(struct verifier *verifier, struct verifier_stream *stream)

usr.sbin/nsd/verify.c

183

if (stream->fd == -1)

usr.sbin/nsd/verify.c

185

verify_handle_stream(stream->fd, EV_READ, verifier);

usr.sbin/nsd/verify.c

186

if (stream->fd == -1)

usr.sbin/nsd/verify.c

188

event_del(&stream->event);

usr.sbin/nsd/verify.c

189

close(stream->fd);

usr.sbin/nsd/verify.c

190

stream->fd = -1;

usr.sbin/nsd/verify.c

60

static inline ssize_t fill_buffer(struct verifier_stream *stream)

usr.sbin/nsd/verify.c

64

assert(stream);

usr.sbin/nsd/verify.c

65

assert(stream->fd != -1);

usr.sbin/nsd/verify.c

66

assert(stream->cnt <= LOGBUFSIZE);

usr.sbin/nsd/verify.c

67

assert(stream->off <= stream->cnt);

usr.sbin/nsd/verify.c

70

if (stream->off) {

usr.sbin/nsd/verify.c

71

size_t len = stream->cnt - stream->off;

usr.sbin/nsd/verify.c

72

memmove(stream->buf, stream->buf + stream->off, len);

usr.sbin/nsd/verify.c

73

stream->off = 0;

usr.sbin/nsd/verify.c

74

stream->cnt = len;

usr.sbin/nsd/verify.c

75

stream->buf[stream->cnt] = '\0'; // always null-terminate

usr.sbin/nsd/verify.c

79

cnt = read(stream->fd, stream->buf + stream->cnt, LOGBUFSIZE - stream->cnt);

usr.sbin/nsd/verify.c

81

stream->cnt += (size_t)cnt;

usr.sbin/nsd/verify.c

82

assert(stream->cnt <= LOGBUFSIZE);

usr.sbin/nsd/verify.c

83

assert(stream->off <= stream->cnt);

usr.sbin/nsd/verify.c

84

stream->buf[stream->cnt] = '\0'; // always null-terminate

usr.sbin/nsd/verify.c

89

static inline size_t print_line(struct verifier_stream *stream, int eof)

usr.sbin/nsd/verify.c

95

if (stream->cnt == 0)

usr.sbin/nsd/verify.c

97

assert(stream->off <= stream->cnt);

usr.sbin/nsd/verify.c

98

if (stream->off == stream->cnt)

usr.sbin/ntpd/parse.y

42

FILE *stream;

usr.sbin/ntpd/parse.y

589

if ((c = getc(file->stream)) == EOF) {

usr.sbin/ntpd/parse.y

599

while ((c = getc(file->stream)) == '\\') {

usr.sbin/ntpd/parse.y

600

next = getc(file->stream);

usr.sbin/ntpd/parse.y

612

c = getc(file->stream);

usr.sbin/ntpd/parse.y

793

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ntpd/parse.y

813

fclose(file->stream);

usr.sbin/ospf6d/parse.y

1012

fclose(file->stream);

usr.sbin/ospf6d/parse.y

52

FILE *stream;

usr.sbin/ospf6d/parse.y

697

c = getc(file->stream);

usr.sbin/ospf6d/parse.y

977

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ospf6d/parse.y

983

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/ospf6d/parse.y

984

fclose(nfile->stream);

usr.sbin/ospf6d/parse.y

994

fclose(nfile->stream);

usr.sbin/ospfd/parse.y

1168

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ospfd/parse.y

1174

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/ospfd/parse.y

1175

fclose(nfile->stream);

usr.sbin/ospfd/parse.y

1185

fclose(nfile->stream);

usr.sbin/ospfd/parse.y

1203

fclose(file->stream);

usr.sbin/ospfd/parse.y

50

FILE *stream;

usr.sbin/ospfd/parse.y

888

c = getc(file->stream);

usr.sbin/rad/parse.y

56

FILE *stream;

usr.sbin/rad/parse.y

578

c = getc(file->stream);

usr.sbin/rad/parse.y

858

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/rad/parse.y

864

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/rad/parse.y

865

fclose(nfile->stream);

usr.sbin/rad/parse.y

875

fclose(nfile->stream);

usr.sbin/rad/parse.y

893

fclose(file->stream);

usr.sbin/radiusd/parse.y

58

FILE *stream;

usr.sbin/radiusd/parse.y

662

if ((c = getc(file->stream)) == EOF) {

usr.sbin/radiusd/parse.y

672

while ((c = getc(file->stream)) == '\\') {

usr.sbin/radiusd/parse.y

673

next = getc(file->stream);

usr.sbin/radiusd/parse.y

685

c = getc(file->stream);

usr.sbin/radiusd/parse.y

866

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/radiusd/parse.y

886

fclose(file->stream);

usr.sbin/relayd/parse.y

2562

else c = getc(file->stream);

usr.sbin/relayd/parse.y

2842

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/relayd/parse.y

2848

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/relayd/parse.y

2849

fclose(nfile->stream);

usr.sbin/relayd/parse.y

2859

fclose(nfile->stream);

usr.sbin/relayd/parse.y

2877

fclose(file->stream);

usr.sbin/relayd/parse.y

65

FILE *stream;

usr.sbin/ripd/parse.y

484

if ((c = getc(file->stream)) == EOF) {

usr.sbin/ripd/parse.y

494

while ((c = getc(file->stream)) == '\\') {

usr.sbin/ripd/parse.y

495

next = getc(file->stream);

usr.sbin/ripd/parse.y

50

FILE *stream;

usr.sbin/ripd/parse.y

507

c = getc(file->stream);

usr.sbin/ripd/parse.y

735

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ripd/parse.y

741

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/ripd/parse.y

742

fclose(nfile->stream);

usr.sbin/ripd/parse.y

761

fclose(file->stream);

usr.sbin/smtpd/parse.y

2810

c = getc(file->stream);

usr.sbin/smtpd/parse.y

3097

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/smtpd/parse.y

3103

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/smtpd/parse.y

3104

fclose(nfile->stream);

usr.sbin/smtpd/parse.y

3114

fclose(nfile->stream);

usr.sbin/smtpd/parse.y

3132

fclose(file->stream);

usr.sbin/smtpd/parse.y

51

FILE *stream;

usr.sbin/snmpd/mib.y

1115

while ((c = fgetc(file.stream)) != EOF) {

usr.sbin/snmpd/mib.y

1152

ungetc(c, file.stream);

usr.sbin/snmpd/mib.y

1165

ungetc(c, file.stream);

usr.sbin/snmpd/mib.y

1171

ungetc(c, file.stream);

usr.sbin/snmpd/mib.y

1179

ungetc(c, file.stream);

usr.sbin/snmpd/mib.y

1186

ungetc('-', file.stream);

usr.sbin/snmpd/mib.y

1187

ungetc('-', file.stream);

usr.sbin/snmpd/mib.y

1198

if (ferror(file.stream)) {

usr.sbin/snmpd/mib.y

1628

if ((file.stream = fopen(path, "r")) == NULL) {

usr.sbin/snmpd/mib.y

1641

fclose(file.stream);

usr.sbin/snmpd/mib.y

258

FILE *stream;

usr.sbin/snmpd/parse.y

1366

else c = getc(file->stream);

usr.sbin/snmpd/parse.y

1405

c = getc(file->stream);

usr.sbin/snmpd/parse.y

1407

ungetc(c, file->stream);

usr.sbin/snmpd/parse.y

1653

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/snmpd/parse.y

1659

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/snmpd/parse.y

1660

fclose(nfile->stream);

usr.sbin/snmpd/parse.y

1670

fclose(nfile->stream);

usr.sbin/snmpd/parse.y

1688

fclose(file->stream);

usr.sbin/snmpd/parse.y

65

FILE *stream;

usr.sbin/unbound/services/listen_dnsport.c

3614

struct doq_stream* stream;

usr.sbin/unbound/services/listen_dnsport.c

3617

stream = (struct doq_stream*)node;

usr.sbin/unbound/services/listen_dnsport.c

3618

if(stream->in)

usr.sbin/unbound/services/listen_dnsport.c

3619

doq_table_quic_size_subtract(table, stream->inlen);

usr.sbin/unbound/services/listen_dnsport.c

3620

if(stream->out)

usr.sbin/unbound/services/listen_dnsport.c

3621

doq_table_quic_size_subtract(table, stream->outlen);

usr.sbin/unbound/services/listen_dnsport.c

3622

doq_table_quic_size_subtract(table, sizeof(*stream));

usr.sbin/unbound/services/listen_dnsport.c

3623

doq_stream_delete(stream);

usr.sbin/unbound/services/listen_dnsport.c

3840

doq_conn_add_stream(struct doq_conn* conn, struct doq_stream* stream)

usr.sbin/unbound/services/listen_dnsport.c

3842

(void)rbtree_insert(&conn->stream_tree, &stream->node);

usr.sbin/unbound/services/listen_dnsport.c

3847

doq_conn_del_stream(struct doq_conn* conn, struct doq_stream* stream)

usr.sbin/unbound/services/listen_dnsport.c

3849

(void)rbtree_delete(&conn->stream_tree, &stream->node);

usr.sbin/unbound/services/listen_dnsport.c

3856

struct doq_stream* stream = calloc(1, sizeof(*stream));

usr.sbin/unbound/services/listen_dnsport.c

3857

if(!stream)

usr.sbin/unbound/services/listen_dnsport.c

3859

stream->node.key = stream;

usr.sbin/unbound/services/listen_dnsport.c

3860

stream->stream_id = stream_id;

usr.sbin/unbound/services/listen_dnsport.c

3861

return stream;

usr.sbin/unbound/services/listen_dnsport.c

3864

void doq_stream_delete(struct doq_stream* stream)

usr.sbin/unbound/services/listen_dnsport.c

3866

if(!stream)

usr.sbin/unbound/services/listen_dnsport.c

3868

free(stream->in);

usr.sbin/unbound/services/listen_dnsport.c

3869

free(stream->out);

usr.sbin/unbound/services/listen_dnsport.c

3870

free(stream);

usr.sbin/unbound/services/listen_dnsport.c

3888

doq_stream_on_write_list(struct doq_conn* conn, struct doq_stream* stream)

usr.sbin/unbound/services/listen_dnsport.c

3890

if(stream->on_write_list)

usr.sbin/unbound/services/listen_dnsport.c

3892

stream->write_prev = conn->stream_write_last;

usr.sbin/unbound/services/listen_dnsport.c

3894

conn->stream_write_last->write_next = stream;

usr.sbin/unbound/services/listen_dnsport.c

3896

conn->stream_write_first = stream;

usr.sbin/unbound/services/listen_dnsport.c

3897

conn->stream_write_last = stream;

usr.sbin/unbound/services/listen_dnsport.c

3898

stream->write_next = NULL;

usr.sbin/unbound/services/listen_dnsport.c

3899

stream->on_write_list = 1;

usr.sbin/unbound/services/listen_dnsport.c

3904

doq_stream_off_write_list(struct doq_conn* conn, struct doq_stream* stream)

usr.sbin/unbound/services/listen_dnsport.c

3906

if(!stream->on_write_list)

usr.sbin/unbound/services/listen_dnsport.c

3908

if(stream->write_next)

usr.sbin/unbound/services/listen_dnsport.c

3909

stream->write_next->write_prev = stream->write_prev;

usr.sbin/unbound/services/listen_dnsport.c

3910

else conn->stream_write_last = stream->write_prev;

usr.sbin/unbound/services/listen_dnsport.c

3911

if(stream->write_prev)

usr.sbin/unbound/services/listen_dnsport.c

3912

stream->write_prev->write_next = stream->write_next;

usr.sbin/unbound/services/listen_dnsport.c

3913

else conn->stream_write_first = stream->write_next;

usr.sbin/unbound/services/listen_dnsport.c

3914

stream->write_prev = NULL;

usr.sbin/unbound/services/listen_dnsport.c

3915

stream->write_next = NULL;

usr.sbin/unbound/services/listen_dnsport.c

3916

stream->on_write_list = 0;

usr.sbin/unbound/services/listen_dnsport.c

3921

doq_stream_remove_in_buffer(struct doq_stream* stream, struct doq_table* table)

usr.sbin/unbound/services/listen_dnsport.c

3923

if(stream->in) {

usr.sbin/unbound/services/listen_dnsport.c

3924

doq_table_quic_size_subtract(table, stream->inlen);

usr.sbin/unbound/services/listen_dnsport.c

3925

free(stream->in);

usr.sbin/unbound/services/listen_dnsport.c

3926

stream->in = NULL;

usr.sbin/unbound/services/listen_dnsport.c

3927

stream->inlen = 0;

usr.sbin/unbound/services/listen_dnsport.c

3933

doq_stream_remove_out_buffer(struct doq_stream* stream,

usr.sbin/unbound/services/listen_dnsport.c

3936

if(stream->out) {

usr.sbin/unbound/services/listen_dnsport.c

3937

doq_table_quic_size_subtract(table, stream->outlen);

usr.sbin/unbound/services/listen_dnsport.c

3938

free(stream->out);

usr.sbin/unbound/services/listen_dnsport.c

3939

stream->out = NULL;

usr.sbin/unbound/services/listen_dnsport.c

3940

stream->outlen = 0;

usr.sbin/unbound/services/listen_dnsport.c

3945

doq_stream_close(struct doq_conn* conn, struct doq_stream* stream,

usr.sbin/unbound/services/listen_dnsport.c

3949

if(stream->is_closed)

usr.sbin/unbound/services/listen_dnsport.c

3951

stream->is_closed = 1;

usr.sbin/unbound/services/listen_dnsport.c

3952

doq_stream_off_write_list(conn, stream);

usr.sbin/unbound/services/listen_dnsport.c

3955

(int)stream->stream_id, (int)DOQ_APP_ERROR_CODE);

usr.sbin/unbound/services/listen_dnsport.c

3960

stream->stream_id, DOQ_APP_ERROR_CODE);

usr.sbin/unbound/services/listen_dnsport.c

3963

(int)stream->stream_id, ngtcp2_strerror(ret));

usr.sbin/unbound/services/listen_dnsport.c

3971

doq_stream_remove_in_buffer(stream, conn->doq_socket->table);

usr.sbin/unbound/services/listen_dnsport.c

3972

doq_stream_remove_out_buffer(stream, conn->doq_socket->table);

usr.sbin/unbound/services/listen_dnsport.c

3973

doq_table_quic_size_subtract(conn->doq_socket->table, sizeof(*stream));

usr.sbin/unbound/services/listen_dnsport.c

3974

doq_conn_del_stream(conn, stream);

usr.sbin/unbound/services/listen_dnsport.c

3975

doq_stream_delete(stream);

usr.sbin/unbound/services/listen_dnsport.c

3981

doq_stream_pickup_answer(struct doq_stream* stream, struct sldns_buffer* buf)

usr.sbin/unbound/services/listen_dnsport.c

3983

stream->is_answer_available = 1;

usr.sbin/unbound/services/listen_dnsport.c

3984

if(stream->out) {

usr.sbin/unbound/services/listen_dnsport.c

3985

free(stream->out);

usr.sbin/unbound/services/listen_dnsport.c

3986

stream->out = NULL;

usr.sbin/unbound/services/listen_dnsport.c

3987

stream->outlen = 0;

usr.sbin/unbound/services/listen_dnsport.c

3989

stream->nwrite = 0;

usr.sbin/unbound/services/listen_dnsport.c

3990

stream->outlen = sldns_buffer_limit(buf);

usr.sbin/unbound/services/listen_dnsport.c

3994

stream->outlen_wire = htons(stream->outlen);

usr.sbin/unbound/services/listen_dnsport.c

3995

stream->out = memdup(sldns_buffer_begin(buf), sldns_buffer_limit(buf));

usr.sbin/unbound/services/listen_dnsport.c

3996

if(!stream->out) {

usr.sbin/unbound/services/listen_dnsport.c

4004

doq_stream_send_reply(struct doq_conn* conn, struct doq_stream* stream,

usr.sbin/unbound/services/listen_dnsport.c

4011

(int)stream->stream_id, (s?s:"null"));

usr.sbin/unbound/services/listen_dnsport.c

4014

if(stream->out)

usr.sbin/unbound/services/listen_dnsport.c

4016

stream->outlen);

usr.sbin/unbound/services/listen_dnsport.c

4017

if(!doq_stream_pickup_answer(stream, buf))

usr.sbin/unbound/services/listen_dnsport.c

4019

doq_table_quic_size_add(conn->doq_socket->table, stream->outlen);

usr.sbin/unbound/services/listen_dnsport.c

4020

doq_stream_on_write_list(conn, stream);

usr.sbin/unbound/services/listen_dnsport.c

4028

doq_stream_datalen_complete(struct doq_stream* stream, struct doq_table* table)

usr.sbin/unbound/services/listen_dnsport.c

4030

if(stream->inlen > 1024*1024) {

usr.sbin/unbound/services/listen_dnsport.c

4032

(int)stream->inlen);

usr.sbin/unbound/services/listen_dnsport.c

4035

stream->in = calloc(1, stream->inlen);

usr.sbin/unbound/services/listen_dnsport.c

4036

if(!stream->in) {

usr.sbin/unbound/services/listen_dnsport.c

4041

doq_table_quic_size_add(table, stream->inlen);

usr.sbin/unbound/services/listen_dnsport.c

4047

doq_stream_data_complete(struct doq_conn* conn, struct doq_stream* stream)

usr.sbin/unbound/services/listen_dnsport.c

4051

char* s = sldns_wire2str_pkt(stream->in, stream->inlen);

usr.sbin/unbound/services/listen_dnsport.c

4056

a, (int)stream->stream_id, (s?s:"null"));

usr.sbin/unbound/services/listen_dnsport.c

4059

stream->is_query_complete = 1;

usr.sbin/unbound/services/listen_dnsport.c

4061

if(!stream->in) {

usr.sbin/unbound/services/listen_dnsport.c

4065

if(stream->inlen > sldns_buffer_capacity(c->buffer)) {

usr.sbin/unbound/services/listen_dnsport.c

4070

sldns_buffer_write(c->buffer, stream->in, stream->inlen);

usr.sbin/unbound/services/listen_dnsport.c

4078

c->repinfo.doq_streamid = stream->stream_id;

usr.sbin/unbound/services/listen_dnsport.c

4083

if(!doq_stream_send_reply(conn, stream, c->buffer)) {

usr.sbin/unbound/services/listen_dnsport.c

4095

doq_stream_recv_data(struct doq_stream* stream, const uint8_t* data,

usr.sbin/unbound/services/listen_dnsport.c

4100

if(stream->nread < 2) {

usr.sbin/unbound/services/listen_dnsport.c

4102

size_t todolen = 2 - stream->nread;

usr.sbin/unbound/services/listen_dnsport.c

4104

if(stream->nread > 0) {

usr.sbin/unbound/services/listen_dnsport.c

4106

tcplen = stream->inlen;

usr.sbin/unbound/services/listen_dnsport.c

4110

memmove(((uint8_t*)&tcplen)+stream->nread, data, todolen);

usr.sbin/unbound/services/listen_dnsport.c

4111

stream->nread += todolen;

usr.sbin/unbound/services/listen_dnsport.c

4114

if(stream->nread == 2) {

usr.sbin/unbound/services/listen_dnsport.c

4116

stream->inlen = ntohs(tcplen);

usr.sbin/unbound/services/listen_dnsport.c

4117

if(!doq_stream_datalen_complete(stream, table))

usr.sbin/unbound/services/listen_dnsport.c

4121

stream->inlen = tcplen;

usr.sbin/unbound/services/listen_dnsport.c

4128

if(stream->nread-2 > stream->inlen) {

usr.sbin/unbound/services/listen_dnsport.c

4132

if(datalen > stream->inlen - (stream->nread-2))

usr.sbin/unbound/services/listen_dnsport.c

4133

to_write = stream->inlen - (stream->nread-2);

usr.sbin/unbound/services/listen_dnsport.c

4135

if(!stream->in) {

usr.sbin/unbound/services/listen_dnsport.c

4140

memmove(stream->in+(stream->nread-2), data, to_write);

usr.sbin/unbound/services/listen_dnsport.c

4141

stream->nread += to_write;

usr.sbin/unbound/services/listen_dnsport.c

4154

if(got_data && stream->nread >= stream->inlen+2) {

usr.sbin/unbound/services/listen_dnsport.c

4155

if(!stream->in) {

usr.sbin/unbound/services/listen_dnsport.c

4167

doq_stream_recv_fin(struct doq_conn* conn, struct doq_stream* stream, int

usr.sbin/unbound/services/listen_dnsport.c

4170

if(!stream->is_query_complete && !recv_done) {

usr.sbin/unbound/services/listen_dnsport.c

4173

((int)stream->nread)-2, (int)stream->inlen);

usr.sbin/unbound/services/listen_dnsport.c

4174

if(!doq_stream_close(conn, stream, 1))

usr.sbin/unbound/services/listen_dnsport.c

4328

struct doq_stream* stream;

usr.sbin/unbound/services/listen_dnsport.c

4336

doq_conn->doq_socket->cfg, sizeof(*stream)

usr.sbin/unbound/services/listen_dnsport.c

4354

stream = doq_stream_create(stream_id);

usr.sbin/unbound/services/listen_dnsport.c

4355

if(!stream) {

usr.sbin/unbound/services/listen_dnsport.c

4359

doq_table_quic_size_add(doq_conn->doq_socket->table, sizeof(*stream));

usr.sbin/unbound/services/listen_dnsport.c

4360

doq_conn_add_stream(doq_conn, stream);

usr.sbin/unbound/services/listen_dnsport.c

4372

struct doq_stream* stream;

usr.sbin/unbound/services/listen_dnsport.c

4382

stream = doq_stream_find(doq_conn, stream_id);

usr.sbin/unbound/services/listen_dnsport.c

4383

if(!stream) {

usr.sbin/unbound/services/listen_dnsport.c

4388

if(stream->is_closed) {

usr.sbin/unbound/services/listen_dnsport.c

4393

if(!doq_stream_recv_data(stream, data, datalen, &recv_done,

usr.sbin/unbound/services/listen_dnsport.c

4398

if(!doq_stream_recv_fin(doq_conn, stream, recv_done))

usr.sbin/unbound/services/listen_dnsport.c

4405

if(!doq_stream_data_complete(doq_conn, stream))

usr.sbin/unbound/services/listen_dnsport.c

4418

struct doq_stream* stream;

usr.sbin/unbound/services/listen_dnsport.c

4429

stream = doq_stream_find(doq_conn, stream_id);

usr.sbin/unbound/services/listen_dnsport.c

4430

if(!stream) {

usr.sbin/unbound/services/listen_dnsport.c

4435

if(!doq_stream_close(doq_conn, stream, 0))

usr.sbin/unbound/services/listen_dnsport.c

4447

struct doq_stream* stream;

usr.sbin/unbound/services/listen_dnsport.c

4452

stream = doq_stream_find(doq_conn, stream_id);

usr.sbin/unbound/services/listen_dnsport.c

4453

if(!stream) {

usr.sbin/unbound/services/listen_dnsport.c

4458

if(!doq_stream_close(doq_conn, stream, 0))

usr.sbin/unbound/services/listen_dnsport.c

4470

struct doq_stream* stream;

usr.sbin/unbound/services/listen_dnsport.c

4474

stream = doq_stream_find(doq_conn, stream_id);

usr.sbin/unbound/services/listen_dnsport.c

4475

if(!stream) {

usr.sbin/unbound/services/listen_dnsport.c

4481

if(stream->is_closed)

usr.sbin/unbound/services/listen_dnsport.c

4483

if(offset+datalen >= stream->outlen) {

usr.sbin/unbound/services/listen_dnsport.c

4484

doq_stream_remove_in_buffer(stream,

usr.sbin/unbound/services/listen_dnsport.c

4486

doq_stream_remove_out_buffer(stream,

usr.sbin/unbound/services/listen_dnsport.c

5338

doq_stream_write_is_done(struct doq_conn* conn, struct doq_stream* stream)

usr.sbin/unbound/services/listen_dnsport.c

5341

doq_stream_off_write_list(conn, stream);

usr.sbin/unbound/services/listen_dnsport.c

5348

struct doq_stream* stream = conn->stream_write_first;

usr.sbin/unbound/services/listen_dnsport.c

5363

if(stream) {

usr.sbin/unbound/services/listen_dnsport.c

5366

(int)stream->stream_id);

usr.sbin/unbound/services/listen_dnsport.c

5367

stream_id = stream->stream_id;

usr.sbin/unbound/services/listen_dnsport.c

5369

if(stream->nwrite < 2) {

usr.sbin/unbound/services/listen_dnsport.c

5370

datav[0].base = ((uint8_t*)&stream->

usr.sbin/unbound/services/listen_dnsport.c

5371

outlen_wire) + stream->nwrite;

usr.sbin/unbound/services/listen_dnsport.c

5372

datav[0].len = 2 - stream->nwrite;

usr.sbin/unbound/services/listen_dnsport.c

5373

datav[1].base = stream->out;

usr.sbin/unbound/services/listen_dnsport.c

5374

datav[1].len = stream->outlen;

usr.sbin/unbound/services/listen_dnsport.c

5377

datav[0].base = stream->out +

usr.sbin/unbound/services/listen_dnsport.c

5378

(stream->nwrite-2);

usr.sbin/unbound/services/listen_dnsport.c

5379

datav[0].len = stream->outlen -

usr.sbin/unbound/services/listen_dnsport.c

5380

(stream->nwrite-2);

usr.sbin/unbound/services/listen_dnsport.c

5394

if(stream && stream->write_next)

usr.sbin/unbound/services/listen_dnsport.c

5407

if(stream) {

usr.sbin/unbound/services/listen_dnsport.c

5409

stream->nwrite += ndatalen;

usr.sbin/unbound/services/listen_dnsport.c

5410

if(stream->nwrite >= stream->outlen+2)

usr.sbin/unbound/services/listen_dnsport.c

5412

conn, stream);

usr.sbin/unbound/services/listen_dnsport.c

5413

stream = stream->write_next;

usr.sbin/unbound/services/listen_dnsport.c

5467

if(ndatalen >= 0 && stream) {

usr.sbin/unbound/services/listen_dnsport.c

5468

stream->nwrite += ndatalen;

usr.sbin/unbound/services/listen_dnsport.c

5469

if(stream->nwrite >= stream->outlen+2)

usr.sbin/unbound/services/listen_dnsport.c

5470

doq_stream_write_is_done(conn, stream);

usr.sbin/unbound/services/listen_dnsport.c

5486

if(stream)

usr.sbin/unbound/services/listen_dnsport.c

5487

stream = stream->write_next;

usr.sbin/unbound/services/listen_dnsport.h

777

void doq_stream_delete(struct doq_stream* stream);

usr.sbin/unbound/services/listen_dnsport.h

788

int doq_stream_close(struct doq_conn* conn, struct doq_stream* stream,

usr.sbin/unbound/services/listen_dnsport.h

792

int doq_stream_send_reply(struct doq_conn* conn, struct doq_stream* stream,

usr.sbin/unbound/util/netevent.c

2825

struct doq_conn** conn, struct doq_stream** stream)

usr.sbin/unbound/util/netevent.c

2841

*stream = NULL;

usr.sbin/unbound/util/netevent.c

2844

*stream = doq_stream_find(*conn, repinfo->doq_streamid);

usr.sbin/unbound/util/netevent.c

2845

if(!*stream) {

usr.sbin/unbound/util/netevent.c

2853

if((*stream)->is_closed) {

usr.sbin/unbound/util/netevent.c

2870

struct doq_stream* stream;

usr.sbin/unbound/util/netevent.c

2872

if(!doq_lookup_conn_stream(repinfo, repinfo->c, &conn, &stream)) {

usr.sbin/unbound/util/netevent.c

2879

if(!doq_stream_send_reply(conn, stream, repinfo->c->buffer))

usr.sbin/unbound/util/netevent.c

2880

doq_stream_close(conn, stream, 1);

usr.sbin/unbound/util/netevent.c

2901

struct doq_stream* stream;

usr.sbin/unbound/util/netevent.c

2903

if(!doq_lookup_conn_stream(repinfo, repinfo->c, &conn, &stream)) {

usr.sbin/unbound/util/netevent.c

2909

doq_stream_close(conn, stream, 1);

usr.sbin/unbound/util/netevent.c

928

int stream) {

usr.sbin/unbound/util/netevent.c

982

if(!stream) {

usr.sbin/unbound/util/proxy_protocol.c

112

(stream?PP2_PROT_STREAM:PP2_PROT_DGRAM);

usr.sbin/unbound/util/proxy_protocol.c

136

(stream?PP2_PROT_STREAM:PP2_PROT_DGRAM);

usr.sbin/unbound/util/proxy_protocol.c

92

int stream)

usr.sbin/unbound/util/proxy_protocol.h

165

int stream);

usr.sbin/vmd/parse.y

1156

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/vmd/parse.y

1166

fclose(nfile->stream);

usr.sbin/vmd/parse.y

1184

fclose(file->stream);

usr.sbin/vmd/parse.y

56

FILE *stream;

usr.sbin/vmd/parse.y

888

c = getc(file->stream);

usr.sbin/vmd/parse.y

928

c = getc(file->stream);

usr.sbin/vmd/parse.y

930

ungetc(c, file->stream);

usr.sbin/ypldap/parse.y

59

FILE *stream;

usr.sbin/ypldap/parse.y

596

c = getc(file->stream);

usr.sbin/ypldap/parse.y

876

if ((nfile->stream = fopen(nfile->name, "r")) == NULL) {

usr.sbin/ypldap/parse.y

882

check_file_secrecy(fileno(nfile->stream), nfile->name)) {

usr.sbin/ypldap/parse.y

883

fclose(nfile->stream);

usr.sbin/ypldap/parse.y

893

fclose(nfile->stream);

usr.sbin/ypldap/parse.y

911

fclose(file->stream);