sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

4018

if (!smu->ppt_funcs->stb_collect_info || !smu->stb_context.enabled)

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

4022

if (size != smu->stb_context.stb_buf_size)

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

4042

buf = kvmalloc_array(smu->stb_context.stb_buf_size, sizeof(*buf), GFP_KERNEL);

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

4046

r = smu_stb_collect_info(smu, buf, smu->stb_context.stb_buf_size);

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

4072

smu->stb_context.stb_buf_size);

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

4106

if (!smu || (!smu->stb_context.stb_buf_size))

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

4114

smu->stb_context.stb_buf_size);

sys/dev/pci/drm/amd/pm/swsmu/inc/amdgpu_smu.h

633

struct stb_context stb_context;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2990

smu->stb_context.enabled = REG_GET_FIELD(reg, MP1_PMI_3_START, ENABLE);

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2993

if (!smu->stb_context.enabled)

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2996

mtx_init(&smu->stb_context.lock, IPL_NONE);

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

3000

smu->stb_context.stb_buf_size = 1 << REG_GET_FIELD(reg, MP1_PMI_3_FIFO, DEPTH);

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

3001

smu->stb_context.stb_buf_size *= SIENNA_CICHLID_STB_DEPTH_UNIT_BYTES;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

3004

smu->stb_context.stb_buf_size / SIENNA_CICHLID_STB_DEPTH_UNIT_BYTES);

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

3068

spin_lock(&smu->stb_context.lock);

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

3078

spin_unlock(&smu->stb_context.lock);