bin/ksh/lex.c

138

Lex_state states[STATE_BSIZE], *statep;

bin/ksh/lex.c

148

states[0].ls_state = SINVALID;

bin/ksh/lex.c

149

states[0].ls_info.base = NULL;

bin/ksh/lex.c

150

statep = &states[1];

bin/ksh/lex.c

151

state_info.base = states;

bin/ksh/lex.c

152

state_info.end = &states[STATE_BSIZE];

bin/ksh/lex.c

721

if (statep != &states[1])

lib/libc/regex/engine.c

109

static void print(struct match *, const char *, states, int, FILE *);

lib/libc/regex/engine.c

677

states st = m->st;

lib/libc/regex/engine.c

678

states fresh = m->fresh;

lib/libc/regex/engine.c

679

states tmp = m->tmp;

lib/libc/regex/engine.c

766

states st = m->st;

lib/libc/regex/engine.c

767

states empty = m->empty;

lib/libc/regex/engine.c

768

states tmp = m->tmp;

lib/libc/regex/engine.c

81

states st; /* current states */

lib/libc/regex/engine.c

82

states fresh; /* states for a fresh start */

lib/libc/regex/engine.c

83

states tmp; /* temporary */

lib/libc/regex/engine.c

84

states empty; /* empty set of states */

lib/libc/regex/engine.c

847

static states

lib/libc/regex/engine.c

851

states bef, /* states reachable before */

lib/libc/regex/engine.c

853

states aft) /* states already known reachable after */

lib/libc/regex/engine.c

96

static states step(struct re_guts *, sopno, sopno, states, int, states);

lib/libc/regex/engine.c

965

print(struct match *m, const char *caption, states st, int ch, FILE *d)

lib/libc/regex/regexec.c

57

#define states1 states /* for later use in regexec() decision */

libexec/snmpd/snmpd_metrics/mib.c

1365

agentx_varbind_unsigned32(vb, s.states);

regress/lib/libcrypto/mlkem/mlkem_tests.c

158

.states = decap_state_machine,

regress/lib/libcrypto/mlkem/mlkem_tests.c

262

.states = nist_decap_state_machine,

regress/lib/libcrypto/mlkem/mlkem_tests.c

420

.states = encap_state_machine,

regress/lib/libcrypto/mlkem/mlkem_tests.c

550

.states = keygen_state_machine,

regress/lib/libcrypto/mlkem/mlkem_tests.c

661

.states = nist_keygen_state_machine,

regress/lib/libcrypto/mlkem/parse_test_file.c

238

return p->tctx->states;

regress/lib/libcrypto/mlkem/parse_test_file.h

47

const struct line_spec *states;

sbin/ipsecctl/pfkdump.c

220

struct idname states[] = {

sbin/ipsecctl/pfkdump.c

309

lookup_name(states, sa->sadb_sa_state),

sbin/pfctl/pf_print_state.c

299

const char *states[] = PFUDPS_NAMES;

sbin/pfctl/pf_print_state.c

301

printf(" %s:%s\n", states[src->state], states[dst->state]);

sbin/pfctl/pf_print_state.c

305

const char *states[] = PFOTHERS_NAMES;

sbin/pfctl/pf_print_state.c

307

printf(" %s:%s\n", states[src->state], states[dst->state]);

sbin/pfctl/pfctl_parser.c

596

printf(" %-25s %14u %14s\n", "current entries", s->states, "");

sbin/pfctl/pfctl_parser.c

693

printf(" ( states %u, connections %u, rate %u.%u/%us )\n", sn->states,

sbin/pfctl/pfctl_parser.c

702

if (sn->states == 0) {

sys/arch/arm64/arm64/cpu.c

2479

uint32_t *states;

sys/arch/arm64/arm64/cpu.c

2494

states = malloc(len, M_TEMP, M_WAITOK);

sys/arch/arm64/arm64/cpu.c

2495

OF_getpropintarray(ci->ci_node, "cpu-idle-states", states, len);

sys/arch/arm64/arm64/cpu.c

2496

node = OF_getnodebyphandle(states[0]);

sys/arch/arm64/arm64/cpu.c

2497

free(states, M_TEMP, len);

sys/arch/arm64/arm64/cpu.c

2582

states = malloc(len, M_TEMP, M_WAITOK);

sys/arch/arm64/arm64/cpu.c

2583

OF_getpropintarray(node, "domain-idle-states", states, len);

sys/arch/arm64/arm64/cpu.c

2585

node = OF_getnodebyphandle(states[len / sizeof(uint32_t) - 1]);

sys/arch/arm64/arm64/cpu.c

2586

free(states, M_TEMP, len);

sys/arch/arm64/arm64/cpu.c

2614

states = malloc(len, M_TEMP, M_WAITOK);

sys/arch/arm64/arm64/cpu.c

2615

OF_getpropintarray(node, "domain-idle-states", states, len);

sys/arch/arm64/arm64/cpu.c

2617

node = OF_getnodebyphandle(states[len / sizeof(uint32_t) - 1]);

sys/arch/arm64/arm64/cpu.c

2618

free(states, M_TEMP, len);

sys/arch/powerpc64/dev/opal.c

343

uint64_t *states;

sys/arch/powerpc64/dev/opal.c

353

slen = count * sizeof(states[0]);

sys/arch/powerpc64/dev/opal.c

356

states = malloc(slen, M_DEVBUF, M_WAITOK);

sys/arch/powerpc64/dev/opal.c

361

if (OF_getpropint64array(node, prop, states, slen) == slen) {

sys/arch/powerpc64/dev/opal.c

369

opal_found_stop_state(sc, states[i]);

sys/arch/powerpc64/dev/opal.c

376

free(states, M_DEVBUF, slen);

sys/dev/ofw/ofw_regulator.c

372

uint32_t *gpio, *gpios, *states;

sys/dev/ofw/ofw_regulator.c

387

states = malloc(slen, M_TEMP, M_WAITOK);

sys/dev/ofw/ofw_regulator.c

390

OF_getpropintarray(node, "states", states, slen);

sys/dev/ofw/ofw_regulator.c

404

if (states[2 * i + 1] == idx) {

sys/dev/ofw/ofw_regulator.c

405

value = states[2 * i];

sys/dev/ofw/ofw_regulator.c

413

free(states, M_TEMP, slen);

sys/dev/ofw/ofw_regulator.c

422

uint32_t *gpio, *gpios, *states;

sys/dev/ofw/ofw_regulator.c

452

states = malloc(slen, M_TEMP, M_WAITOK);

sys/dev/ofw/ofw_regulator.c

455

OF_getpropintarray(node, "states", states, slen);

sys/dev/ofw/ofw_regulator.c

459

if (states[2 * i] < min || states[2 * i] > max)

sys/dev/ofw/ofw_regulator.c

461

if (states[2 * i] == value) {

sys/dev/ofw/ofw_regulator.c

462

idx = states[2 * i + 1];

sys/dev/ofw/ofw_regulator.c

482

free(states, M_TEMP, slen);

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10037

const struct soc_states_st *states,

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10040

dml_print("DML::%s: state_idx=%u (num_states=%u)\n", __func__, state_idx, states->num_states);

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10042

if (state_idx >= (dml_uint_t)states->num_states) {

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10043

dml_print("DML::%s: ERROR: Invalid state_idx=%u! num_states=%u\n", __func__, state_idx, states->num_states);

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10046

return (states->state_array[state_idx]);

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10056

mode_lib->ms.max_state_idx = mode_lib->states.num_states - 1;

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10060

mode_lib->ms.state = dml_get_soc_state_bounding_box(&mode_lib->states, state_idx);

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10061

mode_lib->ms.max_state = dml_get_soc_state_bounding_box(&mode_lib->states, mode_lib->states.num_states - 1);

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10170

if (end_state_idx >= mode_lib->states.num_states) // idx is 0-based

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

10193

in_out_params->mode_lib->states.num_states - 1);

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core_structs.h

1907

struct soc_states_st states;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

364

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx->v20.dml_core_ctx.states.state_array[in_ctx->v20.scratch.mode_support_params.out_lowest_state_idx].dppclk_mhz

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

366

context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = in_ctx->v20.dml_core_ctx.states.state_array[in_ctx->v20.scratch.mode_support_params.out_lowest_state_idx].dispclk_mhz

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

104

s->mode_support_params.in_start_state_idx = dml2->v20.dml_core_ctx.states.num_states - 1;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

191

for (i = 0; i < dml2->v20.dml_core_ctx.states.num_states; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

192

s->uclk_change_latencies[i] = dml2->v20.dml_core_ctx.states.state_array[i].dram_clock_change_latency_us;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

196

for (j = 0; j < dml2->v20.dml_core_ctx.states.num_states; j++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

197

dml2->v20.dml_core_ctx.states.state_array[j].dram_clock_change_latency_us = s_global->dummy_pstate_table[i].dummy_pstate_latency_us;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

214

while (dml2->v20.dml_core_ctx.states.state_array[result].dram_speed_mts < s_global->dummy_pstate_table[i].dram_speed_mts)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

221

for (i = 0; i < dml2->v20.dml_core_ctx.states.num_states; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

222

dml2->v20.dml_core_ctx.states.state_array[i].dram_clock_change_latency_us = s->uclk_change_latencies[i];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

413

out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dcfclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

414

out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabricclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

415

out_clks.uclk_mts = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dram_speed_mts;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

416

out_clks.phyclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].phyclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

417

out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].socclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

418

out_clks.ref_dtbclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dtbclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

466

(lowest_state_idx < dml2->v20.dml_core_ctx.states.num_states - 1)) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

467

lowest_state_idx = dml2->v20.dml_core_ctx.states.num_states - 1;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

468

out_clks.dispclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dispclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

471

out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dcfclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

472

out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabricclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

473

out_clks.uclk_mts = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dram_speed_mts;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

474

out_clks.phyclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].phyclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

475

out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].socclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

476

out_clks.ref_dtbclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dtbclk_mhz * 1000;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

621

initialize_dml2_soc_states(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc, &(*dml2)->v20.dml_core_ctx.states);

sys/dev/pci/drm/amd/include/kgd_pp_interface.h

224

uint32_t states[16];

sys/dev/pci/drm/amd/include/pptable.h

483

ATOM_PPLIB_STATE_V2 states[] /* __counted_by(ucNumEntries) */;

sys/dev/pci/drm/amd/pm/amdgpu_dpm.c

1151

struct pp_states_info *states)

sys/dev/pci/drm/amd/pm/amdgpu_dpm.c

1161

states);

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1712

enum amdgpu_device_attr_states *states)

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1715

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1896

uint32_t mask, enum amdgpu_device_attr_states *states)

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1899

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1905

uint32_t mask, enum amdgpu_device_attr_states *states)

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1910

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1913

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1916

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1922

uint32_t mask, enum amdgpu_device_attr_states *states)

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1926

*states = ATTR_STATE_SUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1929

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1938

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1943

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1949

uint32_t mask, enum amdgpu_device_attr_states *states)

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1954

*states = ATTR_STATE_SUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1957

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1966

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1981

uint32_t mask, enum amdgpu_device_attr_states *states)

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1988

*states = ATTR_STATE_SUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1991

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

1997

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2000

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2017

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2023

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2040

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2046

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2052

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2557

uint32_t mask, enum amdgpu_device_attr_states *states)

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2564

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2572

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2590

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2595

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2612

*states = ATTR_STATE_SUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2615

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2621

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2624

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2627

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2630

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2633

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2636

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2642

*states = ATTR_STATE_UNSUPPORTED;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

2672

uint32_t mask, enum amdgpu_device_attr_states *states) = default_attr_update;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

433

(data.states[i] == POWER_STATE_TYPE_INTERNAL_BOOT) ? "boot" :

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

434

(data.states[i] == POWER_STATE_TYPE_BATTERY) ? "battery" :

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

435

(data.states[i] == POWER_STATE_TYPE_BALANCED) ? "balanced" :

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

436

(data.states[i] == POWER_STATE_TYPE_PERFORMANCE) ? "performance" : "default");

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

465

if (pm == data.states[i])

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

506

if (ret || idx >= ARRAY_SIZE(data.states))

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

509

idx = array_index_nospec(idx, ARRAY_SIZE(data.states));

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

519

state = data.states[idx];

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

486

struct pp_states_info *states);

sys/dev/pci/drm/amd/pm/inc/amdgpu_pm.h

89

uint32_t mask, enum amdgpu_device_attr_states *states);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2732

power_state_offset = (u8 *)state_array->states;

sys/dev/pci/drm/amd/pm/legacy-dpm/legacy_dpm.c

390

ATOM_PPLIB_VCE_State_Table *states =

sys/dev/pci/drm/amd/pm/legacy-dpm/legacy_dpm.c

408

state_entry = &states->entries[0];

sys/dev/pci/drm/amd/pm/legacy-dpm/legacy_dpm.c

423

states->numEntries > AMD_MAX_VCE_LEVELS ?

sys/dev/pci/drm/amd/pm/legacy-dpm/legacy_dpm.c

424

AMD_MAX_VCE_LEVELS : states->numEntries;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7349

power_state_offset = (u8 *)state_array->states;

sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c

615

data->states[i] = POWER_STATE_TYPE_BATTERY;

sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c

618

data->states[i] = POWER_STATE_TYPE_BALANCED;

sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c

621

data->states[i] = POWER_STATE_TYPE_PERFORMANCE;

sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c

625

data->states[i] = POWER_STATE_TYPE_INTERNAL_BOOT;

sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c

627

data->states[i] = POWER_STATE_TYPE_DEFAULT;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c

63

struct phm_set_power_state_input states;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c

67

states.pcurrent_state = pcurrent_state;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c

68

states.pnew_state = pnew_power_state;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c

71

return hwmgr->hwmgr_func->power_state_set(hwmgr, &states);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/processpptables.c

779

pstate = pstate_arrays->states;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4085

const struct phm_set_power_state_input *states =

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4088

cast_const_phw_smu7_power_state(states->pnew_state);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4165

const struct phm_set_power_state_input *states =

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4169

cast_const_phw_smu7_power_state(states->pnew_state);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4171

cast_const_phw_smu7_power_state(states->pcurrent_state);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4346

const struct phm_set_power_state_input *states =

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4350

cast_const_phw_smu7_power_state(states->pnew_state);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4410

const struct phm_set_power_state_input *states =

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4414

cast_const_phw_smu7_power_state(states->pnew_state);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

871

const struct phm_set_power_state_input *states = (struct phm_set_power_state_input *)input;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

872

const struct smu8_power_state *pnew_state = cast_const_smu8_power_state(states->pnew_state);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3435

const struct phm_set_power_state_input *states =

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3438

cast_const_phw_vega10_power_state(states->pnew_state);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3751

const struct phm_set_power_state_input *states =

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3754

cast_const_phw_vega10_power_state(states->pnew_state);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_pptable.h

132

ATOM_Vega10_State states[]; /* Dynamically allocate entries. */

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

1325

state_entry = &(state_arrays->states[entry_index]);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c

382

state_entry = &(state_arrays->states[entry_index]);

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

584

state_info->states[0] = POWER_STATE_TYPE_DEFAULT;

sys/dev/pci/drm/drm_blend.c

454

struct drm_plane_state **states;

sys/dev/pci/drm/drm_blend.c

462

states = kmalloc_array(total_planes, sizeof(*states), GFP_KERNEL);

sys/dev/pci/drm/drm_blend.c

463

if (!states)

sys/dev/pci/drm/drm_blend.c

477

states[n++] = plane_state;

sys/dev/pci/drm/drm_blend.c

482

sort(states, n, sizeof(*states), drm_atomic_state_zpos_cmp, NULL);

sys/dev/pci/drm/drm_blend.c

485

plane = states[i]->plane;

sys/dev/pci/drm/drm_blend.c

487

states[i]->normalized_zpos = i;

sys/dev/pci/drm/drm_blend.c

494

kfree(states);

sys/dev/pci/drm/i915/display/intel_display_power.c

266

static const u32 states[] = {

sys/dev/pci/drm/i915/display/intel_display_power.c

274

for (i = 0; i < ARRAY_SIZE(states) - 1; i++) {

sys/dev/pci/drm/i915/display/intel_display_power.c

275

if (target_dc_state != states[i])

sys/dev/pci/drm/i915/display/intel_display_power.c

281

target_dc_state = states[i + 1];

sys/dev/pci/drm/radeon/ci_dpm.c

5525

power_state_offset = (u8 *)state_array->states;

sys/dev/pci/drm/radeon/kv_dpm.c

2465

power_state_offset = (u8 *)state_array->states;

sys/dev/pci/drm/radeon/pptable.h

442

ATOM_PPLIB_STATE_V2 states[] /* __counted_by(ucNumEntries) */;

sys/dev/pci/drm/radeon/r600_dpm.c

1080

ATOM_PPLIB_VCE_State_Table *states =

sys/dev/pci/drm/radeon/r600_dpm.c

1100

state_entry = &states->entries[0];

sys/dev/pci/drm/radeon/r600_dpm.c

1114

for (i = 0; i < states->numEntries; i++) {

sys/dev/pci/drm/radeon/radeon_atombios.c

2710

power_state_offset = (u8 *)state_array->states;

sys/dev/pci/drm/radeon/si_dpm.c

6788

power_state_offset = (u8 *)state_array->states;

sys/dev/pci/drm/radeon/sumo_dpm.c

1487

power_state_offset = (u8 *)state_array->states;

sys/dev/pci/drm/radeon/trinity_dpm.c

1718

power_state_offset = (u8 *)state_array->states;

sys/dev/softraid.c

4375

int states[SR_MAX_STATES];

sys/dev/softraid.c

4386

states[i] = 0;

sys/dev/softraid.c

4395

states[s]++;

sys/dev/softraid.c

4398

if (states[BIOC_SDONLINE] == nd)

sys/dev/softraid_raid1.c

196

int states[SR_MAX_STATES];

sys/dev/softraid_raid1.c

213

states[i] = 0;

sys/dev/softraid_raid1.c

222

states[s]++;

sys/dev/softraid_raid1.c

225

if (states[BIOC_SDONLINE] == nd)

sys/dev/softraid_raid1.c

227

else if (states[BIOC_SDONLINE] == 0)

sys/dev/softraid_raid1.c

229

else if (states[BIOC_SDSCRUB] != 0)

sys/dev/softraid_raid1.c

231

else if (states[BIOC_SDREBUILD] != 0)

sys/dev/softraid_raid1.c

233

else if (states[BIOC_SDOFFLINE] != 0)

sys/dev/softraid_raid5.c

224

int states[SR_MAX_STATES];

sys/dev/softraid_raid5.c

234

states[i] = 0;

sys/dev/softraid_raid5.c

243

states[s]++;

sys/dev/softraid_raid5.c

246

if (states[BIOC_SDONLINE] == nd)

sys/dev/softraid_raid5.c

248

else if (states[BIOC_SDONLINE] < nd - 1)

sys/dev/softraid_raid5.c

250

else if (states[BIOC_SDSCRUB] != 0)

sys/dev/softraid_raid5.c

252

else if (states[BIOC_SDREBUILD] != 0)

sys/dev/softraid_raid5.c

254

else if (states[BIOC_SDONLINE] == nd - 1)

sys/dev/softraid_raid6.c

240

int states[SR_MAX_STATES];

sys/dev/softraid_raid6.c

252

states[i] = 0;

sys/dev/softraid_raid6.c

261

states[s]++;

sys/dev/softraid_raid6.c

264

if (states[BIOC_SDONLINE] == nd)

sys/dev/softraid_raid6.c

266

else if (states[BIOC_SDONLINE] < nd - 2)

sys/dev/softraid_raid6.c

268

else if (states[BIOC_SDSCRUB] != 0)

sys/dev/softraid_raid6.c

270

else if (states[BIOC_SDREBUILD] != 0)

sys/dev/softraid_raid6.c

272

else if (states[BIOC_SDONLINE] < nd)

sys/dev/usb/umass.c

1038

states[sc->transfer_state], xfer, usbd_errstr(err)));

sys/dev/usb/umass.c

1467

states[sc->transfer_state], xfer, usbd_errstr(err)));

sys/dev/usb/umass.c

147

char *states[TSTATE_STATES+1] = {

sys/net/pf.c

1347

pf_status.states++;

sys/net/pf.c

1907

unsigned int limit = pf_status.states;

sys/net/pf.c

1988

u_int32_t states;

sys/net/pf.c

2018

states = st->rule.ptr->states_cur;

sys/net/pf.c

2022

states = pf_status.states;

sys/net/pf.c

2024

if (end && states > start && start < end) {

sys/net/pf.c

2025

if (states >= end)

sys/net/pf.c

2028

timeout = (u_int64_t)timeout * (end - states) / (end - start);

sys/net/pf.c

2042

if (cur->states == 0 && cur->expire <= getuptime()) {

sys/net/pf.c

2058

if (--sni->sn->states == 0) {

sys/net/pf.c

2255

pf_status.states--;

sys/net/pf.c

5275

sni->sn->states++;

sys/net/pf.c

908

(*sn)->states >= rule->max_src_states) {

sys/net/pf.c

919

if (sn->states > 0 || sn->expire > getuptime())

sys/net/pf.c

958

sn->states--;

sys/net/pf_ioctl.c

1937

nr = pf_status.states;

sys/net/pf_ioctl.c

3845

if (sn->states != 0) {

sys/net/pf_lb.c

298

if (sns[type]->states != 0) {

sys/net/pf_lb.c

353

u_int64_t states;

sys/net/pf_lb.c

564

states = rpool->states;

sys/net/pf_lb.c

572

load = ((UINT16_MAX * rpool->states) / rpool->weight);

sys/net/pf_lb.c

574

load = states;

sys/net/pf_lb.c

600

cload = ((UINT16_MAX * rpool->states)

sys/net/pf_lb.c

603

cload = rpool->states;

sys/net/pf_lb.c

607

states = rpool->states;

sys/net/pf_lb.c

618

(states > 0));

sys/net/pf_lb.c

643

addlog(" with state count %llu", states);

sys/net/pf_table.c

1372

ad->pfra_states = ke->pfrke_counters->states;

sys/net/pf_table.c

2714

rpool->states = 0;

sys/net/pf_table.c

2716

rpool->states = ke->pfrke_counters->states;

sys/net/pf_table.c

2754

rpool->states = 0;

sys/net/pf_table.c

2756

rpool->states = ke->pfrke_counters->states;

sys/net/pf_table.c

2825

ke->pfrke_counters->states++;

sys/net/pf_table.c

2826

return ke->pfrke_counters->states;

sys/net/pf_table.c

2845

if (ke->pfrke_counters->states > 0)

sys/net/pf_table.c

2846

ke->pfrke_counters->states--;

sys/net/pf_table.c

2851

return ke->pfrke_counters->states;

sys/net/pfvar.h

1231

u_int32_t states;

sys/net/pfvar.h

348

u_int64_t states;

sys/net/pfvar.h

660

u_int32_t states;

sys/net/pfvar.h

939

u_int64_t states;

usr.bin/systat/cpu.c

254

int64_t *states;

usr.bin/systat/cpu.c

261

states = cpu_states + (CPUSTATES * c);

usr.bin/systat/cpu.c

264

value[i] = *states++;

usr.bin/systat/pf.c

279

ADD_LINE_V("state", "Count", s->states);

usr.bin/systat/pftop.c

1741

alloc_buf(status.states);

usr.bin/systat/pftop.c

808

const char *states[] = PFUDPS_NAMES;

usr.bin/systat/pftop.c

809

tbprintf("%s:%s", states[s1], states[s2]);

usr.bin/systat/pftop.c

813

const char *states[] = PFOTHERS_NAMES;

usr.bin/systat/pftop.c

814

tbprintf("%s:%s", states[s1], states[s2]);

usr.bin/top/display.c

296

i_procstates(int total, int *states, int threads)

usr.bin/top/display.c

309

states, procstate_names);

usr.bin/top/display.c

376

int64_t *states;

usr.bin/top/display.c

391

states = ostates + (CPUSTATES * cpu);

usr.bin/top/display.c

396

values[i++] += *states++;

usr.bin/top/display.c

429

states = ostates + (CPUSTATES * cpu);

usr.bin/top/display.c

439

value = *states++;

usr.bin/yacc/lalr.c

357

short *shortp, *edge, *states;

usr.bin/yacc/lalr.c

362

states = NEW2(maxrhs + 1, short);

usr.bin/yacc/lalr.c

371

states[0] = state1;

usr.bin/yacc/lalr.c

385

states[length++] = stateno;

usr.bin/yacc/lalr.c

396

stateno = states[--length];

usr.bin/yacc/lalr.c

422

free(states);

usr.sbin/bgpctl/ometric.c

139

ometric_new_state(const char * const *states, size_t statecnt, const char *name,

usr.sbin/bgpctl/ometric.c

152

om->stateset = states;

usr.sbin/ifstated/ifstated.c

507

TAILQ_FOREACH(state, &conf->states, entries) {

usr.sbin/ifstated/ifstated.c

662

TAILQ_FOREACH(state, &conf->states, entries) {

usr.sbin/ifstated/ifstated.c

679

while ((state = TAILQ_FIRST(&oconf->states)) != NULL) {

usr.sbin/ifstated/ifstated.c

680

TAILQ_REMOVE(&oconf->states, state, entries);

usr.sbin/ifstated/ifstated.h

119

struct ifsd_state_list states;

usr.sbin/ifstated/parse.y

330

TAILQ_FOREACH(state, &conf->states, entries)

usr.sbin/ifstated/parse.y

343

TAILQ_INSERT_TAIL(&conf->states, curstate, entries);

usr.sbin/ifstated/parse.y

745

TAILQ_INIT(&conf->states);

usr.sbin/ifstated/parse.y

754

TAILQ_FOREACH(state, &conf->states, entries) {

usr.sbin/ifstated/parse.y

763

TAILQ_FOREACH(state, &conf->states, entries) {

usr.sbin/ifstated/parse.y

772

conf->curstate = TAILQ_FIRST(&conf->states);

usr.sbin/ifstated/parse.y

809

TAILQ_FOREACH(state, &conf->states, entries) {

usr.sbin/lpd/io.c

102

static const char *states[] = {

usr.sbin/lpd/io.c

137

io, states[io->state], io->sock, io->timeout,

usr.sbin/rpki-client/ometric.c

139

ometric_new_state(const char * const *states, size_t statecnt, const char *name,

usr.sbin/rpki-client/ometric.c

152

om->stateset = states;

usr.sbin/rpki-client/rrdp.c

205

TAILQ_INSERT_TAIL(&states, s, entry);

usr.sbin/rpki-client/rrdp.c

214

TAILQ_REMOVE(&states, s, entry);

usr.sbin/rpki-client/rrdp.c

238

TAILQ_FOREACH(s, &states, entry)

usr.sbin/rpki-client/rrdp.c

553

TAILQ_FOREACH(s, &states, entry) {

usr.sbin/rpki-client/rrdp.c

621

TAILQ_FOREACH_SAFE(s, &states, entry, ns) {

usr.sbin/rpki-client/rrdp.c

76

static TAILQ_HEAD(, rrdp) states = TAILQ_HEAD_INITIALIZER(states);

usr.sbin/rpki-client/rsync.c

198

TAILQ_INSERT_TAIL(&states, s, entry);

usr.sbin/rpki-client/rsync.c

204

TAILQ_REMOVE(&states, s, entry);

usr.sbin/rpki-client/rsync.c

320

TAILQ_FOREACH(s, &states, entry) {

usr.sbin/rpki-client/rsync.c

346

TAILQ_FOREACH(s, &states, entry)

usr.sbin/rpki-client/rsync.c

406

TAILQ_FOREACH(s, &states, entry)

usr.sbin/rpki-client/rsync.c

421

TAILQ_FOREACH_SAFE(s, &states, entry, ns) {

usr.sbin/rpki-client/rsync.c

54

static TAILQ_HEAD(, rsync) states = TAILQ_HEAD_INITIALIZER(states);

usr.sbin/tcpdump/pf_print_state.c

267

const char *states[] = PFUDPS_NAMES;

usr.sbin/tcpdump/pf_print_state.c

269

printf(" %s:%s", states[src->state], states[dst->state]);

usr.sbin/tcpdump/pf_print_state.c

273

const char *states[] = PFOTHERS_NAMES;

usr.sbin/tcpdump/pf_print_state.c

275

printf(" %s:%s", states[src->state], states[dst->state]);

usr.sbin/tcpdump/print-hsrp.c

115

printf("state=%s ", tok2str(states, "Unknown (%d)", hp->hsrp_state));

usr.sbin/tcpdump/print-hsrp.c

54

static struct tok states[] = {