standard
static void standard(char *);
standard(word);
*((uint32_t *)data) = pstate_table->gfxclk_pstate.standard * 100;
*((uint32_t *)data) = pstate_table->uclk_pstate.standard * 100;
uint32_t standard;
pstate_table->gfxclk_pstate.standard =
pstate_table->uclk_pstate.standard =
pstate_table->socclk_pstate.standard =
pstate_table->gfxclk_pstate.standard =
pstate_table->uclk_pstate.standard =
pstate_table->socclk_pstate.standard =
pstate_table->gfxclk_pstate.standard =
pstate_table->uclk_pstate.standard =
pstate_table->socclk_pstate.standard =
pstate_table->gfxclk_pstate.standard =
pstate_table->uclk_pstate.standard =
pstate_table->socclk_pstate.standard =
pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK;
pstate_table->uclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK;
pstate_table->socclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK;
pstate_table->gfxclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_GFXCLK;
pstate_table->uclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_MEMCLK;
pstate_table->socclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_SOCCLK;
pstate_table->gfxclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_GFXCLK;
pstate_table->uclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_MEMCLK;
pstate_table->socclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_SOCCLK;
sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard;
mclk_min = mclk_max = pstate_table->uclk_pstate.standard;
socclk_min = socclk_max = pstate_table->socclk_pstate.standard;
pstate_table->gfxclk_pstate.standard =
pstate_table->uclk_pstate.standard =
pstate_table->socclk_pstate.standard =
pstate_table->gfxclk_pstate.standard =
pstate_table->uclk_pstate.standard =
pstate_table->socclk_pstate.standard =
sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard;
mclk_min = mclk_max = pstate_table->uclk_pstate.standard;
socclk_min = socclk_max = pstate_table->socclk_pstate.standard;
vclk_min = vclk_max = pstate_table->vclk_pstate.standard;
dclk_min = dclk_max = pstate_table->dclk_pstate.standard;
fclk_min = fclk_max = pstate_table->fclk_pstate.standard;
pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc;
pstate_table->gfxclk_pstate.standard = gfx_table->max;
pstate_table->uclk_pstate.standard = mem_table->max;
pstate_table->socclk_pstate.standard = soc_table->min;
pstate_table->vclk_pstate.standard = vclk_table->min;
pstate_table->dclk_pstate.standard = dclk_table->min;
pstate_table->fclk_pstate.standard = fclk_table->min;
pstate_table->gfxclk_pstate.standard =
pstate_table->uclk_pstate.standard =
pstate_table->socclk_pstate.standard =
pstate_table->gfxclk_pstate.standard =
pstate_table->uclk_pstate.standard =
pstate_table->socclk_pstate.standard =
pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc;
pstate_table->gfxclk_pstate.standard = gfx_table->max;
pstate_table->uclk_pstate.standard = mem_table->max;
pstate_table->socclk_pstate.standard = soc_table->min;
pstate_table->vclk_pstate.standard = vclk_table->min;
pstate_table->dclk_pstate.standard = dclk_table->min;
pstate_table->fclk_pstate.standard = fclk_table->min;
sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard;
mclk_min = mclk_max = pstate_table->uclk_pstate.standard;
socclk_min = socclk_max = pstate_table->socclk_pstate.standard;
vclk_min = vclk_max = pstate_table->vclk_pstate.standard;
dclk_min = dclk_max = pstate_table->dclk_pstate.standard;
fclk_min = fclk_max = pstate_table->fclk_pstate.standard;
pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc;
pstate_table->gfxclk_pstate.standard = gfx_table->max;
pstate_table->uclk_pstate.standard = mem_table->max;
pstate_table->socclk_pstate.standard = soc_table->min;
pstate_table->vclk_pstate.standard = vclk_table->min;
pstate_table->dclk_pstate.standard = dclk_table->min;
pstate_table->fclk_pstate.standard = fclk_table->min;
enum radeon_tv_std standard;