smmu_v3_write_4

sys/arch/arm64/dev/smmu.c

119

void smmu_v3_write_4(struct smmu_softc *, bus_size_t, uint32_t);

sys/arch/arm64/dev/smmu.c

1690

smmu_v3_write_4(sc, SMMU_V3_GBPA, reg | SMMU_V3_GBPA_UPDATE);

sys/arch/arm64/dev/smmu.c

1704

smmu_v3_write_4(sc, SMMU_V3_CR1,

sys/arch/arm64/dev/smmu.c

1711

smmu_v3_write_4(sc, SMMU_V3_CR2, SMMU_V3_CR2_PTM |

sys/arch/arm64/dev/smmu.c

1725

smmu_v3_write_4(sc, SMMU_V3_STRTAB_BASE_CFG,

sys/arch/arm64/dev/smmu.c

1743

smmu_v3_write_4(sc, SMMU_V3_STRTAB_BASE_CFG,

sys/arch/arm64/dev/smmu.c

1752

smmu_v3_write_4(sc, SMMU_V3_CMDQ_PROD, 0);

sys/arch/arm64/dev/smmu.c

1753

smmu_v3_write_4(sc, SMMU_V3_CMDQ_CONS, 0);

sys/arch/arm64/dev/smmu.c

1765

smmu_v3_write_4(sc, SMMU_V3_EVENTQ_PROD, 0);

sys/arch/arm64/dev/smmu.c

1766

smmu_v3_write_4(sc, SMMU_V3_EVENTQ_CONS, 0);

sys/arch/arm64/dev/smmu.c

1775

smmu_v3_write_4(sc, SMMU_V3_PRIQ_PROD, 0);

sys/arch/arm64/dev/smmu.c

1776

smmu_v3_write_4(sc, SMMU_V3_PRIQ_CONS, 0);

sys/arch/arm64/dev/smmu.c

1853

smmu_v3_write_4(sc, SMMU_V3_EVENTQ_CONS, sq->sq_cons);

sys/arch/arm64/dev/smmu.c

1864

smmu_v3_write_4(sc, SMMU_V3_EVENTQ_CONS, sq->sq_cons);

sys/arch/arm64/dev/smmu.c

1878

smmu_v3_write_4(sc, SMMU_V3_GERRORN, gerror);

sys/arch/arm64/dev/smmu.c

1934

smmu_v3_write_4(sc, SMMU_V3_PRIQ_CONS, sq->sq_cons);

sys/arch/arm64/dev/smmu.c

1945

smmu_v3_write_4(sc, SMMU_V3_PRIQ_CONS, sq->sq_cons);

sys/arch/arm64/dev/smmu.c

1981

smmu_v3_write_4(sc, off, val);