Symbol: smmu_v3_read_4
sys/arch/arm64/dev/smmu.c
118
uint32_t smmu_v3_read_4(struct smmu_softc *, bus_size_t);
sys/arch/arm64/dev/smmu.c
1593
reg = smmu_v3_read_4(sc, SMMU_V3_IDR0);
sys/arch/arm64/dev/smmu.c
1613
reg = smmu_v3_read_4(sc, SMMU_V3_IDR1);
sys/arch/arm64/dev/smmu.c
1621
reg = smmu_v3_read_4(sc, SMMU_V3_IDR5);
sys/arch/arm64/dev/smmu.c
1655
reg = smmu_v3_read_4(sc, SMMU_V3_IDR3);
sys/arch/arm64/dev/smmu.c
1687
if (smmu_v3_read_4(sc, SMMU_V3_CR0) & SMMU_V3_CR0_SMMUEN) {
sys/arch/arm64/dev/smmu.c
1688
reg = smmu_v3_read_4(sc, SMMU_V3_GBPA);
sys/arch/arm64/dev/smmu.c
1692
if (!(smmu_v3_read_4(sc, SMMU_V3_GBPA) & SMMU_V3_GBPA_UPDATE))
sys/arch/arm64/dev/smmu.c
1768
smmu_v3_read_4(sc, SMMU_V3_CR0) | SMMU_V3_CR0_EVENTQEN);
sys/arch/arm64/dev/smmu.c
1778
smmu_v3_read_4(sc, SMMU_V3_CR0) | SMMU_V3_CR0_PRIQEN);
sys/arch/arm64/dev/smmu.c
1792
smmu_v3_read_4(sc, SMMU_V3_CR0) | SMMU_V3_CR0_SMMUEN);
sys/arch/arm64/dev/smmu.c
1825
prod = smmu_v3_read_4(sc, SMMU_V3_EVENTQ_PROD);
sys/arch/arm64/dev/smmu.c
1876
gerror = smmu_v3_read_4(sc, SMMU_V3_GERROR);
sys/arch/arm64/dev/smmu.c
1877
gerrorn = smmu_v3_read_4(sc, SMMU_V3_GERRORN);
sys/arch/arm64/dev/smmu.c
1883
uint32_t cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
1904
prod = smmu_v3_read_4(sc, SMMU_V3_PRIQ_PROD);
sys/arch/arm64/dev/smmu.c
1984
if (smmu_v3_read_4(sc, ack_off) == val)
sys/arch/arm64/dev/smmu.c
2141
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
2171
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
2180
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
2198
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
2240
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
2283
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
2325
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
2367
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);
sys/arch/arm64/dev/smmu.c
2412
sq->sq_cons = smmu_v3_read_4(sc, SMMU_V3_CMDQ_CONS);