sys/arch/arm64/dev/smmu.c

291

smmu_cb_write_4(sc, sc->sc_num_context_banks - 1,

sys/arch/arm64/dev/smmu.c

336

smmu_cb_write_4(sc, i, SMMU_CB_SCTLR, 0);

sys/arch/arm64/dev/smmu.c

338

smmu_cb_write_4(sc, i, SMMU_CB_FSR, SMMU_CB_FSR_MASK);

sys/arch/arm64/dev/smmu.c

355

smmu_cb_write_4(sc, i, SMMU_CB_ACTLR, reg);

sys/arch/arm64/dev/smmu.c

425

smmu_cb_write_4(sc, cbi->cbi_idx, SMMU_CB_FSR, reg);

sys/arch/arm64/dev/smmu.c

452

smmu_cb_write_4(sc, dom->sd_cb_idx, SMMU_CB_TLBSYNC, ~0);

sys/arch/arm64/dev/smmu.c

71

void smmu_cb_write_4(struct smmu_softc *, int, bus_size_t, uint32_t);

sys/arch/arm64/dev/smmu.c

728

smmu_cb_write_4(sc, dom->sd_cb_idx, SMMU_CB_TCR2, reg);

sys/arch/arm64/dev/smmu.c

779

smmu_cb_write_4(sc, dom->sd_cb_idx, SMMU_CB_TCR, reg);

sys/arch/arm64/dev/smmu.c

805

smmu_cb_write_4(sc, dom->sd_cb_idx, SMMU_CB_MAIR0,

sys/arch/arm64/dev/smmu.c

810

smmu_cb_write_4(sc, dom->sd_cb_idx, SMMU_CB_MAIR1,

sys/arch/arm64/dev/smmu.c

818

smmu_cb_write_4(sc, dom->sd_cb_idx, SMMU_CB_SCTLR, reg);