sk_win_write_4
sk_win_write_4(sc, SK_Y2_PCI_REG(SK_PCI_OURREG3), 0);
sk_win_write_4(sc, SK_Y2_PCI_REG(SK_PCI_OURREG4), reg1);
sk_win_write_4(sc, SK_Y2_PCI_REG(SK_PCI_OURREG5), reg1);
sk_win_write_4(sc, SK_Y2_PCI_REG(SK_PCI_CFGREG1), 0);
sk_win_write_4(sc, SK_GPIO, reg1);
sk_win_write_4(sc, SK_Y2_PCI_REG(SK_PCI_OURREG1), reg1);
sk_win_write_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_RESET);
sk_win_write_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_UNRESET);
sk_win_write_4(sc, SK_STAT_BMU_ADDRLO,
sk_win_write_4(sc, SK_STAT_BMU_ADDRHI,
sk_win_write_4(sc, SK_Y2_LEV_ITIMERINIT, SK_IM_USECS(100));
sk_win_write_4(sc, SK_Y2_TX_ITIMERINIT, SK_IM_USECS(1000));
sk_win_write_4(sc, SK_Y2_ISR_ITIMERINIT, SK_IM_USECS(20));
sk_win_write_4(sc, SK_Y2_ISR_ITIMERINIT, SK_IM_USECS(4));
sk_win_write_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_ON);
sk_win_write_4(sc, SK_EP_ADDR, flashaddr);
sk_win_write_4(sc, SK_GPIO, val);
sk_win_write_4(sc, SK_GPIO, v);
sk_win_write_4(sc, SK_GPIO, v);
sk_win_write_4(sc, SK_GPIO, val);
sk_win_write_4(sc, SK_RAMCTL, SK_RAMCTL_UNRESET);
sk_win_write_4(sc, SK_IMTIMERINIT, SK_IM_USECS(100));
sk_win_write_4(sc, SK_IMMR, SK_ISR_TX1_S_EOF|SK_ISR_TX2_S_EOF|
sk_win_write_4(sc_if->sk_softc, \
sk_win_write_4(sc->sk_softc, SK_XMAC_REG(sc, reg), (val))
sk_win_write_4((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))