DBLR
case DBLR:
/*0*/ { "fadd", DBLR, op2(ST,STI), 0 },
/*1*/ { "fmul", DBLR, op2(ST,STI), 0 },
/*2*/ { "fcom", DBLR, 0, 0 },
/*3*/ { "fcomp", DBLR, 0, 0 },
/*4*/ { "fsub", DBLR, op2(ST,STI), "fsubr" },
/*5*/ { "fsubr", DBLR, op2(ST,STI), "fsub" },
/*6*/ { "fdiv", DBLR, op2(ST,STI), "fdivr" },
/*7*/ { "fdivr", DBLR, op2(ST,STI), "fdiv" },
/*0*/ { "fld", DBLR, op1(STI), "ffree" },
/*2*/ { "fst", DBLR, op1(STI), 0 },
/*3*/ { "fstp", DBLR, op1(STI), 0 },
case DBLR:
/*0*/ { "fadd", DBLR, op2(ST,STI), 0 },
/*1*/ { "fmul", DBLR, op2(ST,STI), 0 },
/*2*/ { "fcom", DBLR, 0, 0 },
/*3*/ { "fcomp", DBLR, 0, 0 },
/*4*/ { "fsub", DBLR, op2(ST,STI), "fsubr" },
/*5*/ { "fsubr", DBLR, op2(ST,STI), "fsub" },
/*6*/ { "fdiv", DBLR, op2(ST,STI), "fdivr" },
/*7*/ { "fdivr", DBLR, op2(ST,STI), "fdiv" },
/*0*/ { "fld", DBLR, op1(STI), "ffree" },
/*2*/ { "fst", DBLR, op1(STI), 0 },
/*3*/ { "fstp", DBLR, op1(STI), 0 },