sys/dev/ic/rtwn.c

1114

rtwn_read_4(sc, R92C_RCR) &

sys/dev/ic/rtwn.c

116

uint32_t rtwn_read_4(struct rtwn_softc *, uint16_t);

sys/dev/ic/rtwn.c

1169

rtwn_read_4(sc, R92C_RCR) |

sys/dev/ic/rtwn.c

1205

rtwn_read_4(sc, R92C_RCR) |

sys/dev/ic/rtwn.c

1248

reg = rtwn_read_4(sc, R92C_RRSR);

sys/dev/ic/rtwn.c

1261

reg = rtwn_read_4(sc, R92C_WMAC_TRXPTCL_CTL);

sys/dev/ic/rtwn.c

1799

rtwn_read_4(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_ROM_DLEN);

sys/dev/ic/rtwn.c

1821

if (rtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT)

sys/dev/ic/rtwn.c

1840

reg = rtwn_read_4(sc, R92C_MCUFWDL);

sys/dev/ic/rtwn.c

1853

if (rtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY)

sys/dev/ic/rtwn.c

193

#define rtwn_bb_read rtwn_read_4

sys/dev/ic/rtwn.c

2683

iq_cal_regs->gpio_muxcfg = rtwn_read_4(sc, R92C_GPIO_MUXCFG);

sys/dev/ic/rtwn.c

2717

rtwn_write_4(sc, R92C_CCK0_AFESETTING, rtwn_read_4(sc,

sys/dev/ic/rtwn.c

3211

reg = rtwn_read_4(sc, R92C_RRSR);

sys/dev/ic/rtwn.c

444

rtwn_read_4(sc, R92C_FPGA0_POWER_SAVE) & ~0x20000);

sys/dev/ic/rtwn.c

459

rtwn_read_4(sc, R92C_FPGA0_POWER_SAVE) | 0x20000);

sys/dev/ic/rtwn.c

509

reg = rtwn_read_4(sc, R92C_EFUSE_CTRL);

sys/dev/ic/rtwn.c

515

reg = rtwn_read_4(sc, R92C_EFUSE_CTRL);

sys/dev/ic/rtwn.c

540

reg = rtwn_read_4(sc, R92C_EFUSE_TEST);

sys/dev/ic/rtwn.c

623

reg = rtwn_read_4(sc, R92C_SYS_CFG);

sys/dev/ic/rtwn.c

632

if (MS(rtwn_read_4(sc, R92C_HPON_FSM),

sys/dev/ic/rtwn.c

906

reg = rtwn_read_4(sc, R92C_RRSR);