rx_desc
struct ar5k_ar5210_rx_desc *rx_desc;
rx_desc = (struct ar5k_ar5210_rx_desc*)&desc->ds_ctl0;
if ((rx_desc->rx_control_1 = (size &
rx_desc->rx_control_1 |= AR5K_AR5210_DESC_RX_CTL1_INTREQ;
struct ar5k_ar5211_rx_desc *rx_desc;
rx_desc = (struct ar5k_ar5211_rx_desc*)&desc->ds_ctl0;
if ((rx_desc->rx_control_1 = (size &
rx_desc->rx_control_1 |= AR5K_AR5211_DESC_RX_CTL1_INTREQ;
struct ar5k_ar5212_rx_desc *rx_desc;
rx_desc = (struct ar5k_ar5212_rx_desc*)&desc->ds_ctl0;
if ((rx_desc->rx_control_1 = (size &
rx_desc->rx_control_1 |= AR5K_AR5212_DESC_RX_CTL1_INTREQ;
qwx_hal_desc_reo_parse_err(struct qwx_softc *sc, uint32_t *rx_desc,
struct hal_reo_dest_ring *desc = (struct hal_reo_dest_ring *)rx_desc;
qwx_hal_rx_reo_ent_paddr_get(sc, rx_desc, paddr, desc_bank);
struct hal_rx_desc *rx_desc;
rx_desc = mtod(m, struct hal_rx_desc *);
msdu_len = qwx_dp_rx_h_msdu_start_msdu_len(sc, rx_desc);
uint8_t *hdr_status = ath11k_dp_rx_h_80211_hdr(ar->ab, rx_desc);
ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", rx_desc,
uint32_t *rx_desc;
while ((rx_desc = qwx_hal_srng_dst_get_next_entry(sc, srng))) {
ret = qwx_hal_wbm_desc_parse_err(rx_desc, &err_info);
msdu->rx_desc = mtod(m, struct hal_rx_desc *);
qwx_dp_rx_h_rate(struct qwx_softc *sc, struct hal_rx_desc *rx_desc,
qwx_dp_rx_h_ppdu(struct qwx_softc *sc, struct hal_rx_desc *rx_desc,
meta_data = qwx_dp_rx_h_msdu_start_freq(sc, rx_desc);
qwx_dp_rx_h_rate(sc, rx_desc, rxi);
if (ath11k_dp_rx_h_msdu_start_mesh_ctl_present(ar->ab, rxcb->rx_desc))
struct hal_rx_desc *rx_desc, enum hal_encrypt_type enctype,
first_hdr = qwx_dp_rx_h_80211_hdr(sc, rx_desc);
decap = qwx_dp_rx_h_msdu_start_decap_type(sc, rx_desc);
struct hal_rx_desc *rx_desc)
fill_crypto_hdr = qwx_dp_rx_h_attn_is_mcbc(sc, rx_desc);
msdu->peer_id = qwx_dp_rx_h_mpdu_start_peer_id(sc, rx_desc);
msdu->seq_no = qwx_dp_rx_h_mpdu_start_seq_no(sc, rx_desc);
enctype = qwx_dp_rx_h_mpdu_start_enctype(sc, rx_desc);
rx_attention = qwx_dp_rx_get_attention(sc, rx_desc);
ret = qwx_dp_rx_h_undecap(sc, msdu, rx_desc, enctype, is_decrypted);
qwx_dp_rx_h_msdu_start_decap_type(sc, rx_desc) !=
struct hal_rx_desc *rx_desc, *lrx_desc;
rx_desc = mtod(msdu->m, struct hal_rx_desc *);
if (qwx_dp_rx_h_attn_msdu_len_err(sc, rx_desc)) {
msdu->rx_desc = rx_desc;
msdu_len = qwx_dp_rx_h_msdu_start_msdu_len(sc, rx_desc);
hdr_status = ath11k_dp_rx_h_80211_hdr(ab, rx_desc);
ath11k_dbg_dump(ab, ATH11K_DBG_DATA, NULL, "", rx_desc,
qwx_dp_rx_h_ppdu(sc, rx_desc, &msdu->rxi);
return qwx_dp_rx_h_mpdu(sc, msdu, rx_desc);
sgi = qwx_dp_rx_h_msdu_start_sgi(sc, msdu->rx_desc);
mcs = qwx_dp_rx_h_msdu_start_rate_mcs(sc, msdu->rx_desc);
rx_bw = qwx_dp_rx_h_msdu_start_rx_bw(sc, msdu->rx_desc);
pkt_type = qwx_dp_rx_h_msdu_start_pkt_type(sc, msdu->rx_desc);
nss = qwx_dp_rx_h_msdu_start_nss(sc, msdu->rx_desc);
freq = qwx_dp_rx_h_msdu_start_freq(sc, msdu->rx_desc);
struct hal_rx_desc *rx_desc;
struct ath12k_rx_desc_info *rx_desc;
rx_desc = TAILQ_FIRST(&dp->rx_desc_free_list);
TAILQ_REMOVE(&dp->rx_desc_free_list, rx_desc, entry);
TAILQ_INSERT_TAIL(used_list, rx_desc, entry);
rx_desc = TAILQ_FIRST(used_list);
if (rx_desc == NULL)
if (rx_desc->map == NULL) {
size, 0, BUS_DMA_NOWAIT, &rx_desc->map);
ret = bus_dmamap_load_mbuf(sc->sc_dmat, rx_desc->map, m,
cookie = rx_desc->cookie;
TAILQ_REMOVE(used_list, rx_desc, entry);
rx_desc->m = m;
paddr = rx_desc->map->dm_segs[0].ds_addr;
bus_dmamap_unload(sc->sc_dmat, rx_desc->map);
qwz_hal_desc_reo_parse_err(struct qwz_softc *sc, uint32_t *rx_desc,
struct hal_reo_dest_ring *desc = (struct hal_reo_dest_ring *)rx_desc;
qwz_hal_rx_reo_ent_paddr_get(sc, rx_desc, paddr, desc_bank);
struct hal_rx_desc *rx_desc;
rx_desc = mtod(m, struct hal_rx_desc *);
msdu_len = qwz_dp_rx_h_msdu_start_msdu_len(sc, rx_desc);
uint8_t *hdr_status = ath12k_dp_rx_h_80211_hdr(ar->ab, rx_desc);
ath12k_dbg_dump(ar->ab, ATH12K_DBG_DATA, NULL, "", rx_desc,
uint32_t *rx_desc;
while ((rx_desc = qwz_hal_srng_dst_get_next_entry(sc, srng))) {
ret = qwz_hal_wbm_desc_parse_err(rx_desc, &err_info);
msdu->rx_desc = mtod(m, struct hal_rx_desc *);
qwz_dp_rx_h_rate(struct qwz_softc *sc, struct hal_rx_desc *rx_desc,
qwz_dp_rx_h_ppdu(struct qwz_softc *sc, struct hal_rx_desc *rx_desc,
meta_data = qwz_dp_rx_h_msdu_start_freq(sc, rx_desc);
qwz_dp_rx_h_rate(sc, rx_desc, rxi);
struct hal_rx_desc *rx_desc, enum hal_encrypt_type enctype,
first_hdr = qwz_dp_rx_h_80211_hdr(sc, rx_desc);
decap = qwz_dp_rx_h_msdu_start_decap_type(sc, rx_desc);
struct hal_rx_desc *rx_desc)
fill_crypto_hdr = qwz_dp_rx_h_is_da_mcbc(sc, rx_desc);
rxcb->peer_id = ath12k_dp_rx_h_mpdu_start_peer_id(ar->ab, rx_desc);
rxcb->seq_no = ath12k_dp_rx_h_mpdu_start_seq_no(ar->ab, rx_desc);
enctype = qwz_dp_rx_h_enctype(sc, rx_desc);
err_bitmap = qwz_dp_rx_h_h_mpdu_err(sc, rx_desc);
is_decrypted = qwz_dp_rx_h_is_decrypted(sc, rx_desc);
qwz_dp_rx_h_undecap(sc, msdu, rx_desc, enctype, is_decrypted);
qwz_dp_rx_h_msdu_start_decap_type(sc, rx_desc) !=
struct hal_rx_desc *rx_desc, *lrx_desc;
rx_desc = mtod(msdu->m, struct hal_rx_desc *);
msdu->rx_desc = rx_desc;
msdu_len = qwz_dp_rx_h_msdu_start_msdu_len(sc, rx_desc);
hdr_status = ath12k_dp_rx_h_80211_hdr(ab, rx_desc);
ath12k_dbg_dump(ab, ATH12K_DBG_DATA, NULL, "", rx_desc,
qwz_dp_rx_h_ppdu(sc, rx_desc, &msdu->rxi);
return qwz_dp_rx_h_mpdu(sc, msdu, rx_desc);
struct hal_rx_desc *rx_desc;
struct rx_desc *desc;
desc = rxd->rx_desc;
rxd->rx_desc = &rd->age_rx_ring[i];
struct rx_desc *desc;
desc = rxd->rx_desc;
struct rx_desc *rx_desc;
struct rx_desc *age_rx_ring;
(sizeof(struct rx_desc) * AGE_RX_RING_CNT)
rxd->rx_desc->addr = htole64(rxd->rx_dmamap->dm_segs[0].ds_addr);
rxd->rx_desc = &rd->alc_rx_ring[i];
#define ALC_RX_RING_ALIGN sizeof(struct rx_desc)
(sizeof(struct rx_desc) * ALC_RX_RING_CNT)
struct rx_desc *rx_desc;
struct rx_desc *alc_rx_ring;
em_receive_checksum(struct em_softc *sc, struct em_rx_desc *rx_desc,
(rx_desc->status & E1000_RXD_STAT_IXSM)) {
if (rx_desc->status & E1000_RXD_STAT_IPCS) {
if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) {
if (rx_desc->status & E1000_RXD_STAT_TCPCS) {
if (!(rx_desc->errors & E1000_RXD_ERR_TCPE))
struct ixgb_rx_desc *rx_desc,
if (rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) {
if (rx_desc->status & IXGB_RX_DESC_STATUS_IPCS) {
if (!(rx_desc->errors & IXGB_RX_DESC_ERRORS_IPE)) {
if (rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS) {
if (!(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE)) {
struct ixgb_rx_desc * rx_desc,
rxd->rx_desc = &rd->jme_rx_ring[i];
desc = rxd->rx_desc;
struct jme_desc *rx_desc;
struct r92c_rx_desc_pci *rx_desc = &sc->rx_ring.desc[i];
if (letoh32(rx_desc->rxdw0) & R92C_RXDW0_OWN)
rtwn_rx_frame(sc, rx_desc, rx_data, i, &ml);
struct r92c_rx_desc_pci *rx_desc = &sc->rx_ring.desc[i];
if (letoh32(rx_desc->rxdw0) & R92C_RXDW0_OWN)
rtwn_rx_frame(sc, rx_desc, rx_data, i, &ml);
rtwn_rx_frame(struct rtwn_pci_softc *sc, struct r92c_rx_desc_pci *rx_desc,
rxdw0 = letoh32(rx_desc->rxdw0);
rxdw3 = letoh32(rx_desc->rxdw3);
rtwn_setup_rx_desc(sc, rx_desc,
rtwn_setup_rx_desc(sc, rx_desc,
rtwn_setup_rx_desc(sc, rx_desc, rx_data->map->dm_segs[0].ds_addr,
total_len = VTE_RX_LEN(letoh16(rxd->rx_desc->drlen));
rxd->rx_desc->drlen =
rxd->rx_desc->drst = htole16(VTE_DRST_RX_OWN);
rxd->rx_desc->drlen =
rxd->rx_desc->drst = htole16(VTE_DRST_RX_OWN);
rxd->rx_desc = desc;
rxd->rx_desc->drbp = htole32(rxd->rx_dmamap->dm_segs[0].ds_addr);
rxd->rx_desc->drlen =
rxd->rx_desc->drst = htole16(VTE_DRST_RX_OWN);
status = letoh16(rxd->rx_desc->drst);
struct vte_rx_desc *rx_desc;