rtwn_pci_write_1
rtwn_pci_write_1(sc, R88E_TX_RPT_CTRL,
rtwn_pci_write_1(sc, R88E_TX_RPT_CTRL + 1, 0x02);
rtwn_pci_write_1(sc, R92C_TXPAUSE, R92C_TXPAUSE_ALL);
rtwn_pci_write_1(sc, R92C_RF_CTRL, 0x00);
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN, reg);
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN, reg);
rtwn_pci_write_1(sc, R92C_SPS0_CTRL, 0x23); /* ditto */
rtwn_pci_write_1(sc, R92C_AFE_XTAL_CTRL, 0x0e); /* differs in btcoex */
rtwn_pci_write_1(sc, R92C_RSV_CTRL, R92C_RSV_CTRL_WLOCK_00 |
rtwn_pci_write_1(sc, R92C_APS_FSMCO, R92C_APS_FSMCO_PDN_EN);
rtwn_pci_write_1(sc, R88E_TX_RPT_CTRL,
rtwn_pci_write_1(sc, R92C_PCIE_CTRL_REG + 1, 0xff);
rtwn_pci_write_1(sc, R92C_TXPAUSE, R92C_TXPAUSE_ALL);
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_pci_write_1(sc, R92C_DUAL_TSF_RST,
rtwn_pci_write_1(sc, R92C_RF_CTRL, 0x00);
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN + 1,
rtwn_pci_write_1(sc, R92C_MCUFWDL, 0);
rtwn_pci_write_1(sc, R88E_32K_CTRL,
rtwn_pci_write_1(sc, R92C_RF_CTRL, 0);
rtwn_pci_write_1(sc, R92C_LPLDO_CTRL,
rtwn_pci_write_1(sc, R92C_AFE_XTAL_CTRL + 2,
rtwn_pci_write_1(sc, R92C_RSV_CTRL + 1,
rtwn_pci_write_1(sc, R92C_RSV_CTRL + 1,
rtwn_pci_write_1(sc, R92C_RSV_CTRL, R92C_RSV_CTRL_WLOCK_00 |
rtwn_pci_write_1(sc, R92C_PCIE_CTRL_REG + 1, 0xff);
rtwn_pci_write_1(sc, R92C_TXPAUSE, R92C_TXPAUSE_ALL);
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_pci_write_1(sc, R92C_DUAL_TSF_RST,
rtwn_pci_write_1(sc, R92C_RF_CTRL, 0x00);
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN + 1,
rtwn_pci_write_1(sc, R92C_MCUFWDL, 0);
rtwn_pci_write_1(sc, R92C_RF_CTRL, 0x00);
rtwn_pci_write_1(sc, R92C_LEDCFG2, rtwn_pci_read_1(sc, R92C_LEDCFG2) & ~(0x80));
rtwn_pci_write_1(sc, R92C_RSV_CTRL + 1,
rtwn_pci_write_1(sc, R92C_RSV_CTRL + 1,
rtwn_pci_write_1(sc, R92C_RSV_CTRL, R92C_RSV_CTRL_WLOCK_00 |
rtwn_pci_write_1(sc, R92C_HSISR,
rtwn_pci_write_1(sc, R92C_RSV_CTRL, 0);
rtwn_pci_write_1(sc, R92C_SPS0_CTRL, 0x2b);
rtwn_pci_write_1(sc, R92C_PCIE_CTRL_REG + 3, 0x77);
rtwn_pci_write_1(sc, R92C_PCIE_CTRL_REG + 3, 0x22);
rtwn_pci_write_1(sc, R92C_GPIO_MUXCFG,
rtwn_pci_write_1(sc, R92C_APSD_CTRL,
rtwn_pci_write_1(sc, 0xfe10, 0x19);
rtwn_pci_write_1(sc, R88E_XCK_OUT_CTRL,
rtwn_pci_write_1(sc, R92C_RSV_CTRL, 0);
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_pci_write_1(sc, R92C_AFE_XTAL_CTRL + 2,
rtwn_pci_write_1(sc, R92C_LPLDO_CTRL,
rtwn_pci_write_1(sc, R92C_APS_FSMCO,
rtwn_pci_write_1(sc, R92C_PCIE_CTRL_REG + 2,
rtwn_pci_write_1(sc, R92C_AFE_XTAL_CTRL_EXT + 1,
rtwn_pci_write_1(sc, R92C_SYS_CLKR,
rtwn_pci_write_1(sc, R92C_MSR, 0);
rtwn_pci_write_1(sc, R92C_RSV_CTRL, 0x00);
rtwn_pci_write_1(sc, R92C_PCIE_CTRL_REG + 1, 0x00);
rtwn_pci_write_1(sc, R92C_PCIE_CTRL_REG + 2,
rtwn_pci_write_1(sc, 0x369, rtwn_pci_read_1(sc, 0x369) | 0x80);
rtwn_pci_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, boundary);
rtwn_pci_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, boundary);
rtwn_pci_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD,
rtwn_pci_write_1(sc, R92C_TRXFF_BNDY, boundary);
rtwn_pci_write_1(sc, R92C_TDECTRL + 1, boundary);
rtwn_pci_write_1(sc, R92C_PCIE_CTRL_REG+1, 0);
rtwn_pci_write_1(sc, R92C_PBP,
rtwn_pci_write_1(sc, off++, buf[i]);
rtwn_pci_write_1(sc, rtl8188eu_mac[i].reg,
rtwn_pci_write_1(sc, R92C_MAX_AGGR_NUM, 0x07);
rtwn_pci_write_1(sc, rtl8192cu_mac[i].reg,
rtwn_pci_write_1(sc, R92C_MAX_AGGR_NUM, 0x0a);
rtwn_pci_write_1(sc, rtl8192ce_mac[i].reg,
rtwn_pci_write_1(sc, R92C_RF_CTRL,
rtwn_pci_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_pci_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80);
void rtwn_pci_write_1(void *, uint16_t, uint8_t);
rtwn_pci_write_1(sc, R92C_C2HEVT_CLEAR, R92C_C2HEVT_HOST_CLOSE);
sc->sc_sc.sc_ops.write_1 = rtwn_pci_write_1;