rtwn_pci_read_4
if (rtwn_pci_read_4(sc, 0x5f8) == 0)
if (rtwn_pci_read_4(sc, 0x5f8) == 0)
rtwn_pci_read_4(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_RDY_MACON);
rtwn_pci_read_4(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APDM_HPDN);
status = rtwn_pci_read_4(sc, R88E_HISR);
estatus = rtwn_pci_read_4(sc, R88E_HISRE);
status = rtwn_pci_read_4(sc, R92C_HISR);
if (MS(rtwn_pci_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) ==
reg = rtwn_pci_read_4(sc, R92C_APS_FSMCO);
(rtwn_pci_read_4(sc, R92C_AFE_XTAL_CTRL) & 0xffffff00) | 0x0f);
reg = rtwn_pci_read_4(sc, R92C_AFE_XTAL_CTRL);
reg = rtwn_pci_read_4(sc, R92C_AFE_XTAL_CTRL + 2);
if (rtwn_pci_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
if (rtwn_pci_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
rtwn_pci_write_4(sc, R92C_APS_FSMCO, rtwn_pci_read_4(sc, R92C_APS_FSMCO) |
reg = rtwn_pci_read_4(sc, R92C_MCUFWDL);
rtwn_pci_read_4(sc, R92C_LEDCFG0) | 0x00800000);
uint32_t rtwn_pci_read_4(void *, uint16_t);
#define rtwn_bb_read rtwn_pci_read_4
sc->sc_sc.sc_ops.read_4 = rtwn_pci_read_4;