rtwn_pci_read_2
reg = rtwn_pci_read_2(sc, R92C_CR);
reg = rtwn_pci_read_2(sc, R92C_CR);
rtwn_pci_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_OFF);
if ((rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_read_2(sc, R92C_CR) &
rtwn_pci_write_2(sc, R92C_APS_FSMCO, rtwn_pci_read_2(sc, R92C_APS_FSMCO) |
rtwn_pci_write_2(sc, R92C_APS_FSMCO, rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
(rtwn_pci_read_2(sc, R92C_SYS_ISO_CTRL) & 0xff) |
rtwn_pci_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR);
reg = rtwn_pci_read_2(sc, R92C_CR);
rtwn_pci_read_2(sc, R92C_APS_FSMCO) & (~R92C_APS_FSMCO_APDM_HPDN));
rtwn_pci_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_read_2(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENSIC);
reg = rtwn_pci_read_2(sc, R92C_CR);
rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APFM_RSM);
rtwn_pci_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
sc->sc_dev.dv_xname, rtwn_pci_read_2(sc, R92C_APS_FSMCO));
if (rtwn_pci_read_2(sc, R92C_MDIO + 2) == 0xc290)
reg = rtwn_pci_read_2(sc, R92C_CR);
reg = rtwn_pci_read_2(sc, R92C_TRXDMA_CTRL);
rtwn_pci_read_2(sc, R92C_SYS_FUNC_EN) |
uint16_t rtwn_pci_read_2(void *, uint16_t);
sc->sc_sc.sc_ops.read_2 = rtwn_pci_read_2;