rsu_read_1
uint8_t rsu_read_1(struct rsu_softc *, uint16_t);
rsu_read_1(sc, R92S_AFE_MISC) |
rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN);
rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN);
rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN);
rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08);
rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20);
rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90);
rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04);
rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11);
rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11);
rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08);
rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80);
rsu_read_1(sc, 0xfe5c) | 0x80);
rsu_read_1(sc, 0x00ab) | 0xc0);
rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL);
rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c);
reg = rsu_read_1(sc, R92S_AFE_MISC);
rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN);
rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN);
rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08);
rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20);
rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97);
rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04);
reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL);
rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11);
rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0);
rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08);
rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80);
rsu_read_1(sc, 0xfe5c) | 0x80);
rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL);
reg = rsu_read_1(sc, R92S_TCR);
reg = rsu_read_1(sc, R92S_CR);
rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL);
if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) {
rsu_read_1(sc, 0x00b5) | 0x01);
rsu_read_1(sc, 0x00bd) | 0x80);
rsu_read_1(sc, 0xfe5c) | 0x80);
reg = rsu_read_1(sc, R92S_EE_9346CR);
reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3);
rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS);
reg = rsu_read_1(sc, R92S_GPIO_CTRL);