sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1981

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

2000

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

220

static double CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

2985

double CalculateWriteBackDelay =

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

3000

CalculateWriteBackDelay =

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

3002

CalculateWriteBackDelay,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

3032

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

4623

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

4640

mode_lib->vba.WritebackLatency + CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

2017

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

2036

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

244

static double CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

3058

double CalculateWriteBackDelay =

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

3073

CalculateWriteBackDelay =

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

3075

CalculateWriteBackDelay,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

3105

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

4745

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

4762

mode_lib->vba.WritebackLatency + CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

2043

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

2062

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

276

static double CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

3072

double CalculateWriteBackDelay =

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

3087

CalculateWriteBackDelay =

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

3089

CalculateWriteBackDelay,

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

3119

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

4744

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

4761

mode_lib->vba.WritebackLatency + CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

2299

CalculateWriteBackDelay(v->WritebackPixelFormat[k],

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

2313

v->WritebackLatency + CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

242

static double CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

3169

double CalculateWriteBackDelay = 0;

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

3178

CalculateWriteBackDelay = 0;

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

3180

CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80;

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

3182

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

4491

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

4508

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

2505

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

2521

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

262

static double CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

3386

double CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

3395

CalculateWriteBackDelay = 0;

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

3397

CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80;

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

3399

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

4962

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

4979

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

2524

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

2540

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

271

static double CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

3492

double CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

3501

CalculateWriteBackDelay = 0;

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

3503

CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80;

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

3505

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

5050

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

5067

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

2903

double CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

2915

CalculateWriteBackDelay = 0;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

2917

CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length +

sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

2920

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

1833

dml_float_t CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

1842

CalculateWriteBackDelay = 0;

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

1844

CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80;

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

1846

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

342

static dml_float_t CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

7848

mode_lib->ms.WritebackDelayTime[k] = mode_lib->ms.state.writeback_latency_us + CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

7863

mode_lib->ms.state.writeback_latency_us + CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

8830

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

8848

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

10956

+ CalculateWriteBackDelay(

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

3642

double CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

3651

CalculateWriteBackDelay = 0;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

3653

CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

3655

return CalculateWriteBackDelay;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9158

mode_lib->ms.WritebackDelayTime[k] = mode_lib->soc.qos_parameters.writeback.base_latency_us + CalculateWriteBackDelay(