reg_info
struct cur_regulatory_info *reg_info)
reg_info->num_2ghz_reg_rules = chan_list_event_hdr->num_2ghz_reg_rules;
reg_info->num_5ghz_reg_rules = chan_list_event_hdr->num_5ghz_reg_rules;
if (!(reg_info->num_2ghz_reg_rules + reg_info->num_5ghz_reg_rules)) {
memcpy(reg_info->alpha2, &chan_list_event_hdr->alpha2, REG_ALPHA2_LEN);
reg_info->dfs_region = chan_list_event_hdr->dfs_region;
reg_info->phybitmap = chan_list_event_hdr->phybitmap;
reg_info->num_phy = chan_list_event_hdr->num_phy;
reg_info->phy_id = chan_list_event_hdr->phy_id;
reg_info->ctry_code = chan_list_event_hdr->country_id;
reg_info->reg_dmn_pair = chan_list_event_hdr->domain_code;
qwx_cc_status_to_str(reg_info->status_code));
reg_info->status_code =
reg_info->is_ext_reg_event = false;
reg_info->min_bw_2ghz = chan_list_event_hdr->min_bw_2ghz;
reg_info->max_bw_2ghz = chan_list_event_hdr->max_bw_2ghz;
reg_info->min_bw_5ghz = chan_list_event_hdr->min_bw_5ghz;
reg_info->max_bw_5ghz = chan_list_event_hdr->max_bw_5ghz;
num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
"max_5ghz %d\n", __func__, reg_info->alpha2, reg_info->dfs_region,
reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
reg_info->reg_rules_2ghz_ptr = qwx_create_reg_rules_from_wmi(
if (!reg_info->reg_rules_2ghz_ptr) {
reg_info->reg_rules_2ghz_ptr);
reg_info->reg_rules_5ghz_ptr = qwx_create_reg_rules_from_wmi(
if (!reg_info->reg_rules_5ghz_ptr) {
reg_info->reg_rules_5ghz_ptr);
struct cur_regulatory_info *reg_info)
qwx_init_channels(struct qwx_softc *sc, struct cur_regulatory_info *reg_info)
for (i = 0; i < reg_info->num_2ghz_reg_rules; i++) {
rule = ®_info->reg_rules_2ghz_ptr[i];
for (i = 0; i < reg_info->num_5ghz_reg_rules; i++) {
rule = ®_info->reg_rules_5ghz_ptr[i];
struct cur_regulatory_info *reg_info = NULL;
reg_info = malloc(sizeof(*reg_info), M_DEVBUF, M_NOWAIT | M_ZERO);
if (!reg_info) {
ret = qwx_pull_reg_chan_list_update_ev(sc, m, reg_info);
ret = qwx_pull_reg_chan_list_ext_update_ev(sc, m, reg_info);
if (reg_info->status_code != REG_SET_CC_STATUS_PASS) {
qwx_init_channels(sc, reg_info);
pdev_idx = reg_info->phy_id;
(char *)reg_info->alpha2, 2))
!ath11k_reg_is_world_alpha((char *)reg_info->alpha2))
regd = ath11k_reg_build_regd(ab, reg_info, intersect);
ab->dfs_region = reg_info->dfs_region;
if (reg_info) {
free(reg_info->reg_rules_2ghz_ptr, M_DEVBUF,
reg_info->num_2ghz_reg_rules *
sizeof(*reg_info->reg_rules_2ghz_ptr));
free(reg_info->reg_rules_5ghz_ptr, M_DEVBUF,
reg_info->num_5ghz_reg_rules *
sizeof(*reg_info->reg_rules_5ghz_ptr));
if (reg_info->is_ext_reg_event) {
kfree(reg_info->reg_rules_6ghz_ap_ptr[i]);
kfree(reg_info->reg_rules_6ghz_client_ptr[j][i]);
free(reg_info, M_DEVBUF, sizeof(*reg_info));
struct cur_regulatory_info *reg_info)
reg_info->num_2ghz_reg_rules = chan_list_event_hdr->num_2ghz_reg_rules;
reg_info->num_5ghz_reg_rules = chan_list_event_hdr->num_5ghz_reg_rules;
if (!(reg_info->num_2ghz_reg_rules + reg_info->num_5ghz_reg_rules)) {
memcpy(reg_info->alpha2, &chan_list_event_hdr->alpha2, REG_ALPHA2_LEN);
reg_info->dfs_region = chan_list_event_hdr->dfs_region;
reg_info->phybitmap = chan_list_event_hdr->phybitmap;
reg_info->num_phy = chan_list_event_hdr->num_phy;
reg_info->phy_id = chan_list_event_hdr->phy_id;
reg_info->ctry_code = chan_list_event_hdr->country_id;
reg_info->reg_dmn_pair = chan_list_event_hdr->domain_code;
qwz_cc_status_to_str(reg_info->status_code));
reg_info->status_code =
reg_info->is_ext_reg_event = false;
reg_info->min_bw_2ghz = chan_list_event_hdr->min_bw_2ghz;
reg_info->max_bw_2ghz = chan_list_event_hdr->max_bw_2ghz;
reg_info->min_bw_5ghz = chan_list_event_hdr->min_bw_5ghz;
reg_info->max_bw_5ghz = chan_list_event_hdr->max_bw_5ghz;
num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
"max_5ghz %d\n", __func__, reg_info->alpha2, reg_info->dfs_region,
reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
reg_info->reg_rules_2ghz_ptr = qwz_create_reg_rules_from_wmi(
if (!reg_info->reg_rules_2ghz_ptr) {
reg_info->reg_rules_2ghz_ptr);
reg_info->reg_rules_5ghz_ptr = qwz_create_reg_rules_from_wmi(
if (!reg_info->reg_rules_5ghz_ptr) {
reg_info->reg_rules_5ghz_ptr);
struct cur_regulatory_info *reg_info)
qwz_init_channels(struct qwz_softc *sc, struct cur_regulatory_info *reg_info)
for (i = 0; i < reg_info->num_2ghz_reg_rules; i++) {
rule = ®_info->reg_rules_2ghz_ptr[i];
for (i = 0; i < reg_info->num_5ghz_reg_rules; i++) {
rule = ®_info->reg_rules_5ghz_ptr[i];
struct cur_regulatory_info *reg_info = NULL;
reg_info = malloc(sizeof(*reg_info), M_DEVBUF, M_NOWAIT | M_ZERO);
if (!reg_info) {
ret = qwz_pull_reg_chan_list_update_ev(sc, m, reg_info);
ret = qwz_pull_reg_chan_list_ext_update_ev(sc, m, reg_info);
if (reg_info->status_code != REG_SET_CC_STATUS_PASS) {
qwz_init_channels(sc, reg_info);
pdev_idx = reg_info->phy_id;
(char *)reg_info->alpha2, 2))
!ath12k_reg_is_world_alpha((char *)reg_info->alpha2))
regd = ath12k_reg_build_regd(ab, reg_info, intersect);
ab->dfs_region = reg_info->dfs_region;
if (reg_info) {
free(reg_info->reg_rules_2ghz_ptr, M_DEVBUF,
reg_info->num_2ghz_reg_rules *
sizeof(*reg_info->reg_rules_2ghz_ptr));
free(reg_info->reg_rules_5ghz_ptr, M_DEVBUF,
reg_info->num_5ghz_reg_rules *
sizeof(*reg_info->reg_rules_5ghz_ptr));
if (reg_info->is_ext_reg_event) {
kfree(reg_info->reg_rules_6ghz_ap_ptr[i]);
kfree(reg_info->reg_rules_6ghz_client_ptr[j][i]);
free(reg_info, M_DEVBUF, sizeof(*reg_info));
(struct reg_info *)malloc(sizeof(struct reg_info));
sizeof(struct reg_info));
struct reg_info *rinfo;