sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

321

return RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0.c

216

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0.c

228

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0.c

411

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0.c

415

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_1.c

222

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_1.c

234

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_1.c

405

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_1.c

409

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_2.c

208

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_2.c

220

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_2.c

403

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_2.c

407

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

314

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

326

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

547

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

551

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v4_1_0.c

209

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v4_1_0.c

221

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/mmhub_v4_1_0.c

404

tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/mmhub_v4_1_0.c

408

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);