sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

192

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

204

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

395

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

399

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

197

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

209

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

400

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

404

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

189

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

201

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

392

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

396

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

194

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

206

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

385

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

389

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

215

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000500, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

226

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000501, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

291

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000500, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

309

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000501, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

69

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000500, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

82

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000551, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

230

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000500, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

246

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000551, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

320

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL))