rdev_to_drm
struct drm_device *dev = rdev_to_drm(rdev);
drm_handle_vblank(rdev_to_drm(rdev), 0);
drm_handle_vblank(rdev_to_drm(rdev), 1);
drm_handle_vblank(rdev_to_drm(rdev), 2);
drm_handle_vblank(rdev_to_drm(rdev), 3);
drm_handle_vblank(rdev_to_drm(rdev), 4);
drm_handle_vblank(rdev_to_drm(rdev), 5);
radeon_get_clock_info(rdev_to_drm(rdev));
list_for_each_entry(encoder, &rdev_to_drm(rdev)->mode_config.encoder_list, head) {
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
drm_handle_vblank(rdev_to_drm(rdev), crtc_idx);
radeon_get_clock_info(rdev_to_drm(rdev));
radeon_get_clock_info(rdev_to_drm(rdev));
crtc = drm_crtc_find(rdev_to_drm(p->rdev), p->filp, crtc_id);
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
radeon_combios_asic_init(rdev_to_drm(rdev));
radeon_get_clock_info(rdev_to_drm(rdev));
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
drm_handle_vblank(rdev_to_drm(rdev), 0);
drm_handle_vblank(rdev_to_drm(rdev), 1);
radeon_combios_asic_init(rdev_to_drm(rdev));
radeon_get_clock_info(rdev_to_drm(rdev));
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
radeon_combios_asic_init(rdev_to_drm(rdev));
radeon_get_clock_info(rdev_to_drm(rdev));
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
radeon_get_clock_info(rdev_to_drm(rdev));
struct drm_device *dev = rdev_to_drm(rdev);
radeon_get_clock_info(rdev_to_drm(rdev));
drm_handle_vblank(rdev_to_drm(rdev), 0);
drm_handle_vblank(rdev_to_drm(rdev), 1);
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
struct drm_device *dev = rdev_to_drm(rdev);
crtc = drm_crtc_find(rdev_to_drm(p->rdev), p->filp, crtc_id);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
pm_runtime_get_sync(rdev_to_drm(rdev)->dev);
drm_helper_hpd_irq_event(rdev_to_drm(rdev));
pm_runtime_mark_last_busy(rdev_to_drm(rdev)->dev);
pm_runtime_put_autosuspend(rdev_to_drm(rdev)->dev);
list_for_each_entry(tmp, &rdev_to_drm(rdev)->mode_config.encoder_list,
struct drm_device *dev = rdev_to_drm(rdev);
rdev->i2c_bus[i] = radeon_i2c_create(rdev_to_drm(rdev), &i2c, stmp);
list_for_each_entry(encoder, &rdev_to_drm(rdev)->mode_config.encoder_list, head) {
struct drm_device *dev = rdev_to_drm(rdev);
edid_info = combios_get_table_offset(rdev_to_drm(rdev), COMBIOS_HARDCODED_EDID_TABLE);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
radeon_atom_initialize_bios_scratch_regs(rdev_to_drm(rdev));
radeon_combios_initialize_bios_scratch_regs(rdev_to_drm(rdev));
drm_helper_resume_force_mode(rdev_to_drm(rdev));
radeon_combios_asic_init(rdev_to_drm(rdev));
atom_card_info->dev = rdev_to_drm(rdev);
drm_property_create_range(rdev_to_drm(rdev), 0, "coherent", 0, 1);
drm_property_create_enum(rdev_to_drm(rdev), 0,
drm_property_create_range(rdev_to_drm(rdev), 0, "load detection", 0, 1);
drm_mode_create_scaling_mode_property(rdev_to_drm(rdev));
drm_property_create_enum(rdev_to_drm(rdev), 0,
drm_property_create_enum(rdev_to_drm(rdev), 0,
drm_property_create_range(rdev_to_drm(rdev), 0,
drm_property_create_range(rdev_to_drm(rdev), 0,
drm_property_create_enum(rdev_to_drm(rdev), 0,
drm_property_create_enum(rdev_to_drm(rdev), 0,
drm_property_create_enum(rdev_to_drm(rdev), 0,
drm_mode_config_init(rdev_to_drm(rdev));
rdev_to_drm(rdev)->mode_config.funcs = &radeon_mode_funcs;
rdev_to_drm(rdev)->mode_config.async_page_flip = true;
rdev_to_drm(rdev)->mode_config.max_width = 16384;
rdev_to_drm(rdev)->mode_config.max_height = 16384;
rdev_to_drm(rdev)->mode_config.max_width = 8192;
rdev_to_drm(rdev)->mode_config.max_height = 8192;
rdev_to_drm(rdev)->mode_config.max_width = 4096;
rdev_to_drm(rdev)->mode_config.max_height = 4096;
rdev_to_drm(rdev)->mode_config.preferred_depth = 24;
rdev_to_drm(rdev)->mode_config.prefer_shadow = 1;
rdev_to_drm(rdev)->mode_config.fb_modifiers_not_supported = true;
radeon_crtc_init(rdev_to_drm(rdev), i);
ret = radeon_setup_enc_conn(rdev_to_drm(rdev));
drm_kms_helper_poll_init(rdev_to_drm(rdev));
drm_kms_helper_poll_fini(rdev_to_drm(rdev));
drm_helper_force_disable_all(rdev_to_drm(rdev));
drm_mode_config_cleanup(rdev_to_drm(rdev));
spin_lock_irqsave(&rdev_to_drm(rdev)->event_lock, flags);
spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags);
radeon_get_crtc_scanoutpos(rdev_to_drm(rdev), crtc_id,
spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags);
spin_lock_irqsave(&rdev_to_drm(rdev)->event_lock, flags);
spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags);
spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags);
struct drm_device *dev = rdev_to_drm(rdev);
radeon_driver_irq_handler_kms, rdev_to_drm(rdev), rdev->self.dv_xname);
struct drm_device *dev = rdev_to_drm(rdev);
if (radeon_is_px(rdev_to_drm(rdev))) {
struct drm_device *ddev = rdev_to_drm(rdev);
ddev = rdev_to_drm(rdev);
config_detach(rdev_to_drm(rdev)->dev, flags);
drm_fb_helper_restore_fbdev_mode_unlocked(rdev_to_drm(rdev)->fb_helper);
struct drm_fb_helper *fb_helper = rdev_to_drm(rdev)->fb_helper;
struct drm_device *dev = rdev_to_drm(rdev);
ret = pm_runtime_get_sync(rdev_to_drm(rdev)->dev);
pm_runtime_mark_last_busy(rdev_to_drm(rdev)->dev);
pm_runtime_put_autosuspend(rdev_to_drm(rdev)->dev);
pm_runtime_mark_last_busy(rdev_to_drm(rdev)->dev);
pm_runtime_put_autosuspend(rdev_to_drm(rdev)->dev);
format_info = drm_get_format_info(rdev_to_drm(rdev), mode_cmd.pixel_format,
ret = radeon_framebuffer_init(rdev_to_drm(rdev), fb, format_info, &mode_cmd, gobj);
struct drm_fb_helper *fb_helper = rdev_to_drm(rdev)->fb_helper;
struct drm_fb_helper *helper = rdev_to_drm(rdev)->fb_helper;
trace_radeon_fence_emit(rdev_to_drm(rdev), ring, (*fence)->seq);
trace_radeon_fence_wait_begin(rdev_to_drm(rdev), i, target_seq[i]);
trace_radeon_fence_wait_end(rdev_to_drm(rdev), i, target_seq[i]);
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
struct drm_device *dev = rdev_to_drm(rdev);
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
rdev_to_drm(rdev)->vblank_disable_immediate = true;
r = drm_vblank_init(rdev_to_drm(rdev), rdev->num_crtc);
struct drm_device *dev = rdev_to_drm(rdev);
bo = pool_get(&rdev_to_drm(rdev)->objpl, PR_WAITOK | PR_ZERO);
drm_gem_private_object_init(rdev_to_drm(rdev), &bo->tbo.base, size);
pool_put(&rdev_to_drm(bo->rdev)->objpl, bo);
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *ddev = rdev_to_drm(rdev);
vbl_status = radeon_get_crtc_scanoutpos(rdev_to_drm(rdev),
struct drm_device *ddev = rdev_to_drm(rdev);
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
drm_for_each_crtc(crtc, rdev_to_drm(rdev)) {
drm_for_each_crtc(crtc, rdev_to_drm(rdev)) {
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *ddev = rdev_to_drm(rdev);
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
rdev_to_drm(rdev)->anon_inode->i_mapping,
rdev_to_drm(rdev)->vma_offset_manager,
rdev_to_drm(rdev)->vma_offset_manager,
struct drm_minor *minor = rdev_to_drm(rdev)->primary;
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
radeon_combios_asic_init(rdev_to_drm(rdev));
radeon_get_clock_info(rdev_to_drm(rdev));
radeon_get_clock_info(rdev_to_drm(rdev));
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *ddev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
struct drm_device *dev = rdev_to_drm(rdev);
drm_handle_vblank(rdev_to_drm(rdev), 0);
drm_handle_vblank(rdev_to_drm(rdev), 1);
radeon_get_clock_info(rdev_to_drm(rdev));
struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root;
radeon_get_clock_info(rdev_to_drm(rdev));
radeon_get_clock_info(rdev_to_drm(rdev));
drm_handle_vblank(rdev_to_drm(rdev), crtc_idx);
radeon_get_clock_info(rdev_to_drm(rdev));