rcr0
lcr0((rcr0() & ~CR0_NW) | CR0_CD);
lcr0(rcr0() & ~(CR0_CD | CR0_NW));
cr0 = rcr0() & ~CR0_TS;
proc0.p_addr->u_pcb.pcb_cr0 = rcr0();
lcr0(rcr0() | CR0_WP);
lcr0((rcr0() & ~CR0_NW) | CR0_CD);
lcr0(rcr0() & ~(CR0_CD | CR0_NW));
lcr0(rcr0() | CR0_WP);
pcb->pcb_cr0 = rcr0();
pcb->pcb_cr0 = rcr0();
creg0 = rcr0(); /* Permit access to SIMD/FPU path */
creg0 = rcr0(); /* Permit access to SIMD/FPU path */
static __inline u_int rcr0(void);
lcr0(rcr0() & ~(CR0_EM|CR0_TS));
lcr0(rcr0() | (CR0_EM|CR0_TS));
lcr0(rcr0() & ~(CR0_EM|CR0_TS));
lcr0(rcr0() | (CR0_TS));
lcr0(rcr0() & ~CR0_NE);
printf("recursive npx trap; cr0=%x\n", rcr0());
printf("recursive npx trap; cr0=%x\n", rcr0());
#define stts() lcr0(rcr0() | CR0_TS)
rtw_check_phydelay(struct rtw_regs *regs, u_int32_t rcr0)
RTW_WRITE(regs, RTW_RCR, rcr0); /* restore RCR */